GB2104338A

GB2104338A - Noise reduction circuit for a video signal

Info

Publication number: GB2104338A
Application number: GB08217850A
Authority: GB
Inventors: Akira Hirota
Original assignee: Victor Company of Japan Ltd; Nippon Victor KK
Current assignee: Victor Company of Japan Ltd; Nippon Victor KK
Priority date: 1981-06-19
Filing date: 1982-06-21
Publication date: 1983-03-02
Also published as: FR2508261B1; KR870003488Y1; GB2104338B; DE3223066A1; KR870003487Y1; MY8700309A; FR2508261A1; DE3223066C2; US4563704A; KR840001034A

Description

1 GB2104338A 1

SPECIFICATION

Noise reduction circuit for a video signal The present invention generally relates to noise reduction circuits for video signals, and more particularly to a noise reduction circuit for a video signal capable of effectively elimi nating a noise component appearing immedi ately after a rise in a luminance signal of a 7E reproduced video signal.

Generally, a noise component is mixed within a video signal reproduced from a mag netic tape by a video signal magnetic record ing and reproducing apparatus. However, especially the high-frequency component of the luminance signal in the video signal which is recorded and reproduced, is subjected to pre-emphasis, and the luminance signal is frequency modulated after the pre-emphasis is performed. Hence, the frequency of the fre quency-modulated signal at parts immediately after a part (rise) where the level of the luminance signal rapidly changes from black level to white level, and immediately after a part (fall) where the level of the luminance signal rapidly changes from white level to black level, is particularly high because of the above pre-emphasis. Thus, in general, degra dation is introduced in the signal-to-noise ratio of the recording and reproducing character istics in the high-frequency range, in the mag netic recording and reproducing system.

Therefore, the signal-to-noise ratio of the lumi nance signal at the above parts immediately after the rise and fall is poor, and it is highly desirable to positively eliminate the noise at these parts.

However, as will be described later in con junction with the drawings, the conventional noise reduction circuit for eliminating the noise component in the reproduced luminance signal had a disadvantage in that the noise immediately after the rise in the reproduced luminance signal could not be eliminated ef fectively.

Accordingly, it is a general object of the present invention to provide a novel and use ful noise reduction circuit for a video signal in which the above described disadvantages have been overcome.

The present invention provides a noise re duction circuit comprising, a lowpass filter supplied with a luminance signal having a noise component of an input video signal, for eliminating a high-frequency component in cluding said noise component, first means for subtracting an output signal of said lowpass filter from said luminance signal, in a state where a rise in the level of said luminance signal is delayed by a predetermined time r from the start of a rise in the output of said lowpass filter, said output signal of said low pass filter having a rise time r, and second means for amplitude-limiting a subtracted out- Out of said first means and subtracting the amplitude-limited output from said luminance signal, to obtain a luminance signal eliminated of the noise.

Another and more specific object of the present invention is to provide a noise reduction circuit for a video signal in which, subtraction is performed between a luminance signal passed through a lowpass filter and a luminance signal passed through a delay circuit, and a substracted output is passed through a limiter wherein subtraction is performed between an amplitude-limited signal and the signal passed through the delay circuit, to obtain a signal eliminated of the noise. According to the circuit of the present invention, even the noise immediately after a rise in the luminance signal can be effectively eliminated.

Still another object of the present invention is to provide a noise reduction circuit for a video signal in which, subtraction is performed a luminance signal passed through a delay circuit and a lowpass filter and an input luminance signal, and a subtracted output is passed through a limiter wherein subtraction is performed between an amplitude-limited signal and the input luminance signal, to obtain a signal eliminated of the noise.

Other objects and further features of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.

Figure 1 is a systematic block diagram showing an example of a conventional noise reduction circuit for a video signal; Figures 2(A) through 2(C) respectively shown signal waveforms at each part of the block system shown in Fig. 1; Figure 3 is a systematic block diagram showing a video signal reproducing system applied with a noise reduction circuit for a video signal according to the present invention; Figures 4(A) through 4(F) respectively show signal waveforms at each part of the block system shown in Fig. 3; Figure 5 is a systematic block diagram showing a modification of the first emboidment of the circuit according to the present invention shown in Fig. 3; Figure 6 is a systematic block diagram showing a second embodiment of a noise reduction circuit for a video signal according to the present invention; Figures 7(A) through 7(E) respectively show signal waveforms at each part of the block system shown in Fig. 6; Figure 8 is a systematic block diagram showing a video signal reproducing a system applied with the second embodiment of the circuit according to the present invention shown in Fig. 6; Figure 9 is a circuit diagram showing an example of a lowpass filter used in the circuit 2 GB 2 104 338A 2 according to the present invention; and Figure 10 is a graph showing a frequency characteristic of the lowpass filter shown in Fig. 9.

First, an example of a conventional noise reduction circuit for a video signal will be described in conjunction with Fig. 1. In Fig. 1, a reproduced luminance signal having a noise component N shown in Fig. 2(A), is supplied to a highpass filter 11 from an input terminal 10. The highfrequency component including the noise component N, is eliminated at this high pass filter 11. Because the highpass filter 11 also operates as a differenti- ating circuit, an output of the highpass filter 11 has a waveform shown in Fig. 2(B). Large amplitude portions of the output of the highpass filter 11 are limited to levels indicated by dotted lines in Fig. 2(13), at a limiter 12. An output of the limiter 12 is supplied to an adder 13 with an inverted phase, and subtraction is perfomed between the reproduced luminance signal obtained from the terminal 10. Accordingly, as shown in Fig. 2(C), a reproduced luminance signal largely eliminated of the noise component is obtained from a terminal 14.

However, as described above, the output signal of the highpass filter 11 shown in Fig.

2(13) includes large amplitude portions according to the rising part and the failing part of the luminance signal. Thus, these large amplitude portions are amplitude-limited at the limiter 12, and as a result, the noise component which is to be used for mutual cancellation is eliminated. Accordingly, in the reproduced luminance signal shown in Fig. 2(C) which is obtained from the terminal 14, a noise component ni remains at parts immediately after the rise and fall in the reproduced luminance signal without being eliminated. Because the parts of the luminance signal immediately after the rise from black level to white level and immediately after the fall from white level to black level are emphasized due to the 110 above described pro-emphasis performed, the noise at these parts are emphasized and are highly visible. Hence, the conventional noise reduction circuit has a disadvantage in that the effect of the noise reduction is insufficient.

The present invention has overcome the disadvantages introduced in the above con ventional circuit, and description of ombodi monts of the present invontion will hereinafter be given by referring to Figs- 3 through 10. 120 Fig. 3 shows a reproducing systom applied with an ornbodimont of a noiso reduction circuit according to the [)resent invention. A color vidoo signal reproduced from a magnetic tape 20 by a rotary magnetic head 2 l, is supplied to a highpass filter 23 and a low pass filtor 28, through a preamplifier 22. The reproduced color video signal is thus sepa-' rated into a frequoncy-modulated luminance signal and a frequency-converted carrier chrominance signal. The frequency-modulated luminance signal from the highpass filter 23 is demodulated at a frequency-demodulator 24. A demodulated luminance signal is then eliminated of the unwanted frequency component at a lowpass filter 25, and supplied to a noise reduction circuit 26 according to the present invention. As will be described hereinafter, the niose component in the demodu- lated luminance signal is eliminated at the noise reduction circuit 26, and supplied to an adder 27.

The frequency-converted carrier chrominance signal from the lowpass filter 28 is frequency-converted at a color processing circuit 29 to be returned into the carrier chrominance signal in the original band, and is subjected to a predetermined signal processing. An output signal of the color processing circuit 29 is supplied to the adder 27 through a delay circuit 30, and is added to the above luminance signal. An output of the adder 27 is obtained from an output terminal 31 as a reproduced color video signal.

Next, description will be given with respect to the construction and operation of the noise reduction circuit 26.

The luminance signal a from the lowpass filter 25 having a noise component N as shown in Fig. 4(A), is supplied to a lowpass filter 41 and a delay circuit 43 within the noise reduction circuit 26. A signal b obtained after the high-frequency component is eliminated at the lowpass filter 25, has a wave- form shown in Fig. 4(13). Because the lowpass filter 41 also operates as a type of an integrating circuit, the signal b rises and fails with a time constant 7- as shown in Fig. 4(13). The output signal b of the above lowpass filter 25 is supplied to an adder 42 with an inverted phase, that is, as a subtrahend.

On the other hand, luminance signal c shown in Fig. 4(C) which is delayed at the delay circuit 43, is supplied to the adder 42 as a minuend. Thus, the signal b from the lowpass filter 41 is subtracted from the luminance signal c. Here, a delay time 7. of the delay circuit 43 is set to a value substantially equal to the time constant 7. in the waveform shown in Fig. 4(B). When the signal b is subtracted from the signal c at the adder 42, a noise component signal d having a waveform shown in Fig. 4(D) is obtained from the adder 42.

Large amplitude portions of the output signal d of the adder 42, are amplitude-limited of the portions exceeding the levels indicated by dotted lines in Fig. 4(D) at a limiter 44. This amplitude-limited signal is supplied to an adder 45 with an inverted phase, that is, as subtrahend. On the other hand, the signal c delayed at the delay circuit 43, is supplied to the adder 45 as minuend. Accordingly, the noise component signal from the limiter 44 is subtracted from the signal c from the delay circuit 43. A reproduced luminance signal e shown in Fig. 4(E) which is substantially elimi nated of the noise component, is thus ob tained from the adder 45.

Because the large amplitude portions of the output signal d of the adder 42 are amplitude limited at the limiter 44, and the noise com ponent used for mutual cancellation of noise is eliminated, a noise component n2 remains as shown in Fig. 4(E) since the elimination of the noise component is not performed at the adder 45 with respect portions corresponding to the above large amplitude portions. How ever, the above large amplitude portions of the signal dexist at positions immediately before the rise and fall in the output delayed signal c of the delay circuit 43. Accordingly, the position of the noise component n2 in the signal e is also immediately before the rise from black to white and immediately before the fall from white to black in the signal.

Compared to the position (position immedi ately after the rise and fall) in the conventional example shown in Fig. 2(C), the noise compo nent n2 at this position is not highly visible or conspicuous. Therefore, the effect of the noise component elimination is great accord ing to the circuit of the present invention.

As clearly understood from the description given above, the reproduced luminance signal e obtained from the adder 45 is delayed by a time i. with respect to the luminance signal a before the noise is eliminated. Thus, the delay circuit 30 is provided in order to match the timing of the carrier chrominance signal and the luminance signal e. The delay time of the delay circuit 30 is set to a value equal to the above delay time 7 In the circuit according to the present in vention, the effect of the noise elimination is large compared to the conventional circuit, because the noise immediately after the rise fall in the luminance signal is eliminated. But, the noise n2 remains at portions immediately before the rise and fall in the luminance signal. This noise n2 can be eliminated by use of the conventional circuit. When eliminating the above noise n2, a noise reduction circuit in which the circuit shown in Fig. 1 is con nected in series at a preceeding stage or succeeding stage of the noise reduction circuit comprising the blocks 41 through 45 in Fig.

3, instead of the noise reduction circuit 26 shown in Fig. 3. An example of such a noise reduction circuit 26a is shown in Fig. 5. In Fig. 5, those parts which are the same as those corresponding parts in Figs. 1 and 3 are designated by the same reference numerals, and their description will be omitted. In Fig.

5, the luminance signal from the lowpass filter 125 is supplied to a terminal 40. As described above, noise other than the noise n2 shown in Fig. 4(E) is eliminated at the circuit part including the blocks 41 through 45. The noise n2 immediately before the rise and fall 130 GB2104338A 3 An the signal is effectively eliminated at the succeeding blocks 11 through 13, and a reproduced luminance signal f shown in Fig. 4(F) which is completely eliminated of all the noise components, is obtained from the terminal 14 and then supplied to the adder 27.

Next, description will be given with respect to a second embodiment of a noise reduction circuit according to the present invention, by referring to Fig. 6. A luminance signal a shown in Fig. 7(A) which is applied to a terminal 50, is supplied to a delay circuit 51 on one hand to be delayed. The delay time of the delay circuit 51 is selected to (1 H- r).

Here, 1 H indicates a horizontal scanning period (63.5 Itsec) of the video signal. Thus, as shown in Fig. 7(13), a signal g obtained from the delay circuit 51 is delayed by a time (1 H-T) with respect to the input signal a.

The output signal of the delay circuit 51 is eliminated of the highfrequency component including the niose component at the lowpass fitter 41, and a signal h having a waveform shown in Fig. 7(C) is accordingly obtained.

The output signal h of the lowpass filter 41 rises and falls with a time constant r, as in the case of the signal b in the above described first embodiment of the invention. This output signal h of the lowpass filter 41 is supplied to the adder 42 with an inverted phase, that is, as a subtrahend.

On the other hand, the signal a from the input terminal 50 is also directly supplied to the adder 42 as a minuend. Hence, the signal h is subtracted from the signal a at the adder 42, and a noise component signal i having a waveform shown in Fig. 7(D)is obtained from the adder 42. Here, because the signal h is delayed by approximately 1 H interval with respect to the signal a from the lowpass filter 41, the signal h is subtracted from the signal a succeeding the signal h before this signal h is delayed, by approximately 1 H.

Large amplitude portions of the output sig- nal i of the adder 42, are amplitude-limited of the portions exceeding the levels indicated by dotted lines in Fig. 7(D) at the limiter 44. This amplitude-limited signal is supplied to the adderf 45 with an inverted phase, that is, as a subtrahend. On the other hand, the signal a from the terminal 50 is directly supplied to the adder 45 as a minuend. Accordingly, the noise component signal from the limiter 44 is subtracted from the signal a. A reproduced luminance signal e shown in Fig. 7(E) which is substantially eliminated of the noise component, is thus obtained from the adder 45.

Because the large amplitude portions of the output signal i of the adder 42 are amplitudelimited at the limiter 44, and the noise component used for mutual cancellation of noise is eliminated, a noise component remains as shown in Fig. 7(E) since the elimination of the noise component is not performed at the adder 45 with respect to portions correspond- 4 GB2104338A ing to the above large amplitude portions. However, the above large amplitude portions of the signal i exist at positions immediately before the rise and fall in the signal a of 1 H interval therafter. Accordingly, the portion of the noise component n2 in the signal e is also immediately before the rise from black to white and immediately before the fall from white to black in the signal. The noise compo- nent at this position is not highly visible or conspicuous, as described above.

A reproducing circuit applied with the above second embodiment of the noise reduction circuit according to the present invention, is shown in Fig. 8. In Fig. 8, those parts which are the same as those corresponding parts in Figs. 3 and 6 are designated by the same reference numerals, and their descrip tion will be omitted. In the application shown in Fig. 8, a limiter 55 and a frequency demo- 85 dulator 56 are provided between the delay circuit 51 and the lowpass filter 41 within the noise reduction circuit shown in Fig. 6. In addition, a limiter 57 and a frequency demodulator 58 are provided in a signal path for directly supplying a signal to the acider 42 as a subtrahend without passing the signal through the delay circuit 51. A delay circuit is not provided in the signal path for supplying a signal to the adder 42 as a subtrahend from the highpass filter 23. Thus, the signal obtained from the adder 45 is not delayed with respect to the carrier chrominance signal. Accordingly, a deJay circuit such as that in the above described first embodiment of the in- vention, is not provided in the signal path of the carrier chrominance signal passing through the lowpass filter 28 and the color processing circuit 29.

Subraction is performed between the lumi- 105 nance signal having the noise component and the noise component of 1 H interval before, at the adder 45. However, because there is a line correlation in the no'ise component, no inconveniences will be introduced even if the noise signal of the luminance signal at a certain position is cancelled with the noise signal of 1 H interval before that signal. There fore, the elimination of tne noise component can be performed positively.

According to the second emboaiment of the present inventionAhe delay time in the delay circuit 51 is close to 1 H. Thus, a glass delay line having fine characteristics may be used as 5 the delay circuit 51. Further, as compared to the above first embodiment of the invention, a delay circuit is not required in the carrier chrominance signal system. Accordingly fine reproduced signal having no delay, fine char- acteristics, and in which the noise component is eliminated, can be obtained from the output terminal 31.

In the present second emboidment of thb invention, the conventional circuit may be used together as in the modification shown in Fig. 5, in order to eliminate the noise n2.

Moreover, in Figs. 6 and 8, the delay circuit 51 is provided at a stage preceeding the lowpass filter 41. However, the delay circuit 51 may be provided bertween the lowpass filter and the adder 42.

In each of the above described embodiments of the invention, the time constant 7-of the lowpass filter 41 is selected to a value in the range of 0.5 gsec to 2 gsec, for example. An example of a concrete circuit of the lowpass filter 41 is shown in Fig. 9. The circuit construction is a known six-order Bessel lowpass filter, and the circuit constants are se- lected as follows: Resistors Rl = R2:1 kq Coils L1:47 ttH, L2:220 gH, L3:390 ttH Capacitors Cl: 100 pF, C2:33 pF, C3:270 pF, C4:1 5 pF, C5: 180 pF, C6:56 pF, C7:12p17 The frequency characteristic of this lowpass filter 41 is shown in Fig. 10, wherein the rising time constant T is 1.5 gsee.

In each of the above embodiments of the invention, the limiting level of the limiter 44 indicated by the dotted lines in Figs. 4(D) and 7(D) is selected to a value in the range of 0.05 to 0.07, for example, if the level between the sink tip to the white peak of the input luminance signal a is assumed to be 1.

Further, the present invention is not limited to these embodiments, but various variations and modifications may be made without departing from the scope of the present inven- tion.

Claims

1. A noise reduction circuit comprising:

a Clowpass filter supplied with a luminance signal having a noise component of an input video signal, for eliminating a high-frequency component including said noise component; first means for subtracting an output signal of said lowpass filter from said luminance signal, in a state where a rise in the level of said luminance signal is delayed by a predetermined time 7- from the start of a rise in the output of said lowpass filter, said output signal of said lowpass filter having a rise time r, and second means for amplitude-limiting a subtracted output of said first means and subtracting the amplitude-limited output from said luminance signal, to obtain a luminance signal eliminated of the noise.

2. A noise reduction circuit as claimed in claim 1 in whcih said first means comprises a delay circuit for delaying said luminance signal by a delay time 7-, and firt subtraction means for subtracting the output signal of said lowpass filter from an output luminance signal of said delay circuit, and said second means comprises a limiter for amplitude-limiting an output signal of said first subtraction means, and second subtraction means for GB2104338A 5 subtracting an output signal of said limiter from the output luminance signal of said delay circuit.

3. A noise reduction circuit as claimed in claim 2 in which said first subtraction means comprises a first adder directly supplied with the output signal of said delay circuit and supplied with the output signal of said lowpass filter with an inverted phase, and said second subtraction means comprises a second adder directly supplied with the output signal of said delay circuit and supplied with the output signal of said limiter with an inverted phase.

4. A noise reduction circuit as claimed in claim 2 in which said time r is selected to a value in a range of 0.5 tisec to 2.0 [Lsec.

5. A noise reduction circuit as claimed in claim 4 in which said time r is selected to a value in the order of 1.5 gsec.

6. A noise reduction circuit as claimed in claim 1 further comprising a highpass filter for obtaining a high-frequency component of the output signal of said second means, and third means for amplitude-limiting an output signal of said highpass filter and subtractingf this amplitude-limited output from the output signal of said second means.

7. A noise reduction circuit as claimed in claim 1 in which said first means comprises a delay circuit for delaying said luminance signal by a delay time (1 Wr), where 1 H indicates one horizontal scanning period of the video signal, an output signal of said delay circuit being supplied to said lowpass filter, and first subtraction means for subtracting the output signal of said lowpass filter from said luminance signal, and said second means comprises a limiter for amplitude- limiting an output signal of said first subtraction means, and second subtraction means for subtracting an output signal of said limiter from said luminance signal.

8. A noise reduction circuit as claimed in claim 1 in which said first means comprises a delay circuit for delaying the output signal of said lowpass filter by a delay time (1 H-,r), where 1 H indicates one horizontal scanning period of the video signal, an output signal of said delay circuit being supplied to said lowpass filter, and first subtraction means for subtracting the output signal of said delay circuit from said luminance signal, and said second means comprises a limiter for amplitude-limiting an output signal of said first subtraction means, and second subtraction means for subtracting an output signal of said limiter from said luminance signal.

9. A noise reduction circuit as claimed in claim 7 in which said first subtraction means comprises a first adder directly supplied with said luminance signal and supplied with the output signal of said lowpass filter with an inverted phase, and said second subtraction means comprises a second adder directly sup- plied with said luminance signal and supplied with the output signal of said limiter with an inverted phase.

10. A noise reduction circuit as claimed in claim 7 in which said time r is selected to a value in a range of 0.5 gsec to 2.0 gsec.

11. A noise reduction circuit as claimed in claim 10 in which said time 7. is selected to a value in the order of 1.5 ttsec.

Printed for Her Majesty's Stationery Office by Burgess & Son (Abingdon) Ltdl 983. Published at The Patent Office, 25 Southampton Buildings, London, WC2A lAY, from which copies may be obtained.