GB2045949A - Signal monitoring circuit - Google Patents

Signal monitoring circuit Download PDF

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Publication number
GB2045949A
GB2045949A GB8001507A GB8001507A GB2045949A GB 2045949 A GB2045949 A GB 2045949A GB 8001507 A GB8001507 A GB 8001507A GB 8001507 A GB8001507 A GB 8001507A GB 2045949 A GB2045949 A GB 2045949A
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United Kingdom
Prior art keywords
pulses
train
output
input
logic
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Granted
Application number
GB8001507A
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GB2045949B (en
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Fisher Controls International LLC
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Fisher Controls Corp of Delaware
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Publication date
Application filed by Fisher Controls Corp of Delaware filed Critical Fisher Controls Corp of Delaware
Priority to GB8001507A priority Critical patent/GB2045949B/en
Publication of GB2045949A publication Critical patent/GB2045949A/en
Application granted granted Critical
Publication of GB2045949B publication Critical patent/GB2045949B/en
Expired legal-status Critical Current

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/165Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electronic Switches (AREA)

Abstract

Monitoring apparatus Fig. 1 for producing an output in response to a predetermined condition comprises bistable means (4) having a set input, a reset input and an output; trigger means (2) for applying a first train of pulses ( phi 1) to the set input and for applying a second train of pulses ( phi 2) of the same frequency as and different phase to the first train of pulses to the reset input over logic (6) in response to a predetermined condition of signals I2-I5 and an output device (8) responsive to oscillation of the bistable means between its stable states. The logic (6) is so constructed as to establish a path therethrough for the reset pulses ( phi 2) on the condition that two or more of the inputs I2-I5 are present. The oscillating bistable (4) then drives a transformer-coupled DC-DC converter (8), the output of which may be used to operate a safety device (lamp, relay etc). The logic comprises an array of switching elements as shown in Fig. 3, in which pulses ( phi 2) are applied at P and an input In applied at S. <IMAGE>

Description

SPECIFICATION Monitoring apparatus This invention relates to monitoring apparatus.
The invention relates particularlyto monitoring apparatus of the kind adapted to provide a warning signal and/or effect a control action in response to the occurrence of a predetermined condition in an associated equipment. Such apparatus is commonly required to exhibit high integrity and to fail safely, e.g. when used as a safety apparatus to detect an undesirable condition in the associated equipment.
According to a first aspect of the invention a monitoring apparatus comprises bistable means having a set input, a reset input and an output; trigger means connected to said inputs of said bistable means for applying a first train of pulses to one of the said inputs of the bistable means and for applying a second train of pulses of the same frequency as and different phaseto said first train of pulses to the other one of said inputs of the bistable means in response to a predetermined condition; and an output device responsive to oscillation of said bistable means between its stable states.
It will be appreciated that in such a monitoring apparatus the bistable means assumes a stable state in the absence of the predetermined condition and oscillates between its stable states, thereby producing a train of pulses at its output in response to the predetermined condition.
Preferably said trigger means comprises generator means which produces said first train of pulses and a third train of pulses of the same fre quencyandhifferentphase;and logic means having a primary inputto which said third train of pulses is applied, m secondary inputs and an output and being arranged to produce at its output, when input signals are applied to at leastn of its secondary inputs, said second train of pulses having the same frequency and phase as said third train of pulses.
Preferably said first and second trains of pulses are substantially 180 out of phase.
Preferably said first and second trains of pulses have markto space ratios not less than substantially 1 to9.
Preferably said output device comprises a D.C. to D.C. converter.
According to a second aspect of the invention, a logic element suitable for use in a monitoring apparatus according to the first aspect of the invention has a primary input, a secondary input and an output, and comprises: a transformer, across the primary winding of which is the primary input of the element; and semiconductor switch means arranged to be switched by a signal in the secondary winding of the transformer, the secondary input of the element being across said semiconductor switch means, and the output of the element being derived from the signal passing through said semiconductor switch means.
Preferably the logic means of the first aspect of the invention comprises x Cnm such logic elements connected in Cnm parallel lines each containingn elements in series.
There will now be described, by way of example only, one safety apparatus for monitoring four input voltages in according with a first aspect of the invention and including a logic means comprising logic elements according to a second aspect of the invention, with reference to the accompanying drawings, in which: Figure 1 shows a block diagram of the safety apparatus Figure 2 shows a network logically equivalent to the logic means; and Figure 3 shows the circuit diagram of an element of the logic means.
Referring to Figure 1, the safety apparatus includes a two-phase clock generator 2 which produces two trains of positive-going pulses IZI, and 2- The two trains of pulses have the same frequency and are 180 out of phase. The pulses in each train have widths which are small compared to the repetition frequency: the mark to space ratio is typically 1 to 9 or greater.
The train of pulses IZI, is applied to the SET input of a bistable device 4. The train of pulses IZI, is applied to a primary input 1, of a logic means 6, which will be described in greater detail below. Voltages to be monitored are applied to four secondary inputs i2, 13, i4 and 15 of the logic means 6. The output of the logic means is applied to the RESET input of the bistable 4. The output of the bistable 4 is applied to a transformer coupled D.C.-D.C. converter 8.
Referring now also to Figure 2, the logic means 6 is arranged to produce at its output a train of pulses of the same frequency and phase as its input train of pulses IZI, when input voltages are applied to two or more of its secondary inputs 12-15. Figure 2 shows a logically equivalent network 10 having twelve switches connected two switches in series in six parallel lines. Each switch is labelled with one of the four secondary inputs 12-15, to signify that the application of an input voltage to a particular secondary input is equivalent to closure of all the switches similarly labelled in the network 10.
It can be seen, therefore, that the closure of any two or more groups of switches labelled i2, i3, i4 or 15 (which is equivalent to the application of input voltages to the similarly labelled secondary inputs of the logic means 6) results in the establishment of a signal path through the logic network 10 (which is equivalentto the production atthe output of the logic means 6 of a train of pulses of the same frequency and phase as the train of pulses 2)- Referring again to Figure 1, it will be appreciated that when a logically equivalent signal path is provided through the logic means (i.e. when input voltages are applied to two or more of the four secon dary inputs 12-15 of the logic means 6), a train of pulses having the same frequency and phase as the The drawings originally filed were informal and the print here reproduced is taken from a later filed formal copy.
train of pulses 2 is applied to the RESET input of bistable 4, the train of pulses , being directly applied to the SET input of the bistable. The bistable 4 is therefore continually set by the leading edge of a pulse in the train , and is reset bathe leading edge of a pulse in the train of pulses output from the logic means (having the same frequency and phase as the train of pulses 02) after a time equal to half the period of the two trains of pulses /, and IZI, (since the two trains of pulses are 180 out of phase).Hence in this case there is produced at the output of the bistable 4 a train of pulses of the same frequency as the trains of pulses 0, and 2, but having a unity markto space ratio.
When no logically equivalent signal path is provided through the logic means (when less than two input voltages are applied to the four secondary inputs i2-15 of the logic means 6) no signal is applied to the RESET input of the bistable 4. The bistable is therefore continually set bathe leading edges of pulses in the train 01, without ever being reset.
Hence in this case the bistable 4 remains in one of its stable states.
The output of the bistable 4 drives the transformer coupled D.C.-D.C. converter 8, the output of which may be used to effect the operation of a safety device such as a lamp, relay, solenoid or motor (not shown). Hence power can only be supplied to the safety device if the output of the bistable is oscillating.
Referring now to Figure 3, the logic means 6 comprises 12 (i.e. 2 x C24 identical logic elements, of which one is shown in Figure 3, connected two elements in series in six parallel lines, in the same way as the switches in the network of Figure 2. Each element comprises a transformer 12, to one winding, P, of which an input train of pulses to the element is applied. The other winding of the transformer 12 is connected through a current limiting resistor R, across the base-emitter junction of a transistor T. A secondary input voltage to the element is applied at S through another current limiting resistor R2 across the collector and emitter of the transistor T.The output train of pulses from the element is derived from the collector-emitter current of the transistor across a flyback protection diode D connected between the resistor R2 and the collector of the transistor T.
Hence it will be appreciated that with an input voltage applied to the secondary input S of the element, a collector-emitter current will flow (and so an output from the element will be produced) only if a voltage greaterthan the threshold conduction voltage VBE is applied across the base-emitter junction of the transistor T. The element and the train of pulses 2 are so arrangedthatthe pulses so applied are of a voltage greater than VBE.ln this way, with a constant voltage applied to the secondary input S and the train of pulses IZI, applied to the primary input, the output of the element comprises a train of pulses of the same frequency and phase as the train of pulses The element is arranged so that no inversion is introduced into the pulses. The transformer 12 is a step down device with a ratio such that a primary input pulse of amplitude equal to the maximum possible primary input supply voltage, if applied to a series chain of two such transformers, could not produce at the output of the second transformer a pulse equal to the transistorthreshold conduction voltage VBE- The twelve such elements of the logic means 6 are connected in the same way as the switches in the network 10: two in series in six parallel lines, the secondary input applied to each stage being that with which the equivalent switch is labelled in Figure 2.
It will be appreciated that with this arrangement of elements of the logic means 6, the secondary inputs; 12-15 are not isolated. If isolation between the secondary inputs is to be preserved, a further such element may be connected in series atthe end of each a line, the secondary input of each of these six further elements being connected to a constant power supply, which may be the same as that used to supply the clock generator 2.

Claims (9)

1. A monitoring apparatus comprising: bistable means having a set input, a reset input and an output; trigger means connected to said inputs of said bistable means for applying a first train of pulses to one of the said inputs of the bistable means and for applying a second train of pulses of the same frequency as and different phase to said first train of pulses to the other one of said inputs of the bistable means in response to a predetermined condition; and an output device responsive to oscillation of said bistable means between its stable states.
2. An apparatus according to claim 1 wherein said trigger means comprises: generator means which produces said first train of pulses and a third train of pulses of the same frequency and different phase; and logic means having a primary inputto which said third train of pulses is applied, m secondary inputs and an output and being arranged to produce at its output, when input signals are applied to at leastn of its secondary inputs, said second train of pulses hav- ing the same frequency and phase as said third train of pulses.
3. An apparatus according to claim 1 or 2 wherein said first and second trains of pulses are substantially 180 out of phase.
4. An apparatus according to claim 1, 2 or 3 wherein said first and second trains of pulses have mark to space ratios not less than substantially 1 to 9.
5. An apparatus according to any preceding claim wherein said output device comprises a D.C. to D.C. converter.
6. A logic element suitable for use in a monitoring apparatus according to any preceding claim having a primary input, a secondary input and an output, comprising: a transformer, across the primary winding of which is the primary input of the element; and semiconductor switch means arranged to be switched by a signal in the secondary winding of the transformer, the secondary input of the element being across said semiconductor switch means, and the output of the element being derived from the signal passing through said semiconductor switch means.
7. A monitoring apparatus according to any one of claims 2 to 5 wherein the logic means includes n x Cm logic elements according to claim 6 connected in Cm parallel lines each containingn elements in series.
8. A safety apparatus substantially as hereinbefore described with reference to the accompanying drawings.
9. A logic element substantially as hereinbefore described with reference to Figure 3 of the accompanying drawings.
GB8001507A 1979-01-17 1980-01-16 Signal monitoring circuit Expired GB2045949B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB8001507A GB2045949B (en) 1979-01-17 1980-01-16 Signal monitoring circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB7901696 1979-01-17
GB8001507A GB2045949B (en) 1979-01-17 1980-01-16 Signal monitoring circuit

Publications (2)

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GB2045949A true GB2045949A (en) 1980-11-05
GB2045949B GB2045949B (en) 1983-02-23

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2242086A (en) * 1990-02-16 1991-09-18 Hitachi Europ Ltd Logic circuit device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2242086A (en) * 1990-02-16 1991-09-18 Hitachi Europ Ltd Logic circuit device
GB2242086B (en) * 1990-02-16 1994-03-02 Hitachi Europ Ltd Logic circuit device

Also Published As

Publication number Publication date
GB2045949B (en) 1983-02-23

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Legal Events

Date Code Title Description
732 Registration of transactions, instruments or events in the register (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee