GB2038033A

GB2038033A - Microprocessor fault protection

Info

Publication number: GB2038033A
Application number: GB7939671A
Authority: GB
Original assignee: NSM Apparatebau GmbH and Co KG
Current assignee: NSM Apparatebau GmbH and Co KG
Priority date: 1978-11-27
Filing date: 1979-11-16
Publication date: 1980-07-16
Also published as: CH649177A5; GB2038033B; DE2851190B2; DE2851190C3; NL7908537A; ES486232A1; DE2851190A1

Abstract

A circuit arrangement incorporates a microprocessor for controlling, e.g. a vending machine. Outputs (5, 11, 15) of the microprocessor (2) are connected to intermediate circuits (6, 12, 16) each associated with consumer devices controlled via their respective outputs (7, 13, 17). A fault protective circuit is connected to an output (19) of the microprocessor (2) so that, in the event of a fault in the microprocessor (2), the various intermediate circuits (6, 12, 16) are disconnected via control leads (19a, 19b, 19c). <IMAGE>

Description

SPECIFICATION A circuit arrangement incorporating a microprocessor computer for controlling a consumer device The present invention relates to a circuit arrangement incorporating a microprocessor computer for controlling a consumer device or devices in which the outputs of the microprocessor computer are connected via corresponding intermediate components to the consumer device(s).

In such a known arrangement the consumer devices such as e.g. motors, relays or lamps, are controlled, via a corresponding intermediate component such as e.g. amplifiers, intermediate storage means or decoders, by a microprocessor computer, which may also be replaced by a microcomputer, a minicomputer or an integrated circuit. With the occurrence of a fault in such a circuit, which generally occurs in the microprocessor computer itself, the consumer devices are uncontrolled which may lead to serious sequence faults, for example, burnt-out magnets and motors, nonsensical lighting up of indicating lamps and, especially in coin feed gaming devices promising a-win, an undesired emptying of the coin stacking tubes. These sequence faults involve a considerable expenditure in removing them.

Therefore, the object of the invention is in a simple manner to prevent the aforesaid sequence faults in a circuit arrangement incorporating a microprocessor computer.

According to the present invention there is provided a circuit arrangement incorporating a microprocessor computer for controlling a consumer device or devices in which the outputs of the microprocessor computer are connected to the consumer(s) via a corresponding intermediate components, wherein all of the outputs of the microprocessor computer are adapted to be cut out by a fault protective circuit incorporated in a common control lead to intermediate components of the individual consumer(s).

In further development of the invention the fault protective circuit comprises a first capacitor connected to the base of a transistor, the emitter of which is connected to the negative rail and the collector of which, via resistor, is connected to the positive rail of the supply voltage, a second capacitor connected in parallel with the transistor and the resistor. A connecting lead, from the junction between the transistor and the resistor, leads to the second capacitor and to a Schmitt trigger, and a diode is connected from the negative rail of the base of the transistor.

When switching on the fault protective circuit when the second capacitor is still discharged, in order to provide a voltage at the input of the Schmitt trigger which is immediately high enough and thereby to prevent the occurrence of switching problems, the second capacitor is preferably located between the positive lead of the supply voltage and the connecting lead to the Schmitt trigger.

When the microprocessor computer operates satisfactorily, it produces a permanent train of pulses which are presented to the fault protective circuit via a control lead. Only with the present of these pulses at the fault protective circuit are all of the outputs of the microprocessor computer switched on. The microprocessor computer tests as to whether the individual functions are in order, and if all individual functions are operating satisfactorily, then a pulse is produced. Repeated testing of the individual functions hence produces a series of pulses. Thus, if a fault occurs in the microprocessor computer, then no more pulses are applied to the fault protective circuit whereby this immediately blocks all the outputs of the microprocessor computer.This ensures that no sequence faults can occur at the consumer devices which would otherwise cause considerable damage.

The invention will be described further, by way of example, with reference to the accompanying drawings, in which:~ Fig. 1 is a circuit diagram in accordance with an embodiment of the invention; and Fig. 2 illustrates the different voltage waveforms for the circuit of Fig. 1.

A microprocessor computer 2, which is connected to a positive rail 3 and a negative rail 4 of the supply voltage, receives its instrucrions via inputs 1. An output 5 of the microprocessor computer 2 leads to an intermediate storage means 6, from which several leads 7 lead to consumers, not shown individually. An output lead 7a of the intermediate storage means 6 is connected via a resistor 8 to the base of a transistor 9, the emitter of which is connected to the negative rail 4 of the supply voltage and the collector of which is connected to an electromagnet 10 which is connected to the positive rail 3 of the supply voltage. An output 1 1 of the microprocessor computer 2 leads to an amplifier 12 from which several leads 13 lead to consumers, not shown individually. An output lead 1 3a from amplifier 12 is connected to a motor 14.

Moreover, an output 1 5 of the microprocessor computer 2 leads to a decoder 16 from which also several leads 17 extend to consumers, not shown individually. An output lead 1 7a from decoder 1 6 is connected to a lamp 18. It is, of course, also possible for further outputs to emanate from the microprocessor computer 2 and which, via corresponding intermediate components, control further consumers.

Further, a control lead 19 from the microprocessor computer 2 is connected to a fault protection circuit 20 which is connected by means of corresponding leads 1 9a, 1 9b, 1 9c to the intermediate storage means 6, the amplifier 12, and the decoder 16, respectively. The circuit 20 is comprised of a first capacitor 22 connected to the base of a transistor 21 , the emitter of which is connected to the negative rail 4 and the collector of which is connected to the positive rail 3 via a resistor 23. From the negative rail 4 a lead 24 incorporating a diode 25 leads to the junction 26 between the capacitor 22 and the base of the transistor 21.Parallel to the transistor 21 and the resistor 23 there is connected a lead 27 incorporating a second capacitor 28 between the negative rail 4 and the positive rail 3 of the supply voltage, From the junction 29 between the transistor 21 and the resistor 23 there extends a connecting lead 30 to the junction 31 of the lead 27, whereby the junction 31 is connected to a Schmitt trigger 32 from which the control lead 19 is led to the intermediate components 6, 1 2, 1 6.

When there is no fault in the microprocessor computer 2, a voltage pulse U5 (see Fig.2), appears regularly on the control lead 19 which is connected to the base of the transistor 21, via the capacitor 22, causing the transistor 21 to be pulse-conductive. This causes the second capacitor 28 to be pulse-conductive to its supply voltage.Thus, if the collector voltage Uc of the transistor 21 (see Fig. 2) is low enough, i.e. the collector voltage U, of the transistor 21 is lower than the switching threshold voltage U5 of the Schmitt trigger 32, then the output voltage Us is switched on at the Schmitt trigger 32, so that the intermediate components 6, 12, 1 6 and hence the consumers 10, 14, 1 8 are connected in circuit.

The diode 25 prevents the pulse at the base of the transistor 21 from being rectified whereby the transistor 21 is permanently conducting.

If, on the other hand, a fault occurs in the microprocessor computer 2, then the voltage pulse U5 no longer appears at the capacitor 22, whereby the transistor 21 is no longer pulseconductive, hence, the capacitor 28 is discharged via the resistor 23. At the same time the voltage at the input of the Schmitt trigger 32 rises, i.e. the collector voltage Uz of the transistor 21 exceeds the circuit breaking threshold voltage Uau of the Schmitt trigger 32 and hence the output voltage Us thereof to zero, so that the intermediate components 6, 12, 1 6, and hence the consumers 10, 14, 18 are switched off.

Claims

1. A circuit arrangement incorporating a microprocessor computer for controlling a consumer device or devices in which the outputs of the microprocessor computer are connected to the consumer(s) via corresponding intermediate components, wherein all of the outputs of the microprocessor computer are adapted to be cut out by a fault protective circuit incorporated in a common control lead to intermediate components of the individual consumer(s).

2. A circuit arrangement according to claim 1 in which the fault protective circuit is comprised of a first capacitor connected to the base of a transistor the emitter of which is connected to the negative rail of the supply voltage and the collector of which is connected via a resistor to the positive rail of the supply voltage, a second capacitor connected in parallel with the transistor and the resistor a connecting lead, branching off from the junction between the transistor and the resistor, which leads, via a junction to the second capacitor, and to a Schmitt trigger, and a diode connected from the negative rail to the base of the transistor.

3. A circuit arrangement according to claim 2, in which the second capacitor is located between the positive rail of the supply voltage arid the junction of the connecting lead to the Schmitt trigger.

4. A circuit arrangement substantially as herein described with reference to and as illustrated in the accompanying drawings.