GB2032689A - Multilayer capacitors - Google Patents
Multilayer capacitors Download PDFInfo
- Publication number
- GB2032689A GB2032689A GB7841677A GB7841677A GB2032689A GB 2032689 A GB2032689 A GB 2032689A GB 7841677 A GB7841677 A GB 7841677A GB 7841677 A GB7841677 A GB 7841677A GB 2032689 A GB2032689 A GB 2032689A
- Authority
- GB
- United Kingdom
- Prior art keywords
- capacitor
- electrode
- electrodes
- ceramic
- sheets
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 title claims description 58
- 239000000919 ceramic Substances 0.000 claims abstract description 23
- 239000003985 ceramic capacitor Substances 0.000 claims abstract description 11
- 238000000034 method Methods 0.000 claims description 7
- 239000003973 paint Substances 0.000 claims description 7
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 6
- 229910010293 ceramic material Inorganic materials 0.000 claims description 6
- 238000004519 manufacturing process Methods 0.000 claims description 6
- 229910052709 silver Inorganic materials 0.000 claims description 6
- 239000004332 silver Substances 0.000 claims description 6
- 239000011248 coating agent Substances 0.000 claims description 4
- 238000000576 coating method Methods 0.000 claims description 4
- 238000007650 screen-printing Methods 0.000 claims description 4
- 229910002113 barium titanate Inorganic materials 0.000 claims description 3
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 claims description 3
- 239000007772 electrode material Substances 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 239000010931 gold Substances 0.000 claims description 2
- 239000011347 resin Substances 0.000 claims description 2
- 229920005989 resin Polymers 0.000 claims description 2
- 238000010276 construction Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/30—Stacked capacitors
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
A multilayer ceramic capacitor has electrode patterns (7, 7') which are parallel sided and which completely cross one another to form an area (11) of overlap shaped like a parallelogram. This minimises the risk of misregistration of the ceramics of the stack affecting the nominal capacitance value. <IMAGE>
Description
SPECIFICATION
Multilayer capacitors
This invention relates to capacitors, particularly but not exclusively those formed by several interleaved electrodes and dielectric layers which are stacked on top of one another, such as multilayer ceramic capacitors.
A multilayer ceramic capacitor is shown in
Fig. 1 of the accompanying drawings. The capacitor has a ceramic material to form the dielectric layers 1 and currently manufacture such capacitors using a silk screen-printing technique to print the electrodes 2a and 2b onto the ceramic dielectric layers 1. As can be seen in Fig. 1 alternate electrodes 2aterminate at the righthand end face 3 but do not extend completely to the lefthand face 4.
Likewise the alternate electrodes 2b extend to the lefthand end face 4 but do not reach the end face 3. In this way the electrodes 2a and 2b can be electrically interconnected by for example conductive paint applied to the respective end of faces 3 and 4 to form two electrically insulated sets of electrodes 2a and 2b.
The electrodes are of rectangular form and cover the whole or part of the area of the adjacent ceramic dielectric substrate, except for the end region as described above. In order to manufacture these capacitors in quantity we use a screen-printing technique to print a large number of electrodes side by side on a sheet of green (unfired) ceramic. We print a second sheet likewise but arranged so that when the first and second sheets lie in register one on the other the individual electrodes on the upper sheet partially overlie the corresponding electrodes on the lower sheet, thus to produce a staggered relationship as is shown in the two uppermost electrodes in Fig.
1.
Further sheets are similarly screen-printed until the number of sheets corresponds to the desired number of electrodes in each capacitor. Thus if each capacitor is to have say 1 6 electrodes there will be 1 6 such sheets and if each sheet has say 200 electrodes printed on it then this will make 200 capacitors.
In practice extra blank ceramic sheets are applied on the top and the bottom of the stack in order to protect the outer electrodes and to give an adequate voltage margin.
We also manufacture these capacitors in quantity by making the ceramic dielectrics of a shape and size suitable for an individual capacitor, in contrast to the technique described above where a large number of electrodes are formed on one dielectric sheet which is subsequently cut. The individual ceramic sheets are likewise stacked one on top of the other in such a way that the staggered electrode arrangement as shown in Fig. 1 is still achieved.
In practice we have found both these techniques, particularly with the smaller capacitance values, produce a considerable spread of capacitance values around the nominal designed value owing to difficulties in maintaining strict alignment of the electrodes when the ceramic sheets are stacked one on top of the other. As can be envisaged any lateral translation of these sheets, particularly for small capacitance values where the electrodes are correspondingly small, produces a change in the capacitance value proportional to the amount of the misalignment in comparison with the width of the electrodes. For example some small capacitors may have an electrode width of only 20 thou. or even 10 thou., and so an error in alignment of the electrodes of one or two thou. can produce a percentage error in the final capacitance value of up to 20%.
It is an object of the present invention to try to minimise this problem.
According to the present invention there is provided a capacitor comprising first and second electrodes separated by a dielectric layer, each electrode crossing and extending beyond the other electrode and being parallel sided parallel to the respective crossing direction.
There can be a stack of first and second electrodes, one above the other, the first electrodes being connected electrically in parallel and insulated from the second electrodes also connected electrically in parallel.
The electrodes can be formed by conductive films deposited on and carried by respective dielectric layers. Preferably the capacitor has a generally rectangular configuration and the first and second electrodes cross one another generally diagonally of the rectangle. Connections to the electrodes can be made by way of respective conductive strips lying in the plane of the corresponding electrodes and extending along and adjacent the respective different edges of the capacitor, preferably the opposite edges.
In order that the invention can be clearly understood reference will now be made to the accompanying drawings in which: Figure 1 as already explained, shows a multilayer ceramic capacitor chip of known construction,
Figures 2A and 2B show, respectively, first and second electrode configurations for a multilayer ceramic capacitor according to an embodiment of the present invention,
Figure 3 shows the assembly of the first and second electrode configurations of Figs.
2A and 2B, and
Figure 4 shows an extension of the embodiment of Figs. 2 and 3 to a production technique in which a number of electrode configurations are printed on a single ceramic sheet.
Referring now to Fig. 2A there is shown a sheet 5 of dielectric ceramic material, such as barium titanate, having a first electrode pat tern 6 screen-printed thereon. The pattern has a limb 7 extending generally diagonally of the rectangular dielectric 5 connected by a connection portion to a conductive strip portion 9 extending along and adjacent one edge 10 of the rectangular dielectric. The portion 9 need not extend the whole length of the edge 1 0.
Referring to Fig. 2B there is shown a similar rectangular dielectric ceramic 5' carrying a second electrode pattern 6' which is a mirror image of the electrode pattern 6. It has an electrode limb 7' connected by a connection portion 8' to a strip portion 9' adjacent edge
10'.
The electrode material can be any suitable conductive ink currently used in the manufacture of multilayer ceramic capacitors, such as a platinum-palladium-gold ink screen-printed onto the ceramic material in the green state.
Referring now to Fig. 3 the ceramic sheets 5 and 5' are laid one on top of the other so that the electrode limbs 7 and 7' cross one another completely and extend beyond each other forming an area 11 of complete overlap between the limbs 7 and 7' which has the shape of a parallelogram.
Should the ceramic sheets 5 and 5' not be exactly in register, of if the electrode patterns 6 and 6' are not printed exactly symmetrically on their respective dielectric sheets, then providing the limbs 7 and 7' completely cross one another leaving a parallelogram area of overlap, this area of overlap will remain unchanged in size and hence the capacitance value will also remain unchanged.
It can- therefore be seen that this configuration for the electrode patterns enables a capacitor to be formed whose capacitance value is not sensitive to misregistration of the electrode patterns one with the other.
As can be seen the ceramic sheet 5 acts as the dielectric layer between the first electrode limb 7 and the second electrode limb 7'. In practice a stack of ceramic sheets have electrode patterns alternately lefthand and righthand as shown in Fig. 3, with the associated conductive strips 9 and 9' lying respectively at the lefthand side 10 and righthand side 10' of the capacitor. The stack is compressed and fired.
Subsequently the conductive strips 9 are all connected together by a coating of silver paint on the lefthand side 10 of the capacitor and likewise the conductive strips 9' are connected by a coating of silver paint of the righthand side 10' of the capacitor. In this format the chip capacitor is a saleable item.
However external connection terminals can then be soldered to the lefthand and righthand sides of the capacitor and the capacitor finally encapsulated in, for example, resin.
The technique for making the capacitor described with reference to Figs. 2 and 3 involves making individual barium titanate sheets and screen-printing each one with the required electrode pattern, either righthand or lefthand. However it is also possible to screenprint a large number of similar electrode patterns on two large sheets of ceramic material so that when the sheets are placed one on top of the other in register a number of capacitors similar to that shown in Fig. 3 are formed.
This is described in greater detail with reference to Fig. 4. Only part of one row of such an electrode pattern is shown. An upper ceramic sheet 1 2 carries the electrode patterns 1 3, 14, 1 5 and 1 6 and an underneath ceramic sheet (not clearly visible) carries the electrode patterns 1 7, 1 8, 1 9 and 20. In practice there would be several such rows of patterns on each sheet (only one row has been shown for simplicity) and the rows would also be much longer with a much larger number of patterns in each row, as indicated by the jagged righthand end of the row illustrated.
A number of such sheets would be laid one on top of the other to produce a stack which is then subsequently pressed and cut into individual capacitor stacks along lines such as 21 and 22. The individual capacitors are then fired and the lefthand and righthand conductive strips interconnected by means of silver paint and subsequently processed in the same way as the capacitor described with reference to Figs. 2 and 3.
CLAIMS 24 Oct 1978 1. A capacitor comprising first and second electrodes separated by a dielectric layer, each electrode crossing and extending beyond the other electrode and being parallel sided parallel to the respective crossing direction.
2. A capacitor as claimed in claim 1, having a stack of first and second electrodes, one above the other, the first electrodes being connected electrically in parallel and insulated from the second electrodes which are also connected electrically in parallel.
3. A capacitor as claimed in claim 1 or claim 2, wherein the first and second electrodes are formed by conductive films deposited and carried by respective dielectric layers.
4. A capacitor as claimed in claim 1, claim 2 or claim 3 wherein the capacitor has a generally rectangular configuration and the first and second electrodes cross one another generally diagonally of the rectangle.
5. A capacitor as claimed in claim 4, wherein the first and second electrodes are connected with respective conductive strips in the plane of the corresponding electrode extending along and adjacent respective different edges of the capacitor.
6. A capacitor as claimed in any preceding claim, in the form of a multilayer ceramic capacitor.
7. A multilayer ceramic capacitor substantially as hereinbefore described with reference to Figs. 2, 3 and 4 of the accompanying drawings.
**WARNING** end of DESC field may overlap start of CLMS **.
Claims (3)
1. A capacitor comprising first and second electrodes separated by a dielectric layer, each electrode crossing and extending beyond the other electrode and being parallel sided parallel to the respective crossing direction.
2. A capacitor as claimed in claim 1, having a stack of first and second electrodes, one above the other, the first electrodes being connected electrically in parallel and insulated from the second electrodes which are also connected electrically in parallel.
3. A capacitor as claimed in claim 1 or claim 2 wherein the first and second electrodes are screen-printed on the respective dielectric layers.
3. A capacitor as claimed in claim 1 or claim 2, wherein the first and second electrodes are formed by conductive films deposited and carried by respective dielectric layers.
4. A capacitor as claimed in claim 1, claim 2 or claim 3 wherein the capacitor has a generally rectangular configuration and the first and second electrodes cross one another generally diagonally of the rectangle.
5. A capacitor as claimed in claim 4, wherein the first and second electrodes are connected with respective conductive strips in the plane of the corresponding electrode extending along and adjacent respective different edges of the capacitor.
6. A capacitor as claimed in any preceding claim, in the form of a multilayer ceramic capacitor.
7. A multilayer ceramic capacitor substantially as hereinbefore described with reference to Figs. 2, 3 and 4 of the accompanying drawings.
CLAIMS 20 Mar 1979
1. A capacitor comprising first and second electrodes formed on and carried by respective dielectric layers, which have been subsequently stacked one on top of the other, each electrode crossing and extending beyond the other electrode in both opposite directions and being parallel sided parallel to the respective crossing direction.
2. A capacitor as claimed in claim 1, having a plurality of first and second electrodes and respective dielectic layers stacked, one above the other, the first electrodes being connected electrically in parallel and insulated by the dielectric layers from the second electrodes which are also connected electrically in parallel.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB7841677A GB2032689B (en) | 1978-10-24 | 1978-10-24 | Multilayer capacitors |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB7841677A GB2032689B (en) | 1978-10-24 | 1978-10-24 | Multilayer capacitors |
Publications (2)
Publication Number | Publication Date |
---|---|
GB2032689A true GB2032689A (en) | 1980-05-08 |
GB2032689B GB2032689B (en) | 1983-06-29 |
Family
ID=10500539
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB7841677A Expired GB2032689B (en) | 1978-10-24 | 1978-10-24 | Multilayer capacitors |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2032689B (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2174842A (en) * | 1985-04-19 | 1986-11-12 | Musham John Robin | Monolithic ceramic capacitor for high frequency applications |
US5040093A (en) * | 1989-03-03 | 1991-08-13 | U.S. Philips Corp. | Capacitor and method of manufacturing same |
US6661640B2 (en) * | 2001-08-03 | 2003-12-09 | Tdk Corporation | Multilayer ceramic electronic device |
DE102006013227A1 (en) * | 2005-11-11 | 2007-05-16 | Epcos Ag | Electrical multilayer component |
EP4358686A1 (en) * | 2022-10-17 | 2024-04-24 | QuantWare Holding B.V. | Josephson travelling wave parametric amplifier and manufacturing method thereof |
-
1978
- 1978-10-24 GB GB7841677A patent/GB2032689B/en not_active Expired
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2174842A (en) * | 1985-04-19 | 1986-11-12 | Musham John Robin | Monolithic ceramic capacitor for high frequency applications |
US5040093A (en) * | 1989-03-03 | 1991-08-13 | U.S. Philips Corp. | Capacitor and method of manufacturing same |
US6661640B2 (en) * | 2001-08-03 | 2003-12-09 | Tdk Corporation | Multilayer ceramic electronic device |
DE102006013227A1 (en) * | 2005-11-11 | 2007-05-16 | Epcos Ag | Electrical multilayer component |
EP4358686A1 (en) * | 2022-10-17 | 2024-04-24 | QuantWare Holding B.V. | Josephson travelling wave parametric amplifier and manufacturing method thereof |
WO2024083739A1 (en) * | 2022-10-17 | 2024-04-25 | Quantware Holding B.V. | Josephson travelling wave parametric amplifier and manufacturing method thereof |
Also Published As
Publication number | Publication date |
---|---|
GB2032689B (en) | 1983-06-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |