GB2018021A - Uncommitted logic cells - Google Patents

Uncommitted logic cells

Info

Publication number
GB2018021A
GB2018021A GB7908301A GB7908301A GB2018021A GB 2018021 A GB2018021 A GB 2018021A GB 7908301 A GB7908301 A GB 7908301A GB 7908301 A GB7908301 A GB 7908301A GB 2018021 A GB2018021 A GB 2018021A
Authority
GB
United Kingdom
Prior art keywords
transistors
cells
individual
source
drain terminals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB7908301A
Other versions
GB2018021B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Racal Microelectric Systems Ltd
Original Assignee
Racal Microelectric Systems Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Racal Microelectric Systems Ltd filed Critical Racal Microelectric Systems Ltd
Priority to GB7908301A priority Critical patent/GB2018021B/en
Publication of GB2018021A publication Critical patent/GB2018021A/en
Application granted granted Critical
Publication of GB2018021B publication Critical patent/GB2018021B/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118Masterslice integrated circuits
    • H01L27/11803Masterslice integrated circuits using field effect technology
    • H01L27/11807CMOS gate arrays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733Controllable logic circuits
    • H03K19/1735Controllable logic circuits by wiring, e.g. uncommitted logic arrays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B20/00Read-only memory [ROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

In an uncommitted logic array each cell comprises a plurality of transistors arranged in a symmetrical pattern. Four pairs of complementary IGFETS (6A, 8A, and C) are arranged in the concentric pattern shown. In each pair of transistors the gates are linked to a common terminal (24A), the outer device has individual source and drain terminals, and the inner device has source and drain terminals (32A, 30A) one (32A) being individual to the device and the other being shared with the internal transistor of the adjacent pair. A central power terminal 34 two earth terminals (36, 38) and a plurality of peripheral buried connections (64) are also provided. A customised metallisation layer may be designed to commit the array to the desired logic function, the layout of the cells providing good packing density while facilitating the interconnection of devices within the cell and also to other cells. <IMAGE>
GB7908301A 1978-04-01 1979-03-09 Uncommitted logic cells Expired GB2018021B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB7908301A GB2018021B (en) 1978-04-01 1979-03-09 Uncommitted logic cells

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB1282978 1978-04-01
GB7908301A GB2018021B (en) 1978-04-01 1979-03-09 Uncommitted logic cells

Publications (2)

Publication Number Publication Date
GB2018021A true GB2018021A (en) 1979-10-10
GB2018021B GB2018021B (en) 1982-10-13

Family

ID=26249304

Family Applications (1)

Application Number Title Priority Date Filing Date
GB7908301A Expired GB2018021B (en) 1978-04-01 1979-03-09 Uncommitted logic cells

Country Status (1)

Country Link
GB (1) GB2018021B (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2121601A (en) * 1982-06-01 1983-12-21 Standard Telephones Cables Ltd Uncommitted logic integrated circuit array
GB2168840A (en) * 1984-08-22 1986-06-25 Plessey Co Plc Customerisation of integrated logic devices
US4701778A (en) * 1984-06-29 1987-10-20 Fujitsu Limited Semiconductor integrated circuit having overlapping circuit cells and method for designing circuit pattern therefor
EP0466463A1 (en) * 1990-07-10 1992-01-15 Kawasaki Steel Corporation Basic cell and arrangement structure thereof
EP0939445A2 (en) * 1998-02-26 1999-09-01 Nec Corporation Semiconductor integrated circuit device and method of arranging functional cell

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2121601A (en) * 1982-06-01 1983-12-21 Standard Telephones Cables Ltd Uncommitted logic integrated circuit array
US4701778A (en) * 1984-06-29 1987-10-20 Fujitsu Limited Semiconductor integrated circuit having overlapping circuit cells and method for designing circuit pattern therefor
GB2168840A (en) * 1984-08-22 1986-06-25 Plessey Co Plc Customerisation of integrated logic devices
EP0466463A1 (en) * 1990-07-10 1992-01-15 Kawasaki Steel Corporation Basic cell and arrangement structure thereof
US5444275A (en) * 1990-07-10 1995-08-22 Kawasaki Steel Corporation Radial gate array cell
EP0939445A2 (en) * 1998-02-26 1999-09-01 Nec Corporation Semiconductor integrated circuit device and method of arranging functional cell
EP0939445A3 (en) * 1998-02-26 2001-10-24 Nec Corporation Semiconductor integrated circuit device and method of arranging functional cell

Also Published As

Publication number Publication date
GB2018021B (en) 1982-10-13

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee