GB1555364A - Electronic circuit packaging arrangement and method - Google Patents
Electronic circuit packaging arrangement and methodInfo
- Publication number
- GB1555364A GB1555364A GB20209/76A GB2020976A GB1555364A GB 1555364 A GB1555364 A GB 1555364A GB 20209/76 A GB20209/76 A GB 20209/76A GB 2020976 A GB2020976 A GB 2020976A GB 1555364 A GB1555364 A GB 1555364A
- Authority
- GB
- United Kingdom
- Prior art keywords
- circuit device
- package
- electronic circuit
- circuit packaging
- packaging arrangement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G04—HOROLOGY
- G04G—ELECTRONIC TIME-PIECES
- G04G17/00—Structural details; Housings
- G04G17/02—Component assemblies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01039—Yttrium [Y]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01087—Francium [Fr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electric Clocks (AREA)
- Light Receiving Elements (AREA)
- Oscillators With Electromechanical Resonators (AREA)
- Electromechanical Clocks (AREA)
Abstract
CIRCUIT DEVICE PACKAGING TECHNIQUE The package of a circuit device such as an integrated semiconductor circuit device is molded into a special shape to fit its function. The package includes leads extending from the circuit device to selected positions for interconnection both inside and outside the volume of the package such as for switch points or attachment of other electrical components to the circuit device. Support members or cavities are simultaneously molded directly into the package for the mechanical support of the other electrical, magnetic, optical or optoelectronic components. Also, optical elements such as lenses or filters may be molded directly into the package to carry out optical functions.
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US58162075A | 1975-05-29 | 1975-05-29 | |
US05/581,605 US4012723A (en) | 1975-05-29 | 1975-05-29 | Magnetic bubble memory packaging arrangement and its method of fabrication |
US05/581,604 US3986334A (en) | 1975-05-29 | 1975-05-29 | Electronic watch and its method of fabrication |
US05/581,603 US3986335A (en) | 1975-05-29 | 1975-05-29 | Electronic watch module and its method of fabrication |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1555364A true GB1555364A (en) | 1979-11-07 |
Family
ID=27504954
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB20209/76A Expired GB1555364A (en) | 1975-05-29 | 1976-05-17 | Electronic circuit packaging arrangement and method |
Country Status (7)
Country | Link |
---|---|
JP (1) | JPS51145370A (en) |
BR (1) | BR7603423A (en) |
CA (1) | CA1058312A (en) |
DE (1) | DE2623715A1 (en) |
FR (1) | FR2356339A1 (en) |
GB (1) | GB1555364A (en) |
IT (1) | IT1062029B (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2000336B (en) * | 1977-06-20 | 1982-07-07 | Hitachi Ltd | Electronic device and method of fabricating the same |
EP0438905A2 (en) * | 1990-01-26 | 1991-07-31 | STMicroelectronics, Inc. | IC package having replaceable backup battery |
GB2302996A (en) * | 1996-07-19 | 1997-02-05 | Delta Schoeller Ltd | Electrical circuit |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5227555A (en) * | 1975-08-27 | 1977-03-01 | Seiko Instr & Electronics | Electronic timekeeper |
US4064552A (en) * | 1976-02-03 | 1977-12-20 | Angelucci Thomas L | Multilayer flexible printed circuit tape |
JPS5424673A (en) * | 1977-07-27 | 1979-02-24 | Seiko Epson Corp | Electronic wristwatch |
CH623452B (en) * | 1977-12-14 | Fontainemelon Horlogerie | METHOD OF MANUFACTURING AN ELECTRONIC CLOCK PART MODULE AND CLOCK PART MODULE OBTAINED BY IMPLEMENTATION OF THIS PROCESS. | |
JPS56122972U (en) * | 1980-02-19 | 1981-09-18 | ||
EP0105841A1 (en) * | 1982-10-05 | 1984-04-18 | Ebauches Electroniques S.A. | Strip used for manufacturing supports of components for watches |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3611061A (en) * | 1971-07-07 | 1971-10-05 | Motorola Inc | Multiple lead integrated circuit device and frame member for the fabrication thereof |
US3784725A (en) * | 1972-07-24 | 1974-01-08 | Solitron Devices | Electronic hybrid package |
-
1976
- 1976-04-27 CA CA251,202A patent/CA1058312A/en not_active Expired
- 1976-05-17 GB GB20209/76A patent/GB1555364A/en not_active Expired
- 1976-05-26 IT IT49680/76A patent/IT1062029B/en active
- 1976-05-26 DE DE19762623715 patent/DE2623715A1/en not_active Ceased
- 1976-05-28 BR BR3423/76A patent/BR7603423A/en unknown
- 1976-05-28 JP JP51062158A patent/JPS51145370A/en active Pending
- 1976-05-31 FR FR7616344A patent/FR2356339A1/en active Granted
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2000336B (en) * | 1977-06-20 | 1982-07-07 | Hitachi Ltd | Electronic device and method of fabricating the same |
EP0438905A2 (en) * | 1990-01-26 | 1991-07-31 | STMicroelectronics, Inc. | IC package having replaceable backup battery |
EP0438905A3 (en) * | 1990-01-26 | 1993-02-03 | Sgs-Thomson Microelectronics, Inc. | Ic package having replaceable backup battery |
GB2302996A (en) * | 1996-07-19 | 1997-02-05 | Delta Schoeller Ltd | Electrical circuit |
GB2302996B (en) * | 1996-07-19 | 1998-07-22 | Delta Schoeller Ltd | Electrical circuit |
Also Published As
Publication number | Publication date |
---|---|
FR2356339B1 (en) | 1983-03-04 |
CA1058312A (en) | 1979-07-10 |
DE2623715A1 (en) | 1977-01-20 |
BR7603423A (en) | 1976-12-21 |
JPS51145370A (en) | 1976-12-14 |
IT1062029B (en) | 1983-06-25 |
FR2356339A1 (en) | 1978-01-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed [section 19, patents act 1949] | ||
PCNP | Patent ceased through non-payment of renewal fee |