GB1468988A - Simulation system - Google Patents
Simulation systemInfo
- Publication number
- GB1468988A GB1468988A GB5335374A GB5335374A GB1468988A GB 1468988 A GB1468988 A GB 1468988A GB 5335374 A GB5335374 A GB 5335374A GB 5335374 A GB5335374 A GB 5335374A GB 1468988 A GB1468988 A GB 1468988A
- Authority
- GB
- United Kingdom
- Prior art keywords
- program
- cpa
- instruction
- halt
- time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M3/00—Automatic or semi-automatic exchanges
- H04M3/22—Arrangements for supervision, monitoring or testing
- H04M3/26—Arrangements for supervision, monitoring or testing with means for applying test signals or for measuring
- H04M3/28—Automatic routine testing ; Fault testing; Installation testing; Test methods, test equipment or test arrangements therefor
- H04M3/32—Automatic routine testing ; Fault testing; Installation testing; Test methods, test equipment or test arrangements therefor for lines between exchanges
- H04M3/323—Automatic routine testing ; Fault testing; Installation testing; Test methods, test equipment or test arrangements therefor for lines between exchanges for the arrangements providing the connection (test connection, test call, call simulation)
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
- G06F11/3457—Performance evaluation by simulation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/20—Design optimisation, verification or simulation
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09B—EDUCATIONAL OR DEMONSTRATION APPLIANCES; APPLIANCES FOR TEACHING, OR COMMUNICATING WITH, THE BLIND, DEAF OR MUTE; MODELS; PLANETARIA; GLOBES; MAPS; DIAGRAMS
- G09B9/00—Simulators for teaching or training purposes
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Signal Processing (AREA)
- Geometry (AREA)
- Evolutionary Computation (AREA)
- Business, Economics & Management (AREA)
- Educational Administration (AREA)
- Educational Technology (AREA)
- Quality & Reliability (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Debugging And Monitoring (AREA)
- Maintenance And Management Of Digital Transmission (AREA)
Abstract
1468988 Simulation INTERNATIONAL STANDARD ELECTRIC CORP 10 Dec 1974 [28 Dec 1973] 53353/74 Heading G4A [Also in Division H4] A data processing system includes a system computer CPa programmed to control a telecommunications switching network SN, a simulation computer CPd arranged to simulate the activity of the network under a traffic load, and an interface between the computers, the arrangement being such that when the time of occurrence of an event has to be determined the system computer is programmed to halt and the simulation computer is programmed to record the time of the halt, halt instructions being provided in the system computer program for at least some of the events at points where a halt would not be made if the system computer were controlling the network SN. The duration of a program, e.g. a program which searches for a free path in network SN, is measured by replacing the first instruction of the program and the first instruction following the program by multiple execute instructions see Specification 1,301,417 each of which controls the execution of a halt instruction and the replaced instruction of the program. A stop detector DS detects the halt instruction to produce signal AR to reset MA and block gate pt. The system computer CPa operates in response to clock pulses supplied via gate pt and is thus stopped. A counter C1G, repeatedly decremented to zero by the clock pulses, records the actual operating time of CPa (as opposed to time spent monitoring and timing the operation of CPa &c.) the signal ZRT serving to indicate that the counter contents have been decremented to zero, to reset flip-flop MA to block gate pt and thus stop CPa and the counter C1G, to increment a field in memory M to update an elapsed-time record, and to reload counter C1G, and to set flip-flop MA. In response to the detection of the halt the current elapsed time record in memory M is copied into a further memory field, the contents of counter C1G are read, and thus the start time of the path search program is calculated. Flip-flop MA is then set to restart computer CPa, which then executes the path search program, and to restart counter C1G. Any input/output instructions in the program are detected at DT to stop computer CPa and record their time of occurrence as above. Following execution of the last instruction of the path search program a further multiple execute instruction including a halt instruction and the first instruction following the program is executed to record, in the same way as above, the end time of the program. Thus by subtraction the actual duration of the program may be established and printed. During simulation computer CPa operates on data in memory M simulating the activity of the switching network rather than on the network itself.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
BE809213 | 1973-12-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1468988A true GB1468988A (en) | 1977-03-30 |
Family
ID=3860950
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB5335374A Expired GB1468988A (en) | 1973-12-28 | 1974-12-10 | Simulation system |
Country Status (3)
Country | Link |
---|---|
AU (1) | AU7589374A (en) |
FR (1) | FR2371020A1 (en) |
GB (1) | GB1468988A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2510856A1 (en) * | 1981-07-30 | 1983-02-04 | Siemens Ag | METHOD FOR PERFORMING OPERATING TESTS ON PERIPHERAL UNITS BY SIMULATION IN A TELECOMMUNICATIONS INSTALLATION, IN PARTICULAR IN A TELEPHONE SYSTEM |
GB2129587A (en) * | 1982-10-12 | 1984-05-16 | Oki Electric Ind Co Ltd | A method of and apparatus for fail-safe operation of a vehicle computer |
FR2680422A1 (en) * | 1991-08-13 | 1993-02-19 | Creusot Loire | Device for instructing maintenance and operational usage of automated hardware |
DE102004013028A1 (en) * | 2004-03-18 | 2005-10-06 | Joachim Jung | Device or system for simulating and reproducing different musical instrument sounds comprises a digital computer software program installed on server that simultaneously supplies users via network with the data required for the simulation |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113539002B (en) * | 2021-07-27 | 2023-05-05 | 广东电网有限责任公司 | Power low-voltage centralized meter reading cross-platform area operation and maintenance simulation device and method |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2052156A5 (en) * | 1969-07-24 | 1971-04-09 | Constr Telephoniques | |
ES390700A1 (en) * | 1971-04-28 | 1973-06-16 | Standard Electrica Sa | Inspection and diagnostic procedure of telephone plants using computers in real time. (Machine-translation by Google Translate, not legally binding) |
-
1974
- 1974-11-29 AU AU75893/74A patent/AU7589374A/en not_active Expired
- 1974-12-10 GB GB5335374A patent/GB1468988A/en not_active Expired
- 1974-12-27 FR FR7442982A patent/FR2371020A1/en active Granted
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2510856A1 (en) * | 1981-07-30 | 1983-02-04 | Siemens Ag | METHOD FOR PERFORMING OPERATING TESTS ON PERIPHERAL UNITS BY SIMULATION IN A TELECOMMUNICATIONS INSTALLATION, IN PARTICULAR IN A TELEPHONE SYSTEM |
GB2129587A (en) * | 1982-10-12 | 1984-05-16 | Oki Electric Ind Co Ltd | A method of and apparatus for fail-safe operation of a vehicle computer |
FR2680422A1 (en) * | 1991-08-13 | 1993-02-19 | Creusot Loire | Device for instructing maintenance and operational usage of automated hardware |
DE102004013028A1 (en) * | 2004-03-18 | 2005-10-06 | Joachim Jung | Device or system for simulating and reproducing different musical instrument sounds comprises a digital computer software program installed on server that simultaneously supplies users via network with the data required for the simulation |
Also Published As
Publication number | Publication date |
---|---|
FR2371020B1 (en) | 1980-11-07 |
AU7589374A (en) | 1976-06-03 |
FR2371020A1 (en) | 1978-06-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PCNP | Patent ceased through non-payment of renewal fee |