GB1337338A - Process for making printed circuit boards and products obtained by said process - Google Patents

Process for making printed circuit boards and products obtained by said process

Info

Publication number
GB1337338A
GB1337338A GB1337338DA GB1337338A GB 1337338 A GB1337338 A GB 1337338A GB 1337338D A GB1337338D A GB 1337338DA GB 1337338 A GB1337338 A GB 1337338A
Authority
GB
United Kingdom
Prior art keywords
circuit
metal
baked
resist
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MacDermid Inc
Original Assignee
MacDermid Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MacDermid Inc filed Critical MacDermid Inc
Publication of GB1337338A publication Critical patent/GB1337338A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/381Improvement of the adhesion between the insulating substrate and the metal by special treatment of the substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0361Stripping a part of an upper metal layer to expose a lower metal layer, e.g. by etching or using a laser
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1105Heating or thermal processing not related to soldering, firing, curing or laminating, e.g. for shaping the substrate or during finish plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1152Replicating the surface structure of a sacrificial layer, e.g. for roughening
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061Etching masks
    • H05K3/062Etching masks consisting of metals or alloys or metallic inorganic compounds
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • H05K3/182Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
    • H05K3/184Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method using masks

Abstract

1337338 Printed circuit boards MACDERMID Inc 19 June 1971 28854/71 Heading H1R A process for providing improved adhesion between a metal layer and an insulating substrate is characterized by the fact that it comprises chemically stripping the whole of the metal foil layer, e.g. of Cu or Ni from a polymerized resin substrate, e.g. of thermosetting epoxy or phenolic resin by means of an etchant. The resulting non-conductive surface is then catalysed and plated with a metal in the configuration of the desired circuit. The substrate is heated at least once after the catalysing step, e.g. to 220‹ F. for about 30 mins. and preferably also after the plating step. The circuit may be deposited by several methods. In one, after the substrate has been catalysed, a thin Cu or Ni layer of about 10 to 30 Î 10<SP>-6</SP> inches thickness is deposited over the whole surface. A masking negative resist pattern of the circuit is applied over the metal layer, the substrate then being dried and baked. Additional metal is then applied by electroplating so as to build up the conducting areas of the circuit. A resist is then applied to the exposed metal, the resist from the non-circuit portion is stripped and the initial thin electroless deposit is etched away. The resist applied to the exposed metal is then stripped and a protective metal, e.g. of gold, silver or nickel, is electrolessly or electrolytically plated on the circuit. The board is then baked. In another method, a negative resist circuit pattern is applied after the catalysing step, the board is dried and baked, and the exposed circuit area is reactivated by means of a dilute acid solution. Metal is then electrolessly plated on the circuit area, the board is dried and baked, the resist stripped and the completed board baked. Catalysis in the above processes may be carried out by means of a tin-palladium hydrosol.
GB1337338D 1971-06-19 1971-06-19 Process for making printed circuit boards and products obtained by said process Expired GB1337338A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2885471 1971-06-19

Publications (1)

Publication Number Publication Date
GB1337338A true GB1337338A (en) 1973-11-14

Family

ID=10282239

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1337338D Expired GB1337338A (en) 1971-06-19 1971-06-19 Process for making printed circuit boards and products obtained by said process

Country Status (1)

Country Link
GB (1) GB1337338A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0195332A2 (en) * 1985-03-21 1986-09-24 Bayer Ag Printed circuits
EP0197323A2 (en) * 1985-03-21 1986-10-15 Bayer Ag Printed circuits
EP0664664A1 (en) * 1994-01-24 1995-07-26 International Business Machines Corporation Depositing a conductive metal onto a substrate
US20140087152A1 (en) * 2011-05-27 2014-03-27 Ajinomoto Co., Inc. Resin composition

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0195332A2 (en) * 1985-03-21 1986-09-24 Bayer Ag Printed circuits
EP0197323A2 (en) * 1985-03-21 1986-10-15 Bayer Ag Printed circuits
EP0197323A3 (en) * 1985-03-21 1987-07-22 Bayer Ag Printed circuits
EP0195332A3 (en) * 1985-03-21 1987-08-05 Bayer Ag Printed circuits
US4728560A (en) * 1985-03-21 1988-03-01 Bayer Aktiengesellschaft Electrical printed circuit boards
EP0664664A1 (en) * 1994-01-24 1995-07-26 International Business Machines Corporation Depositing a conductive metal onto a substrate
US20140087152A1 (en) * 2011-05-27 2014-03-27 Ajinomoto Co., Inc. Resin composition
US8912279B2 (en) * 2011-05-27 2014-12-16 Ajinomoto Co., Inc. Resin composition

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee