GB1258286A - - Google Patents
Info
- Publication number
- GB1258286A GB1258286A GB1258286DA GB1258286A GB 1258286 A GB1258286 A GB 1258286A GB 1258286D A GB1258286D A GB 1258286DA GB 1258286 A GB1258286 A GB 1258286A
- Authority
- GB
- United Kingdom
- Prior art keywords
- layers
- layer
- glass
- applying
- aug
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
- H05K3/384—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0723—Electroplating, e.g. finish plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
1,258,286. Printed circuits. INTERNATIONAL BUSINESS MACHINES CORP. 13 Aug., 1969 [14 Aug., 1968], No. 40473/69. Heading H1R [Also in Division C1] An insulated multi-layer conductor device is prepared by chemically depositing a Cu layer on a substrate, e.g. alumina, then applying successively by electrolysis layers of Ni and Au, etching the metals in a desired pattern employing a photo-resist technique, applying an insulating glass layer, and applying further Cu, Ni, Au and glass layers as desired. The glass may be etched in places to connect the conductive layers. Upon completion of the formation of the desired number of conductive layers semi-conductor crystal chips may be connected to the conductors, and the whole device formed encapsulated. In a typical device the Ni and Au layers may be 2Á and 3Á thick respectively, and the glass layer about 20 Á thick.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19681765945 DE1765945A1 (en) | 1968-08-14 | 1968-08-14 | Process for the production of a printed circuit with planar conductor tracks running in several planes |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1258286A true GB1258286A (en) | 1971-12-30 |
Family
ID=5698700
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB1258286D Expired GB1258286A (en) | 1968-08-14 | 1969-08-13 |
Country Status (3)
Country | Link |
---|---|
DE (1) | DE1765945A1 (en) |
FR (1) | FR2015615A1 (en) |
GB (1) | GB1258286A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6656625B1 (en) | 1998-04-16 | 2003-12-02 | Alstom Uk Ltd. | Glass-ceramic coatings and sealing arrangements and their use in fuel cells |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4628149A (en) * | 1981-11-30 | 1986-12-09 | Nippon Electric Co., Ltd. | Substrate having a pattern of an alloy of gold and a noble and a base metal with the pattern isolated by oxides of the noble and the base metals |
-
1968
- 1968-08-14 DE DE19681765945 patent/DE1765945A1/en active Pending
-
1969
- 1969-07-08 FR FR6923616A patent/FR2015615A1/fr not_active Withdrawn
- 1969-08-13 GB GB1258286D patent/GB1258286A/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6656625B1 (en) | 1998-04-16 | 2003-12-02 | Alstom Uk Ltd. | Glass-ceramic coatings and sealing arrangements and their use in fuel cells |
Also Published As
Publication number | Publication date |
---|---|
DE1765945A1 (en) | 1971-12-02 |
FR2015615A1 (en) | 1970-04-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PCNP | Patent ceased through non-payment of renewal fee |