GB1195477A - Improvements in and relating to Analog-to-Digital Converters - Google Patents

Abstract

1,195,477. Analogue/digital counters. WESTON INDUSTRIES Inc. 22 May, 1968 [1 June 1967], No. 24352/68. Heading G4H. In a dual ramp analogue/digital converter the input signal V x (Fig. 1) is integrated for a time fixed by the count of a predetermined number of clock pulses in a counter 36, the counter then enabling a gate 22 to pass a reference signal-V A of opposite polarity to the integrator until the integrator reaches a datum level, detected by detector 25 controlling via a divider 30 the counter 39 so that clock pulses are accumulated in the counter until at least two output signals from the detector have been received . In the embodiment described the sawtooth output H of the integrator is fed to detector 25 enabled by the output G of a binary divider 40 receiving a signal from counter 36 each time it reaches a predetermined count. The detector output I terminates when the input H reaches the datum level, the width modulated pulses I being fed to the divider 30 the output J from which resets flip-flop 31 initially set by a source 32. This results in gate 33 being closed to terminate the supply of pulses to binary coded decimal counter 36. The count is displayed in decimal form by gas tubes. An offset current I B may be fed to the integrator amplifier to prevent the detector 25 being falsely triggered by negative voltage drift, noise signals or through reversal of input polarity. To prevent amplifier 14 in the integrator 13 being saturated by the continuous application of a small positive voltage across input 10, a Zener diode is included in the negative feedback circuit of the amplifier.