GB1186416A - Improvements in or relating to Electrical Intelligence Storage Equipment - Google Patents

Improvements in or relating to Electrical Intelligence Storage Equipment

Info

Publication number
GB1186416A
GB1186416A GB3905167A GB3905167A GB1186416A GB 1186416 A GB1186416 A GB 1186416A GB 3905167 A GB3905167 A GB 3905167A GB 3905167 A GB3905167 A GB 3905167A GB 1186416 A GB1186416 A GB 1186416A
Authority
GB
United Kingdom
Prior art keywords
word
store
location
testing
test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB3905167A
Inventor
Frederick Harry Bray
Robert John Mann
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Priority to GB3905167A priority Critical patent/GB1186416A/en
Priority to FR1586698D priority patent/FR1586698A/fr
Priority to BE721062D priority patent/BE721062A/xx
Publication of GB1186416A publication Critical patent/GB1186416A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/10Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns 
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q3/00Selecting arrangements
    • H04Q3/42Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Monitoring And Testing Of Exchanges (AREA)

Abstract

1,186,416. Automatic exchange systems. STANDARD TELEPHONES & CABLES Ltd. 24 Aug., 1967, No. 39051/67. Heading H4K. [Also in Division G4] In a data store having asscoiated read, write and processing circuitry, the latter is subjected to routine testing by: reading-out a word from a selected location in the store, storing the word in a temporary memory, processing the word, e.g. by inverting 0 and 1 bits and rewriting the modified word into the store at the originally selected location; reading-out the modified word and subjecting it to further processing whereby the word as originally read-out should be obtained, and writing this word back into the store; and finally reading-out the word once more, comparing it with the word stored in the temporary memory and then rewriting it again if all is well. The three stages of the test are performed during three successive access cycles of the store's address register. The test is applied whilst the store is in normal use but preferably just before a particular word location is required to be used. Alternatively the words can be tested successively during each word's "dead time ". More than one temporary memory together with additional logic can be used for processing the data words. Audible or visual alarms are given if a fault is found at any stage of the test. The invention is applicable to stores used in a general purpose computer (Fig. 1, not shown), to metering pulse stores in a telephone exchange where the processing circuitry consists in ADD 1 and SUBTRACT 1 logic (Fig. 2, not shown), or to the speech stores required at the intersections of highways in a PCM telephone system (Fig. 3, not shown). In the latter case testing takes three frames and the word location under test is busied against use by subscribers even if a conversation involving the use of this word location is in progress. Normally testing is not allowed to commence until the word location has been unused for a preset period and if the said period does not occur within a determined time testing of this location is abandoned and testing of the next location is commenced. The store may comprise a matrix of ferrite cores or be a thin film magnetic memory.
GB3905167A 1967-08-24 1967-08-24 Improvements in or relating to Electrical Intelligence Storage Equipment Expired GB1186416A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
GB3905167A GB1186416A (en) 1967-08-24 1967-08-24 Improvements in or relating to Electrical Intelligence Storage Equipment
FR1586698D FR1586698A (en) 1967-08-24 1968-08-22
BE721062D BE721062A (en) 1967-08-24 1968-09-19

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB3905167A GB1186416A (en) 1967-08-24 1967-08-24 Improvements in or relating to Electrical Intelligence Storage Equipment
FR163854 1968-08-22

Publications (1)

Publication Number Publication Date
GB1186416A true GB1186416A (en) 1970-04-02

Family

ID=26182194

Family Applications (1)

Application Number Title Priority Date Filing Date
GB3905167A Expired GB1186416A (en) 1967-08-24 1967-08-24 Improvements in or relating to Electrical Intelligence Storage Equipment

Country Status (3)

Country Link
BE (1) BE721062A (en)
FR (1) FR1586698A (en)
GB (1) GB1186416A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2325154A1 (en) * 1975-09-16 1977-04-15 Ericsson Telefon Ab L M MEMORY FAULT DETECTION CIRCUIT

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2325154A1 (en) * 1975-09-16 1977-04-15 Ericsson Telefon Ab L M MEMORY FAULT DETECTION CIRCUIT

Also Published As

Publication number Publication date
FR1586698A (en) 1970-02-27
BE721062A (en) 1969-03-19

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Legal Events

Date Code Title Description
PS Patent sealed
435 Patent endorsed 'licences of right' on the date specified (sect. 35/1949)
PLNP Patent lapsed through nonpayment of renewal fees