JPS598195A - Associative storage system - Google Patents

Associative storage system

Info

Publication number
JPS598195A
JPS598195A JP11590482A JP11590482A JPS598195A JP S598195 A JPS598195 A JP S598195A JP 11590482 A JP11590482 A JP 11590482A JP 11590482 A JP11590482 A JP 11590482A JP S598195 A JPS598195 A JP S598195A
Authority
JP
Japan
Prior art keywords
data
cell
pointer
stored
exit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11590482A
Other languages
Japanese (ja)
Inventor
Haruo Akimoto
晴雄 秋元
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP11590482A priority Critical patent/JPS598195A/en
Publication of JPS598195A publication Critical patent/JPS598195A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C15/00Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G11C15/04Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements

Landscapes

  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

PURPOSE:To access data related to given data simultaneously and efficiently, by providing pointers, which indicate the entrance and the exit of chaining of related data, in a storage cell where data is stored. CONSTITUTION:Data are stored in cells 11 of a storage device 10. An entrance pointer 12 and an exit pointer 13 are provided following each data. The address indicating the cell of data following stored data in chaining of related data is stored in the exit pointer 13. The address indicating the cell of data just preceding stored data is stored in the entrance pointer 12. Thus, the access of related data is facilitated.

Description

【発明の詳細な説明】 (1)発明の技術分野 本発明は記1麓装置内の1つのデータ全アクセスしたと
き、該データと関連するデータを同時にアクセスするこ
とができる連想記憶方式に関するものでめる。
DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to an associative memory system in which when all data in a device is accessed, data related to the data can be accessed at the same time. Melt.

(2)従来技術と問題点 従来の記1重装置においては、相互に関連のあるデータ
に対するアクセスは、関連データをアドレスの連続した
風域にまとめて格納する方式と、データとは別にデータ
の関連する・U理テーブルを用意しこれによル関連デー
タをアクセスする方式とがめる。しかし、前者は記憶装
置tの匝用効率が悪いという欠点があシ、後者はテーブ
ル領域のa埋が別に必装であるという欠点がある。
(2) Prior art and problems In conventional single-layer devices, mutually related data can be accessed in two ways: one is to store related data together in an area of continuous addresses, and the other is to store data separately from the data. Prepare a related U management table and use it to determine the method of accessing the related data. However, the former has the disadvantage that the storage device t is not efficiently used, and the latter has the disadvantage that it is necessary to fill the table area a separately.

(3)発明の目的 本発明の目的は記1意装置内の1つのデータをアクセス
したとき、該データと関連するデータを同時にかつ効率
的にアクセスできる連想記憶方式を提供することでめる
(3) Object of the Invention The object of the present invention is to provide an associative memory system that allows, when one piece of data in a storage device is accessed, simultaneously and efficiently accessing data related to that data.

(4)@明の構成 前記目的を達成するため、本発明の連想記1.を方式は
fJt故のセルより成る記憶装置において、一つのデー
タ全記憶するセルに付属し、該データに関連するデータ
全記憶する曲のセルのアドレス金示す出ロボイ/りと、
他のセルからのボイ/りによ9関連付けられる場合の他
のセルのアドレスを示す入口ポインタを設け、該装置内
の1″:)のデータを参照したとき、該データを記憶す
るセルに付属するボイ/りを介して該データの関連デー
タをボイ/りの連鎖によって参照できるようにしたこと
全特徴とするものである。
(4) Structure of @Ming In order to achieve the above object, the associative notes of the present invention 1. The method is that in a storage device consisting of fJt cells, one cell that stores all the data is attached to it, and the address of the cell that stores all the data related to that data is displayed.
An entry pointer is provided that indicates the address of another cell when it is associated with a voice/receipt from another cell, and when the data of 1":) in the device is referenced, it is attached to the cell that stores the data. The main feature of this system is that data related to the data can be referenced by a chain of calls/references.

(5)発明の実施例 本発明の原理は記憶セルに関連データの連鎖の人口と出
口を示すポインタを設けることによυ、1つの配慮セル
から関連データの遅屓金たどり11つのデータに関連す
る任意のデータをアクセスできるものでぬる。
(5) Embodiments of the Invention The principle of the present invention is to trace the delay of related data from one consideration cell to 11 related data by providing pointers in storage cells that indicate the population and exit of a chain of related data. Fill in any data you have access to.

第1図は本発明の要部の記1.敏装置の#II成祝明図
である。
FIG. 1 shows the main parts of the present invention. This is the #II success map of the Min device.

同図において、記憶装置10のセA/11には記憶すべ
きデータが格納されている。この4合関連するデータは
必ずしも順番に配列される必要はない。
In the figure, data to be stored is stored in cell A/11 of the storage device 10. The data related to these four cases do not necessarily have to be arranged in order.

それぞれのデータの後に入口ポインタ12と出口ポイン
タ15を設ける。出口ポインタ13は関連データの連鎖
において、該データの次のデータのセル入口ポインタ1
2は関連データの連鎖において、該データの直前のデー
タのセルを示すアドレスが格納される。
An entry pointer 12 and an exit pointer 15 are provided after each data. The exit pointer 13 is the cell entry pointer 1 of the next data in the chain of related data.
2 stores an address indicating the cell of data immediately preceding the relevant data in the chain of related data.

1つのセルから、該セルのデータの関連データをアクセ
スする場合、入口ポインタ12または出ロボイ/り16
を用いて関連データの連鎖rたどり、該データの関連デ
ータにおける任意のデータにアクセスすることがり能と
なる。
When accessing data related to data in a cell from one cell, the entry pointer 12 or the exit pointer 16 is used.
It becomes possible to trace the chain r of related data using , and access any data in the data related to the data.

第2図は本発明の実施向の構成説明図である。FIG. 2 is an explanatory diagram of the configuration of the embodiment of the present invention.

同図において、第1図の記憶装置atioをアクセスす
るため、たとえばCPU4!の暗合に基づき、′アドレ
スレジスタ15内のアドレスをアクセスし、該セルにデ
ータレジスタ14内のブータラ連込み、または該セルデ
ータを読出しデータレジスタ14に1己1.賦させる。
In the same figure, in order to access the storage device atio of FIG. 1, for example, CPU4! Based on the code, the address in the address register 15 is accessed and the booter in the data register 14 is loaded into the cell, or the cell data is read and the data register 14 is set to 1. to be charged.

これで終!することなく、さらに関連データ全アクセス
する41!rは、 (α)関連データの連鎖を後方にたどる場合は、出口ポ
インタ16のアドレスをポインタレジスタ16ed由し
てアドレスレジスタ15に格納することにより、該出口
ポインタの示すアドレスのセルのデータがデータレジス
タ14に続出される。
This is the end! 41! Access all related data without having to do anything! (α) When following the chain of related data backwards, by storing the address of the exit pointer 16 in the address register 15 via the pointer register 16ed, the data in the cell at the address indicated by the exit pointer becomes the data. The data is continuously output to the register 14.

(b)関連データの遅Aを前方にたどる4汁は、入口ポ
インタ12のアドレス金ポインタレジスタ16に経由し
てアドレスレジスタ15に4台網することに↓υ、該入
口ポインタ12の示すアドレスのセルのデータがデータ
レジスタ14に続出される。
(b) The 4 pieces of related data that follow the delay A forward are transferred to the address register 15 via the address pointer register 16 of the entry pointer 12 ↓υ, and the address indicated by the entry pointer 12 is Cell data is successively output to the data register 14.

これで橢rせずさらに関連データをアクセスする摘片は
、以上(a)または(6)の手ノ畝t<D返す。
In this way, if you want to access the related data without deleting it, return the hand ridge t<D in (a) or (6) above.

(6)@明の効果 以上説明したように、本@明によれば、関連データのア
クセスが行なえるので、不明確なデータに対するアクセ
スが容易となシ、関連ゲータの遅蹟t#積することKよ
って、記憶装置内に一般的な区分によることなく、独特
の連想6己1意による知識区分内で連鎖的にアクセスす
ることができる。
(6) Effects of @Ming As explained above, according to this @Ming, related data can be accessed, so accessing unclear data is easy, and the delay of related gaters is increased. Therefore, it is possible to access information in a chain within a knowledge division based on a unique association, without using a general division within the storage device.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本@明の要部の構ノJ)を説明図、第2図は本
発明の実施例の構成説明図でろ91図中、10は6己1
.依装置、11はセル、12は人口ポインタ、15は出
口ポインタ、14はデータレジスタ、15はアドレスレ
ジスタ、16はポインタレジスタを示す。 特許出願人 富士通株式会社 復代理人 弁理士 1)坂 善 瀘 第1図 第2図
Figure 1 is an explanatory diagram of the structure of the main part of the book @ Ming, and Figure 2 is an explanatory diagram of the configuration of an embodiment of the present invention.
.. 11 is a cell, 12 is a population pointer, 15 is an exit pointer, 14 is a data register, 15 is an address register, and 16 is a pointer register. Patent applicant Fujitsu Ltd. sub-agent Patent attorney 1) Yoshiro Saka Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 複数のセルよ構成る記憶装置において、一つのデータf
t記1意するセルに付属し、該データに関連するデータ
を記憶する曲のセルのアドレスを示す出口ポインタと、
他のセルからのポインタによシ関連付けられる場合の池
のセルのアドレスを示す人口ポインタを設け、該装置d
内の1つのデータ、t−参照したとき、該データ全記憶
jするセルに付属するポインタを介して該データの関連
データをポイ/りの連鎖によって参照できるようにした
ことを特徴とする遅想目己1意方式。
In a storage device composed of multiple cells, one data f
an exit pointer that is attached to the cell specified in item 1 and indicates the address of the cell of the song that stores data related to the data;
A population pointer is provided that indicates the address of the pond cell when associated with pointers from other cells, and the device d
When one data in t- is referenced, data related to the data can be referenced by a chain of pointers via a pointer attached to a cell that stores all of the data. Self-directed method.
JP11590482A 1982-07-03 1982-07-03 Associative storage system Pending JPS598195A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11590482A JPS598195A (en) 1982-07-03 1982-07-03 Associative storage system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11590482A JPS598195A (en) 1982-07-03 1982-07-03 Associative storage system

Publications (1)

Publication Number Publication Date
JPS598195A true JPS598195A (en) 1984-01-17

Family

ID=14674082

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11590482A Pending JPS598195A (en) 1982-07-03 1982-07-03 Associative storage system

Country Status (1)

Country Link
JP (1) JPS598195A (en)

Similar Documents

Publication Publication Date Title
GB1532278A (en) Data processing system and memory module therefor
ES8609771A1 (en) Tag control circuit for buffer storage.
JPS598195A (en) Associative storage system
JPS5651093A (en) Semiconductor storage device
GB957668A (en) Information storage and retrieval systems
JPS5745658A (en) Data storage system
JPS5730029A (en) File area managing system
JPS57121735A (en) Control system of data base space
SU624296A1 (en) Associative storage
FR2444299A1 (en) DEVICE FOR SELECTIVELY DELETING AN ANTEMEMORY
JPS5788599A (en) Data access device
JPS5460833A (en) Buffer memory system
JPS5774889A (en) Associative memory device
JPS5638681A (en) Electronic memo apparatus
JPS5987567A (en) Variable length data storage controlling system
US3594731A (en) Information processing system
JPS6478361A (en) Data processing system
JPH01133156A (en) File system
JPS57109177A (en) List processing system
GB1176689A (en) Message Retrieval Systems.
JPS56137424A (en) Buffer memory device
JPS57189383A (en) Memory device
JPS5753898A (en) Semiconductor storage device
SU1075287A1 (en) Device for on-line storing of information
SU1456947A1 (en) Device for sampling information in its displaying