GB1186414A - Input/Output Control Apparatus in a Computer System - Google Patents
Input/Output Control Apparatus in a Computer SystemInfo
- Publication number
- GB1186414A GB1186414A GB23865/67A GB2386567A GB1186414A GB 1186414 A GB1186414 A GB 1186414A GB 23865/67 A GB23865/67 A GB 23865/67A GB 2386567 A GB2386567 A GB 2386567A GB 1186414 A GB1186414 A GB 1186414A
- Authority
- GB
- United Kingdom
- Prior art keywords
- input
- data
- control
- peripheral
- output controller
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000015654 memory Effects 0.000 abstract 8
- 230000002093 peripheral effect Effects 0.000 abstract 7
- 238000001514 detection method Methods 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/04—Addressing variable-length words or parts of words
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
- G06F13/26—Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
- G06F9/30054—Unconditional branch instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
- G06F9/3875—Pipelining a single stage, e.g. superpipelining
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
- G06F9/4482—Procedural
- G06F9/4484—Executing subprograms
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
- G06F9/4818—Priority circuits therefor
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Programmable Controllers (AREA)
- Computer And Data Communications (AREA)
- Multi Processors (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
- Bus Control (AREA)
- Mobile Radio Communication Systems (AREA)
- Electrophonic Musical Instruments (AREA)
- Storage Device Security (AREA)
- Hardware Redundancy (AREA)
- Logic Circuits (AREA)
- Debugging And Monitoring (AREA)
- Accessory Devices And Overall Control Thereof (AREA)
- Executing Machine-Instructions (AREA)
Abstract
1,186,414. Computer input-output. GENERAL ELECTRIC CO. 23 May, 1967 [25 May, 1966], No. 23865/67. Heading G4A. In a computer system, a notification signal from a data processor specifying only that a data transfer with a particular data handling means is required is supplied to priority logic in an input/output controller, the priority logic obtaining a control item relating to the data handling means to be involved in a data transfer from a control item store holding a plurality of such items relating to respective data handling means and storing it in the input/output controller, the control item controlling data transfer between the data handling means and a memory and being modified and restored in the control item store. Processors communicate via respective main memories with peripheral sub-systems (each comprising one or more input/output or bulk memory devices) via a common input/output controller and priorityordered peripheral channels (one per peripheral sub-system). The input/output controller is under overall control of control words (" control items ") from one (only) of the main memories, the relevant memory being selected by a control panel. The controller has its own microprogramme store, and buffer store for data transfers. The control word specifies the operation required, the address of the peripheral subsystem, the address of the particular device within the latter (if there are more than one), and in the case of data transfer, the first address in main memory to supply or receive data and the amount of data to be transferred. The control word is read from its main memory, used, the main memory address field in it incremented, and then stored back in main memory. Data, command and status parallel characters (with parity bit) can be transferred to and from the peripheral sub-systems, preceded by read or write clock signals in both directions. Further status and other signal lines are provided. A data transfer operation may be terminated by the peripheral sub-system or the input/output controller, when the required number of characters has been transferred, or on detection of an error by the peripheral subsystem.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US55298166A | 1966-05-25 | 1966-05-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1186414A true GB1186414A (en) | 1970-04-02 |
Family
ID=24207624
Family Applications (10)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB23869/67A Expired GB1173356A (en) | 1966-05-25 | 1967-05-23 | Apparatus for handling data records in a computer system |
| GB23873/67A Expired GB1167945A (en) | 1966-05-25 | 1967-05-23 | Data Processing System with Acces Control for Subsystems. |
| GB23875/67A Expired GB1177109A (en) | 1966-05-25 | 1967-05-23 | Communication and Control Apparatus in a Computer System |
| GB23876/67A Expired GB1174069A (en) | 1966-05-25 | 1967-05-23 | Data Processing System with Access Control for Subsystems |
| GB23866/67A Expired GB1137784A (en) | 1966-05-25 | 1967-05-23 | Data processing system with improved memory |
| GB23868/67A Expired GB1150489A (en) | 1966-05-25 | 1967-05-23 | Dual Control Apparatus in Data Processing Equipment |
| GB23874/67A Expired GB1164000A (en) | 1966-05-25 | 1967-05-23 | Data Processing System with Controls to Deal with Requests from Subsystem for Prohibited Operations |
| GB23865/67A Expired GB1186414A (en) | 1966-05-25 | 1967-05-23 | Input/Output Control Apparatus in a Computer System |
| GB23867/67A Expired GB1142290A (en) | 1966-05-25 | 1967-05-23 | Data processing system with improved subsystem communication |
| GB23872/67A Expired GB1154516A (en) | 1966-05-25 | 1967-05-23 | Information shift apparatus in a computer system. |
Family Applications Before (7)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB23869/67A Expired GB1173356A (en) | 1966-05-25 | 1967-05-23 | Apparatus for handling data records in a computer system |
| GB23873/67A Expired GB1167945A (en) | 1966-05-25 | 1967-05-23 | Data Processing System with Acces Control for Subsystems. |
| GB23875/67A Expired GB1177109A (en) | 1966-05-25 | 1967-05-23 | Communication and Control Apparatus in a Computer System |
| GB23876/67A Expired GB1174069A (en) | 1966-05-25 | 1967-05-23 | Data Processing System with Access Control for Subsystems |
| GB23866/67A Expired GB1137784A (en) | 1966-05-25 | 1967-05-23 | Data processing system with improved memory |
| GB23868/67A Expired GB1150489A (en) | 1966-05-25 | 1967-05-23 | Dual Control Apparatus in Data Processing Equipment |
| GB23874/67A Expired GB1164000A (en) | 1966-05-25 | 1967-05-23 | Data Processing System with Controls to Deal with Requests from Subsystem for Prohibited Operations |
Family Applications After (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB23867/67A Expired GB1142290A (en) | 1966-05-25 | 1967-05-23 | Data processing system with improved subsystem communication |
| GB23872/67A Expired GB1154516A (en) | 1966-05-25 | 1967-05-23 | Information shift apparatus in a computer system. |
Country Status (6)
| Country | Link |
|---|---|
| JP (3) | JPS45236860B1 (en) |
| CH (7) | CH495016A (en) |
| DE (8) | DE1298318B (en) |
| FR (6) | FR1528181A (en) |
| GB (10) | GB1173356A (en) |
| SE (5) | SE329282B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2503891A1 (en) * | 1974-02-01 | 1975-08-07 | Cii Honeywell Bull | ARRANGEMENT FOR CONTROLLING DATA TRANSFERS |
| GB2147126A (en) * | 1983-09-29 | 1985-05-01 | Memory Ireland Limited | Improvements in and relating to computers |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3675209A (en) * | 1970-02-06 | 1972-07-04 | Burroughs Corp | Autonomous multiple-path input/output control system |
| US4209839A (en) * | 1978-06-16 | 1980-06-24 | International Business Machines Corporation | Shared synchronous memory multiprocessing arrangement |
| US4306287A (en) * | 1979-08-31 | 1981-12-15 | Bell Telephone Laboratories, Incorporated | Special address generation arrangement |
| GB2092341B (en) * | 1981-02-02 | 1984-09-12 | Picker Int Ltd | Computer peripheral selection |
| EP0690399A3 (en) * | 1994-06-30 | 1997-05-02 | Tandem Computers Inc | Remote financial transaction system |
-
1967
- 1967-05-23 GB GB23869/67A patent/GB1173356A/en not_active Expired
- 1967-05-23 GB GB23873/67A patent/GB1167945A/en not_active Expired
- 1967-05-23 GB GB23875/67A patent/GB1177109A/en not_active Expired
- 1967-05-23 GB GB23876/67A patent/GB1174069A/en not_active Expired
- 1967-05-23 GB GB23866/67A patent/GB1137784A/en not_active Expired
- 1967-05-23 GB GB23868/67A patent/GB1150489A/en not_active Expired
- 1967-05-23 GB GB23874/67A patent/GB1164000A/en not_active Expired
- 1967-05-23 GB GB23865/67A patent/GB1186414A/en not_active Expired
- 1967-05-23 GB GB23867/67A patent/GB1142290A/en not_active Expired
- 1967-05-23 GB GB23872/67A patent/GB1154516A/en not_active Expired
- 1967-05-24 DE DEG50172A patent/DE1298318B/en active Pending
- 1967-05-24 DE DE19671549423 patent/DE1549423A1/en active Pending
- 1967-05-24 DE DE19671549431 patent/DE1549431A1/en active Pending
- 1967-05-24 DE DE1967G0050164 patent/DE1549422B2/en active Granted
- 1967-05-24 DE DE19671549428 patent/DE1549428B2/en active Pending
- 1967-05-24 DE DE19671549429 patent/DE1549429A1/en active Pending
- 1967-05-24 DE DE19671549426 patent/DE1549426A1/en active Pending
- 1967-05-24 DE DE19671549424 patent/DE1549424A1/en active Pending
- 1967-05-25 FR FR107790A patent/FR1528181A/en not_active Expired
- 1967-05-25 SE SE07356/67A patent/SE329282B/xx unknown
- 1967-05-25 CH CH737067A patent/CH495016A/en not_active IP Right Cessation
- 1967-05-25 FR FR107785A patent/FR1545595A/en not_active Expired
- 1967-05-25 CH CH736967A patent/CH493886A/en not_active IP Right Cessation
- 1967-05-25 JP JP3306967A patent/JPS45236860B1/ja active Pending
- 1967-05-25 FR FR1564476D patent/FR1564476A/fr not_active Expired
- 1967-05-25 SE SE07353/67A patent/SE340192B/xx unknown
- 1967-05-25 CH CH736467A patent/CH506132A/en not_active IP Right Cessation
- 1967-05-25 JP JP3306667A patent/JPS4510707B1/ja active Pending
- 1967-05-25 CH CH736567A patent/CH486738A/en not_active IP Right Cessation
- 1967-05-25 SE SE07352/67A patent/SE329279B/xx unknown
- 1967-05-25 CH CH736867A patent/CH505430A/en not_active IP Right Cessation
- 1967-05-25 SE SE07355/67A patent/SE329517B/xx unknown
- 1967-05-25 SE SE07357/67A patent/SE329287B/xx unknown
- 1967-05-25 FR FR1564478D patent/FR1564478A/fr not_active Expired
- 1967-05-25 FR FR107783A patent/FR1545594A/en not_active Expired
- 1967-05-25 CH CH736767A patent/CH489847A/en not_active IP Right Cessation
- 1967-05-25 CH CH736667A patent/CH495014A/en not_active IP Right Cessation
- 1967-05-25 FR FR1564477D patent/FR1564477A/fr not_active Expired
- 1967-05-25 JP JP3306167A patent/JPS5323059B1/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2503891A1 (en) * | 1974-02-01 | 1975-08-07 | Cii Honeywell Bull | ARRANGEMENT FOR CONTROLLING DATA TRANSFERS |
| GB2147126A (en) * | 1983-09-29 | 1985-05-01 | Memory Ireland Limited | Improvements in and relating to computers |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed | ||
| 732 | Registration of transactions, instruments or events in the register (sect. 32/1977) | ||
| PCNP | Patent ceased through non-payment of renewal fee |