GB0412446D0 - High burst rate write data paths for integrated circuit memory devices and methods of operating same - Google Patents

High burst rate write data paths for integrated circuit memory devices and methods of operating same

Info

Publication number
GB0412446D0
GB0412446D0 GBGB0412446.7A GB0412446A GB0412446D0 GB 0412446 D0 GB0412446 D0 GB 0412446D0 GB 0412446 A GB0412446 A GB 0412446A GB 0412446 D0 GB0412446 D0 GB 0412446D0
Authority
GB
United Kingdom
Prior art keywords
methods
integrated circuit
memory devices
write data
data paths
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GBGB0412446.7A
Other versions
GB2403575A (en
GB2403575B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR10-2003-0042840A external-priority patent/KR100532444B1/en
Priority claimed from US10/792,425 external-priority patent/US7054202B2/en
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Priority to GB0625943A priority Critical patent/GB2433626B/en
Priority to GB0625944A priority patent/GB2433627B/en
Publication of GB0412446D0 publication Critical patent/GB0412446D0/en
Publication of GB2403575A publication Critical patent/GB2403575A/en
Application granted granted Critical
Publication of GB2403575B publication Critical patent/GB2403575B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1018—Serial bit line access mode, e.g. using bit line address shift registers, bit line address counters, bit line burst counters
    • G11C7/1027—Static column decode serial bit line access mode, i.e. using an enabled row address stroke pulse with its associated word line address and a sequence of enabled bit line addresses
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4093—Input/output [I/O] data interface arrangements, e.g. data buffers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M9/00—Parallel/series conversion or vice versa
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10—Aspects relating to interfaces of memory device to external buses
    • G11C2207/107—Serial-parallel conversion of data or prefetch

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
GB0412446A 2003-06-03 2004-06-03 High burst rate write data paths for integrated circuit memory devices and methods of operating same Expired - Fee Related GB2403575B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
GB0625943A GB2433626B (en) 2003-06-03 2004-06-03 High burst rate write data paths for integrated circuit memory devices and methods of operating same
GB0625944A GB2433627B (en) 2003-06-03 2004-06-03 High burst rate write data paths for integrated circuit memory devices and methods of operating same

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR20030035604 2003-06-03
KR10-2003-0042840A KR100532444B1 (en) 2003-06-03 2003-06-27 Memory device implementing 2N bit prefetch scheme using N bit prefetch structure and 2N bit prefetching method and auto-precharge method
US10/792,425 US7054202B2 (en) 2003-06-03 2004-03-03 High burst rate write data paths for integrated circuit memory devices and methods of operating same

Publications (3)

Publication Number Publication Date
GB0412446D0 true GB0412446D0 (en) 2004-07-07
GB2403575A GB2403575A (en) 2005-01-05
GB2403575B GB2403575B (en) 2007-05-16

Family

ID=33545117

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0412446A Expired - Fee Related GB2403575B (en) 2003-06-03 2004-06-03 High burst rate write data paths for integrated circuit memory devices and methods of operating same

Country Status (4)

Country Link
JP (1) JP4819325B2 (en)
DE (1) DE102004026526B4 (en)
GB (1) GB2403575B (en)
TW (1) TWI250530B (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102005001894A1 (en) 2005-01-14 2006-08-03 Infineon Technologies Ag Synchronous parallel-to-serial converter
JP5052056B2 (en) * 2005-09-29 2012-10-17 エスケーハイニックス株式会社 Data input device for semiconductor memory device
JP4470183B2 (en) 2006-08-28 2010-06-02 エルピーダメモリ株式会社 Semiconductor memory device
KR20080065100A (en) 2007-01-08 2008-07-11 주식회사 하이닉스반도체 Semiconductor memory device and operation method thereof
KR101094946B1 (en) 2010-01-29 2011-12-15 주식회사 하이닉스반도체 Semiconductor Integrated Circuit
JP2013206492A (en) * 2012-03-27 2013-10-07 Toshiba Corp Semiconductor device and driving method thereof

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59180871A (en) * 1983-03-31 1984-10-15 Fujitsu Ltd Semiconductor memory device
US4745577A (en) * 1984-11-20 1988-05-17 Fujitsu Limited Semiconductor memory device with shift registers for high speed reading and writing
JPH0740430B2 (en) * 1986-07-04 1995-05-01 日本電気株式会社 Memory device
US5854767A (en) * 1994-10-28 1998-12-29 Matsushita Electric Industrial Co., Ltd. Semiconductor memory device having a plurality of blocks each including a parallel/serial conversion circuit
JP3788867B2 (en) * 1997-10-28 2006-06-21 株式会社東芝 Semiconductor memory device
US6459393B1 (en) * 1998-05-08 2002-10-01 International Business Machines Corporation Apparatus and method for optimized self-synchronizing serializer/deserializer/framer
JP2000163969A (en) * 1998-09-16 2000-06-16 Fujitsu Ltd Semiconductor storage
DE19951677B4 (en) * 1998-10-30 2006-04-13 Fujitsu Ltd., Kawasaki Semiconductor memory device
JP3859885B2 (en) * 1998-11-24 2006-12-20 Ｎｅｃエレクトロニクス株式会社 Semiconductor memory device
JP4083944B2 (en) * 1999-12-13 2008-04-30 東芝マイクロエレクトロニクス株式会社 Semiconductor memory device

Also Published As

Publication number Publication date
GB2403575A (en) 2005-01-05
TWI250530B (en) 2006-03-01
DE102004026526B4 (en) 2010-09-23
JP2004362756A (en) 2004-12-24
GB2403575B (en) 2007-05-16
TW200516595A (en) 2005-05-16
DE102004026526A1 (en) 2005-01-13
JP4819325B2 (en) 2011-11-24

Similar Documents

Publication Publication Date Title
EP1770705A4 (en) Recording medium, reproduction device, program, reproduction method, and integrated circuit
EP1533702A4 (en) Semiconductor memory device and method for writing data into flash memory
IL169151A0 (en) Memory system having fast and slow data reading mechanisms
EP1657723A4 (en) Semiconductor memory and operation method of semiconductor memory
GB2388738B (en) Time ordered indexing of audio data
SG114617A1 (en) Integrated memory circuit and method of forming an integrated memory circuit
AU2003297666A8 (en) Circuit and method for testing high speed data circuits
AU2002342247A8 (en) Built-in self-testing for double data rate input/output interface
EP1619819A4 (en) Clock data recovery circuit
EP1433043A4 (en) System and method for integrated circuit card data storage
AU2003301094A1 (en) Nanoelectromechanical memory cells and data storage devices
HK1116584A1 (en) Methods for providing and reproducing multi-path presentation data
EP1657925B1 (en) Circuit for restricting data access
DE60231266D1 (en) Circuit for data and clock recovery
SG107099A1 (en) Memory cell, memory circuit block, data writing and data reading method
GB2403575B (en) High burst rate write data paths for integrated circuit memory devices and methods of operating same
EP1195995A3 (en) Recompression of data in memory
AU2003216636A8 (en) Method of performing access to a single-port memory device, memory access device, integrated circuit device and method of use of an integrated circuit device
EP1768115A4 (en) Information recording medium, integrated circuit, recording/reproducing device, computer program, and information recording/reproducing method
AU2003274687A1 (en) Secret-key-controlled reversible circuit and corresponding method of data processing
GB2433627B (en) High burst rate write data paths for integrated circuit memory devices and methods of operating same
GB0313690D0 (en) Recording and displaying logic circuit simulation waveforms
EP1518245A4 (en) Enhanced read-write methods for negative differential resistance (ndr) based memory device
GB2377530B (en) Memory device with prefetched data ordering distributed in prefetched data path logic, circuit, and method of ordering prefetched data
PL359453A1 (en) Method of reproduction, reproducing device and method of data access

Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20150603