FR3107051B1 - Process for manufacturing aluminum gallium nitride (AlGaN) nanostructures - Google Patents

Process for manufacturing aluminum gallium nitride (AlGaN) nanostructures Download PDF

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Publication number
FR3107051B1
FR3107051B1 FR2001370A FR2001370A FR3107051B1 FR 3107051 B1 FR3107051 B1 FR 3107051B1 FR 2001370 A FR2001370 A FR 2001370A FR 2001370 A FR2001370 A FR 2001370A FR 3107051 B1 FR3107051 B1 FR 3107051B1
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France
Prior art keywords
nanostructures
epitaxial growth
algan
alternate
gallium nitride
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Active
Application number
FR2001370A
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French (fr)
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FR3107051A1 (en
Inventor
Julien Brault
Khalfioui Mohamed Al
Jean Massies
Bernard Gil
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Centre National de la Recherche Scientifique CNRS
Universite de Montpellier I
Universite de Montpellier
Original Assignee
Centre National de la Recherche Scientifique CNRS
Universite de Montpellier I
Universite de Montpellier
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Application filed by Centre National de la Recherche Scientifique CNRS, Universite de Montpellier I, Universite de Montpellier filed Critical Centre National de la Recherche Scientifique CNRS
Priority to FR2001370A priority Critical patent/FR3107051B1/en
Priority to EP21703472.7A priority patent/EP4104203A1/en
Priority to PCT/EP2021/053199 priority patent/WO2021160664A1/en
Publication of FR3107051A1 publication Critical patent/FR3107051A1/en
Application granted granted Critical
Publication of FR3107051B1 publication Critical patent/FR3107051B1/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H01L21/02507—Alternating layers, e.g. superlattice
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02513—Microstructure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02601—Nanoparticles

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Led Devices (AREA)
  • Chemical Vapour Deposition (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

L’invention concerne un procédé de fabrication de nanostructures (BQ) d’AlGaN comprenant les étapes suivantes :- au moins une étape de croissance épitaxiale alternée (CA), ladite étape de croissance épitaxiale alternée étant réalisée à une température d’épitaxie définie et comprenant :une sous-étape de croissance épitaxiale (CA1) de GaN ; etune sous-étape de croissance épitaxiale (CA2) d’AlyGa1-yN réalisée après la sous-étape de croissance épitaxiale de GaN, y étant un nombre supérieur à 0 et inférieur ou égal à 1 ;ladite au moins une étape de croissance épitaxiale alternée conduisant à la formation de nanostructures intermédiaires (BQI) en un pseudo-alliage de AlzGa1-zN résultant de la combinaison des couches épitaxiées, z étant un nombre inférieur à y ;- une étape de recuit à une température de recuit supérieure ou égale à 820 ± 20°C ou supérieure d’au moins 100°C par rapport à la température d’épitaxie et conduisant à la formation de nanostructures (BQ) en AlzGa1-zN. Figure pour l’abrégé : figure 2The invention relates to a method for manufacturing AlGaN nanostructures (BQ) comprising the following steps:- at least one alternate epitaxial growth step (CA), said alternate epitaxial growth step being carried out at a defined epitaxial temperature and comprising:an epitaxial growth sub-stage (CA1) of GaN; andan AlyGa1-yN epitaxial growth sub-step (CA2) performed after the GaN epitaxial growth sub-step, y being a number greater than 0 and less than or equal to 1;said at least one alternate epitaxial growth step leading to the formation of intermediate nanostructures (BQI) in an AlzGa1-zN pseudo-alloy resulting from the combination of the epitaxial layers, z being a number less than y;- an annealing step at an annealing temperature greater than or equal to 820 ± 20°C or higher by at least 100°C with respect to the epitaxy temperature and leading to the formation of nanostructures (BQ) in AlzGa1-zN. Figure for the abstract: Figure 2

FR2001370A 2020-02-12 2020-02-12 Process for manufacturing aluminum gallium nitride (AlGaN) nanostructures Active FR3107051B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR2001370A FR3107051B1 (en) 2020-02-12 2020-02-12 Process for manufacturing aluminum gallium nitride (AlGaN) nanostructures
EP21703472.7A EP4104203A1 (en) 2020-02-12 2021-02-10 Method for producing aluminum gallium nitride (algan) nanostructures
PCT/EP2021/053199 WO2021160664A1 (en) 2020-02-12 2021-02-10 Method for producing aluminum gallium nitride (algan) nanostructures

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR2001370 2020-02-12
FR2001370A FR3107051B1 (en) 2020-02-12 2020-02-12 Process for manufacturing aluminum gallium nitride (AlGaN) nanostructures

Publications (2)

Publication Number Publication Date
FR3107051A1 FR3107051A1 (en) 2021-08-13
FR3107051B1 true FR3107051B1 (en) 2022-10-14

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
FR2001370A Active FR3107051B1 (en) 2020-02-12 2020-02-12 Process for manufacturing aluminum gallium nitride (AlGaN) nanostructures

Country Status (3)

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EP (1) EP4104203A1 (en)
FR (1) FR3107051B1 (en)
WO (1) WO2021160664A1 (en)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5309452B2 (en) * 2007-02-28 2013-10-09 サンケン電気株式会社 Semiconductor wafer, semiconductor device, and manufacturing method
JP5576771B2 (en) * 2009-11-04 2014-08-20 Ｄｏｗａエレクトロニクス株式会社 Group III nitride epitaxial multilayer substrate
WO2011081474A2 (en) * 2009-12-31 2011-07-07 우리엘에스티 주식회사 Semiconductor light emitting device, and preparation method thereof
CN103187498B (en) * 2011-12-29 2016-08-03 比亚迪股份有限公司 A kind of semiconductor structure and forming method thereof

Also Published As

Publication number Publication date
EP4104203A1 (en) 2022-12-21
FR3107051A1 (en) 2021-08-13
WO2021160664A1 (en) 2021-08-19

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