FR3098316B1 - Procédé de test d’un dispositif de réinitialisation de calculateur - Google Patents

Procédé de test d’un dispositif de réinitialisation de calculateur Download PDF

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Publication number
FR3098316B1
FR3098316B1 FR1907441A FR1907441A FR3098316B1 FR 3098316 B1 FR3098316 B1 FR 3098316B1 FR 1907441 A FR1907441 A FR 1907441A FR 1907441 A FR1907441 A FR 1907441A FR 3098316 B1 FR3098316 B1 FR 3098316B1
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FR
France
Prior art keywords
test
testing
test counter
computer
sequence
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1907441A
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English (en)
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FR3098316A1 (fr
Inventor
Jean-Luc Boyer
Xavier Guillaume
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Vitesco Technologies GmbH
Original Assignee
Continental Automotive France SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Continental Automotive France SAS filed Critical Continental Automotive France SAS
Priority to FR1907441A priority Critical patent/FR3098316B1/fr
Priority to US17/618,645 priority patent/US11687394B2/en
Priority to PCT/EP2020/067077 priority patent/WO2021001168A1/fr
Priority to CN202080048903.0A priority patent/CN114144766A/zh
Publication of FR3098316A1 publication Critical patent/FR3098316A1/fr
Application granted granted Critical
Publication of FR3098316B1 publication Critical patent/FR3098316B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/076—Error or fault detection not based on redundancy by exceeding limits by exceeding a count or rate limit, e.g. word- or bit count limit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0736—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in functional embedded systems, i.e. in a data processing system designed as a combination of hardware and software dedicated to performing a certain function
    • G06F11/0739—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in functional embedded systems, i.e. in a data processing system designed as a combination of hardware and software dedicated to performing a certain function in a data processing system embedded in automotive or aircraft systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
    • G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2284—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by power-on test, e.g. power-on self test [POST]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Debugging And Monitoring (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

Procédé de test in situ et en fonctionnement d’un dispositif de réinitialisation (1) d’un calculateur (2), comprenant une séquence d’exécution et une séquence de vérification, la séquence d’exécution étant exécutée en cours d’exécution du logiciel (L1, L2) et comprenant les étapes suivantes : - incrémentation d’un compteur de test, - stockage du compteur de test dans une mémoire non volatile (3), - déclenchement d’une réinitialisation du calculateur (2), la séquence de vérification étant exécutée au démarrage du logiciel (L1, L2) et comprenant les étapes suivantes : - lecture depuis la mémoire non volatile (3) du compteur de test, - comparaison du compteur de test, si il est égal à sa valeur initiale augmentée de 1, réinitialisation du compteur de test (CT), le résultat du test est positif, et si il est supérieur à sa valeur initiale augmentée de 1, le résultat du test est négatif. Figure d’abrégé : Figure 1
FR1907441A 2019-07-04 2019-07-04 Procédé de test d’un dispositif de réinitialisation de calculateur Active FR3098316B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR1907441A FR3098316B1 (fr) 2019-07-04 2019-07-04 Procédé de test d’un dispositif de réinitialisation de calculateur
US17/618,645 US11687394B2 (en) 2019-07-04 2020-06-19 Method for testing a computer reset device
PCT/EP2020/067077 WO2021001168A1 (fr) 2019-07-04 2020-06-19 Procede de test d'un dispositif de reinitialisation de calculateur
CN202080048903.0A CN114144766A (zh) 2019-07-04 2020-06-19 计算机的重新初始化装置的测试方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1907441A FR3098316B1 (fr) 2019-07-04 2019-07-04 Procédé de test d’un dispositif de réinitialisation de calculateur
FR1907441 2019-07-04

Publications (2)

Publication Number Publication Date
FR3098316A1 FR3098316A1 (fr) 2021-01-08
FR3098316B1 true FR3098316B1 (fr) 2021-05-28

Family

ID=68138497

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1907441A Active FR3098316B1 (fr) 2019-07-04 2019-07-04 Procédé de test d’un dispositif de réinitialisation de calculateur

Country Status (4)

Country Link
US (1) US11687394B2 (fr)
CN (1) CN114144766A (fr)
FR (1) FR3098316B1 (fr)
WO (1) WO2021001168A1 (fr)

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6647301B1 (en) 1999-04-22 2003-11-11 Dow Global Technologies Inc. Process control system with integrated safety control system
JP2001063492A (ja) 1999-08-27 2001-03-13 Nec Corp 車両安全制御装置の電子制御装置
US8751100B2 (en) * 2010-08-13 2014-06-10 Deere & Company Method for performing diagnostics or software maintenance for a vehicle
WO2013182872A1 (fr) 2012-06-07 2013-12-12 Freescale Semiconductor, Inc. Système d'auto-test intégré (bist), système sur puce et procédé de commande de bist
JP2014019416A (ja) * 2012-07-24 2014-02-03 Hitachi Automotive Systems Ltd 車両制御装置
FR3006768B1 (fr) * 2013-06-06 2017-05-26 Continental Automotive France Procede de surveillance d'un organe fonctionnel d'un vehicule automobile
US10018267B2 (en) * 2016-03-11 2018-07-10 Ford Global Technologies, Llc Vehicle transmission control module reset detection and mitigation
FR3055986B1 (fr) * 2016-09-13 2018-10-12 Peugeot Citroen Automobiles Sa Dispositif de controle de la reinitialisation d'un calculateur embarque automobile

Also Published As

Publication number Publication date
US20220358004A1 (en) 2022-11-10
US11687394B2 (en) 2023-06-27
WO2021001168A1 (fr) 2021-01-07
FR3098316A1 (fr) 2021-01-08
CN114144766A (zh) 2022-03-04

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