FR3082076B1 - SELF-POWERED SWITCHING DEVICE AND METHOD FOR OPERATING SUCH A DEVICE - Google Patents

SELF-POWERED SWITCHING DEVICE AND METHOD FOR OPERATING SUCH A DEVICE Download PDF

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Publication number
FR3082076B1
FR3082076B1 FR1854789A FR1854789A FR3082076B1 FR 3082076 B1 FR3082076 B1 FR 3082076B1 FR 1854789 A FR1854789 A FR 1854789A FR 1854789 A FR1854789 A FR 1854789A FR 3082076 B1 FR3082076 B1 FR 3082076B1
Authority
FR
France
Prior art keywords
fault
pin
circuit
self
operating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1854789A
Other languages
French (fr)
Other versions
FR3082076A1 (en
Inventor
Thierry Sutto
Laurent Guillot
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics France SAS
Original Assignee
Exagan SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Exagan SAS filed Critical Exagan SAS
Priority to FR1854789A priority Critical patent/FR3082076B1/en
Priority to PCT/FR2019/051217 priority patent/WO2019229341A1/en
Publication of FR3082076A1 publication Critical patent/FR3082076A1/en
Application granted granted Critical
Publication of FR3082076B1 publication Critical patent/FR3082076B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/18Modifications for indicating state of switch
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/082Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
    • H03K17/0828Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit in composite switches
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/10Modifications for increasing the maximum permissible switched voltage
    • H03K17/102Modifications for increasing the maximum permissible switched voltage in field-effect transistor switches
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/567Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K2017/6875Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors using self-conductive, depletion FETs
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K2217/00Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0081Power supply means, e.g. to the switch driver

Landscapes

  • Electronic Switches (AREA)
  • Dc-Dc Converters (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Power Conversion In General (AREA)

Abstract

L'invention porte sur un circuit intégré (11) de commutation d'une charge comprenant un boitier, des broches de puissance (11a, 11b), une broche d'alimentation (Va), une broche de défaillance (FAULT), une première puce électronique (15) comprenant un transistor haute tension en mode déplétion, une deuxième puce électronique (16) comprenant un transistor basse tension en mode enrichissement (6), un circuit de surveillance du bon fonctionnement du circuit intégré (11) relié à la broche d'alimentation (Va), le circuit de surveillance (30) établissant un signal de défaillance rapporté sur la broche de défaillance (FAULT). L'invention porte également sur un dispositif de commutation comprenant au moins un tel circuit intégré de commutation et un organe de commande.An integrated circuit (11) for switching a load comprising a housing, power pins (11a, 11b), a power pin (Va), a fault pin (FAULT), a first electronic chip (15) comprising a high voltage transistor in depletion mode, a second electronic chip (16) comprising a low voltage transistor in enrichment mode (6), a circuit for monitoring the proper functioning of the integrated circuit (11) connected to the pin power supply (Va), the monitoring circuit (30) establishing a failure signal reported on the fault pin (FAULT). The invention also relates to a switching device comprising at least one such integrated switching circuit and a control member.

FR1854789A 2018-06-01 2018-06-01 SELF-POWERED SWITCHING DEVICE AND METHOD FOR OPERATING SUCH A DEVICE Active FR3082076B1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1854789A FR3082076B1 (en) 2018-06-01 2018-06-01 SELF-POWERED SWITCHING DEVICE AND METHOD FOR OPERATING SUCH A DEVICE
PCT/FR2019/051217 WO2019229341A1 (en) 2018-06-01 2019-05-27 Self-powered switching device and method for operating such a device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1854789 2018-06-01
FR1854789A FR3082076B1 (en) 2018-06-01 2018-06-01 SELF-POWERED SWITCHING DEVICE AND METHOD FOR OPERATING SUCH A DEVICE

Publications (2)

Publication Number Publication Date
FR3082076A1 FR3082076A1 (en) 2019-12-06
FR3082076B1 true FR3082076B1 (en) 2020-05-08

Family

ID=63490606

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1854789A Active FR3082076B1 (en) 2018-06-01 2018-06-01 SELF-POWERED SWITCHING DEVICE AND METHOD FOR OPERATING SUCH A DEVICE

Country Status (2)

Country Link
FR (1) FR3082076B1 (en)
WO (1) WO2019229341A1 (en)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7820511B2 (en) * 2004-07-08 2010-10-26 Semisouth Laboratories, Inc. Normally-off integrated JFET power switches in wide bandgap semiconductors and methods of making
CN105874598B (en) * 2013-11-15 2019-06-18 德克萨斯仪器股份有限公司 For controlling the method and circuit of depletion mode transistor
US9559683B2 (en) * 2014-08-29 2017-01-31 Infineon Technologies Austria Ag System and method for a switch having a normally-on transistor and a normally-off transistor
WO2017203186A1 (en) 2016-05-26 2017-11-30 Exagan Integrated circuit comprising a chip formed by a high-voltage transistor and comprising a chip formed by a low-voltage transistor

Also Published As

Publication number Publication date
FR3082076A1 (en) 2019-12-06
WO2019229341A1 (en) 2019-12-05

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