FR2963703B1 - Hvpmos renforce - Google Patents

Hvpmos renforce Download PDF

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Publication number
FR2963703B1
FR2963703B1 FR1157100A FR1157100A FR2963703B1 FR 2963703 B1 FR2963703 B1 FR 2963703B1 FR 1157100 A FR1157100 A FR 1157100A FR 1157100 A FR1157100 A FR 1157100A FR 2963703 B1 FR2963703 B1 FR 2963703B1
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FR
France
Prior art keywords
hvpmos
reinforces
hvpmos reinforces
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1157100A
Other languages
English (en)
Other versions
FR2963703A1 (fr
Inventor
Willem-Jan Toren
Bruno Villard
Elsa Hugonnard-Bruyere
Gaetan Toulon
Frederic Morancho
Ignasi Cortes Mayol
Thierry Pedron
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Laboratoire dAnalyse et dArchitecture des Systemes LAAS of CNRS
Microchip Technology Rousset SAS
Original Assignee
Atmel Rousset SAS
Laboratoire dAnalyse et dArchitecture des Systemes LAAS of CNRS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Atmel Rousset SAS, Laboratoire dAnalyse et dArchitecture des Systemes LAAS of CNRS filed Critical Atmel Rousset SAS
Publication of FR2963703A1 publication Critical patent/FR2963703A1/fr
Application granted granted Critical
Publication of FR2963703B1 publication Critical patent/FR2963703B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7824Lateral DMOS transistors, i.e. LDMOS transistors with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/063Reduced surface field [RESURF] pn-junction structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/107Substrate region of field-effect devices
    • H01L29/1075Substrate region of field-effect devices of field-effect transistors
    • H01L29/1079Substrate region of field-effect devices of field-effect transistors with insulated gate
    • H01L29/1083Substrate region of field-effect devices of field-effect transistors with insulated gate with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095Body region, i.e. base region, of DMOS transistors or IGBTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66674DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/66681Lateral DMOS transistors, i.e. LDMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642Isolation within the component, i.e. internal isolation
    • H01L29/0649Dielectric regions, e.g. SiO2 regions, air gaps
    • H01L29/0653Dielectric regions, e.g. SiO2 regions, air gaps adjoining the input or output region of a field-effect device, e.g. the source or drain region

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
FR1157100A 2010-08-05 2011-08-02 Hvpmos renforce Active FR2963703B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/851,256 US8217452B2 (en) 2010-08-05 2010-08-05 Enhanced HVPMOS
US12851256 2010-08-05

Publications (2)

Publication Number Publication Date
FR2963703A1 FR2963703A1 (fr) 2012-02-10
FR2963703B1 true FR2963703B1 (fr) 2018-04-06

Family

ID=45507302

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1157100A Active FR2963703B1 (fr) 2010-08-05 2011-08-02 Hvpmos renforce

Country Status (2)

Country Link
US (2) US8217452B2 (fr)
FR (1) FR2963703B1 (fr)

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JP5432750B2 (ja) * 2010-02-01 2014-03-05 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
EP2402998B1 (fr) * 2010-07-01 2020-04-08 ams AG Production d'un transistor LDMOS à canal P
US8217452B2 (en) * 2010-08-05 2012-07-10 Atmel Rousset S.A.S. Enhanced HVPMOS
JP2012186417A (ja) * 2011-03-08 2012-09-27 Toshiba Corp 半導体装置及びその製造方法
CN102623506B (zh) * 2012-04-10 2016-05-04 北京燕东微电子有限公司 高可靠soi ldmos功率器件
EP2880688B1 (fr) 2012-07-31 2020-07-15 Silanna Asia Pte Ltd. Intégration de dispositifs d'alimentation sur un substrat commun
US8847310B1 (en) * 2012-07-31 2014-09-30 Azure Silicon LLC Power device integration on a common substrate
US8928116B2 (en) 2012-07-31 2015-01-06 Silanna Semiconductor U.S.A., Inc. Power device integration on a common substrate
US10290702B2 (en) 2012-07-31 2019-05-14 Silanna Asia Pte Ltd Power device on bulk substrate
US8674440B2 (en) 2012-07-31 2014-03-18 Io Semiconductor Inc. Power device integration on a common substrate
US9412881B2 (en) 2012-07-31 2016-08-09 Silanna Asia Pte Ltd Power device integration on a common substrate
US8994105B2 (en) 2012-07-31 2015-03-31 Azure Silicon LLC Power device integration on a common substrate
CN103050541B (zh) * 2013-01-06 2015-08-19 上海华虹宏力半导体制造有限公司 一种射频ldmos器件及其制造方法
CN103280460B (zh) 2013-05-22 2016-09-07 矽力杰半导体技术(杭州)有限公司 注入形成具有叠加漂移区的高压pmos晶体管及其制造方法
AU2014318735B2 (en) 2013-09-11 2017-11-30 Cybex International, Inc. Exercise apparatus
WO2015138538A1 (fr) 2014-03-11 2015-09-17 Cybex International, Inc. Appareil d'exercice de traction vers le bas
US10166435B2 (en) 2014-03-11 2019-01-01 Cybex International, Inc. Back extension exercise apparatus
US9761656B2 (en) * 2015-04-10 2017-09-12 Macronix International Co., Ltd. Semiconductor device having buried region and method of fabricating same
EP3405978B1 (fr) 2016-01-18 2023-05-10 Texas Instruments Incorporated Procédé de fabrication d'un mosfet de puissance à contact de source profonde remplie de métal
CN107301975B (zh) * 2016-04-14 2020-06-26 世界先进积体电路股份有限公司 半导体装置及其制造方法
TWI574402B (zh) 2016-04-28 2017-03-11 國立交通大學 場效電晶體結構
CN107731918B (zh) * 2016-08-12 2020-08-07 中芯国际集成电路制造(上海)有限公司 半导体结构及其制造方法
CN106229337A (zh) * 2016-08-16 2016-12-14 上海华虹宏力半导体制造有限公司 Dddmos器件及其制造方法
US9923059B1 (en) 2017-02-20 2018-03-20 Silanna Asia Pte Ltd Connection arrangements for integrated lateral diffusion field effect transistors
US10083897B2 (en) 2017-02-20 2018-09-25 Silanna Asia Pte Ltd Connection arrangements for integrated lateral diffusion field effect transistors having a backside contact
CN111952368A (zh) * 2019-05-17 2020-11-17 宁波宝芯源功率半导体有限公司 具有超结结构的soi横向ldmos器件及制作方法
CN111952351A (zh) * 2019-05-17 2020-11-17 宁波宝芯源功率半导体有限公司 具有超结结构的soi横向ldmos器件及制作方法
JP7407590B2 (ja) * 2019-12-25 2024-01-04 三菱電機株式会社 半導体装置および集積回路
CN113410281B (zh) * 2020-03-16 2023-04-07 电子科技大学 一种具有表面耐压结构的p沟道LDMOS器件及其制备方法
CN112466955B (zh) * 2020-12-04 2022-10-11 重庆邮电大学 一种具有体内导电沟道的薄层soi-ldmos器件
US11552193B2 (en) 2020-12-31 2023-01-10 Semiconductor Components Industries, Llc Semiconductor device
US11810976B2 (en) 2021-02-18 2023-11-07 Semiconductor Components Industries, Llc Semiconductor device
CN116053303A (zh) * 2023-03-17 2023-05-02 泰科天润半导体科技(北京)有限公司 一种抑制热纵向扩散的横向功率碳化硅mosfet的制造方法
CN117153888B (zh) * 2023-10-30 2024-02-02 粤芯半导体技术股份有限公司 半导体器件及其制造方法

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Also Published As

Publication number Publication date
FR2963703A1 (fr) 2012-02-10
US20120267717A1 (en) 2012-10-25
US8217452B2 (en) 2012-07-10
US20120032262A1 (en) 2012-02-09
US8729629B2 (en) 2014-05-20

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