FR2960094B1 - Procede de fabrication de puces semiconductrices - Google Patents

Procede de fabrication de puces semiconductrices

Info

Publication number
FR2960094B1
FR2960094B1 FR1053742A FR1053742A FR2960094B1 FR 2960094 B1 FR2960094 B1 FR 2960094B1 FR 1053742 A FR1053742 A FR 1053742A FR 1053742 A FR1053742 A FR 1053742A FR 2960094 B1 FR2960094 B1 FR 2960094B1
Authority
FR
France
Prior art keywords
semiconductor chips
producing semiconductor
producing
chips
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR1053742A
Other languages
English (en)
Other versions
FR2960094A1 (fr
Inventor
Vincent Jarry
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Tours SAS
Original Assignee
STMicroelectronics Tours SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Tours SAS filed Critical STMicroelectronics Tours SAS
Priority to FR1053742A priority Critical patent/FR2960094B1/fr
Priority to US13/105,244 priority patent/US20120009763A1/en
Publication of FR2960094A1 publication Critical patent/FR2960094A1/fr
Application granted granted Critical
Publication of FR2960094B1 publication Critical patent/FR2960094B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H01L2221/68336—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding involving stretching of the auxiliary support post dicing

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Dicing (AREA)
  • Laser Beam Processing (AREA)
FR1053742A 2010-05-12 2010-05-12 Procede de fabrication de puces semiconductrices Expired - Fee Related FR2960094B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1053742A FR2960094B1 (fr) 2010-05-12 2010-05-12 Procede de fabrication de puces semiconductrices
US13/105,244 US20120009763A1 (en) 2010-05-12 2011-05-11 Semiconductor chip manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1053742A FR2960094B1 (fr) 2010-05-12 2010-05-12 Procede de fabrication de puces semiconductrices

Publications (2)

Publication Number Publication Date
FR2960094A1 FR2960094A1 (fr) 2011-11-18
FR2960094B1 true FR2960094B1 (fr) 2012-06-08

Family

ID=43301799

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1053742A Expired - Fee Related FR2960094B1 (fr) 2010-05-12 2010-05-12 Procede de fabrication de puces semiconductrices

Country Status (2)

Country Link
US (1) US20120009763A1 (fr)
FR (1) FR2960094B1 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8490271B2 (en) 2007-12-10 2013-07-23 Universal Instruments Corporation Flexible substrate tensioner
US8536025B2 (en) * 2011-12-12 2013-09-17 International Business Machines Corporation Resized wafer with a negative photoresist ring and design structures thereof
JP2014007344A (ja) * 2012-06-26 2014-01-16 Disco Abrasive Syst Ltd 収容カセット
JP7030469B2 (ja) * 2017-10-02 2022-03-07 株式会社ディスコ テープ拡張装置及びテープ拡張方法
US11508606B2 (en) * 2019-11-05 2022-11-22 Nxp B.V. Technique for handling diced wafers of integrated circuits

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5667128A (en) * 1995-10-02 1997-09-16 Motorola, Inc. Workstation for processing a flexible membrane
JP2004119718A (ja) * 2002-09-26 2004-04-15 Shinko Electric Ind Co Ltd 薄型半導体チップの製造方法
KR100538158B1 (ko) * 2004-01-09 2005-12-22 삼성전자주식회사 웨이퍼 레벨 적층 칩 접착 방법

Also Published As

Publication number Publication date
US20120009763A1 (en) 2012-01-12
FR2960094A1 (fr) 2011-11-18

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20140131