FR2914488B1 - Substrat chauffage dope - Google Patents

Substrat chauffage dope

Info

Publication number
FR2914488B1
FR2914488B1 FR0754175A FR0754175A FR2914488B1 FR 2914488 B1 FR2914488 B1 FR 2914488B1 FR 0754175 A FR0754175 A FR 0754175A FR 0754175 A FR0754175 A FR 0754175A FR 2914488 B1 FR2914488 B1 FR 2914488B1
Authority
FR
France
Prior art keywords
heating substrate
dope
dope heating
substrate
heating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR0754175A
Other languages
English (en)
Other versions
FR2914488A1 (fr
Inventor
Robert Langer
Hacene Lahreche
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Priority to FR0754175A priority Critical patent/FR2914488B1/fr
Priority to US12/530,606 priority patent/US8198628B2/en
Priority to PCT/IB2008/000780 priority patent/WO2008120092A1/fr
Publication of FR2914488A1 publication Critical patent/FR2914488A1/fr
Application granted granted Critical
Publication of FR2914488B1 publication Critical patent/FR2914488B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/30—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface
    • H01L29/34—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface the imperfections being on the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical Vapour Deposition (AREA)
FR0754175A 2007-03-30 2007-03-30 Substrat chauffage dope Active FR2914488B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR0754175A FR2914488B1 (fr) 2007-03-30 2007-03-30 Substrat chauffage dope
US12/530,606 US8198628B2 (en) 2007-03-30 2008-03-25 Doped substrate to be heated
PCT/IB2008/000780 WO2008120092A1 (fr) 2007-03-30 2008-03-25 Substrat dopé devant être chauffé

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0754175A FR2914488B1 (fr) 2007-03-30 2007-03-30 Substrat chauffage dope

Publications (2)

Publication Number Publication Date
FR2914488A1 FR2914488A1 (fr) 2008-10-03
FR2914488B1 true FR2914488B1 (fr) 2010-08-27

Family

ID=38651293

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0754175A Active FR2914488B1 (fr) 2007-03-30 2007-03-30 Substrat chauffage dope

Country Status (3)

Country Link
US (1) US8198628B2 (fr)
FR (1) FR2914488B1 (fr)
WO (1) WO2008120092A1 (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2914488B1 (fr) * 2007-03-30 2010-08-27 Soitec Silicon On Insulator Substrat chauffage dope
US9946722B2 (en) 2007-11-30 2018-04-17 Red Hat, Inc. Generating file usage information
WO2010131573A1 (fr) * 2009-05-11 2010-11-18 住友電気工業株式会社 Transistor bipolaire de type à grille isolante (igbt)
US20110272707A1 (en) * 2010-05-06 2011-11-10 Qs Semiconductor Australia Pty Ltd Substrates and methods of forming film structures to facilitate silicon carbide epitaxy
DE102010021172B4 (de) * 2010-05-21 2013-04-18 Siemens Aktiengesellschaft Strahlenwandler mit einer direkt konvertierenden Halbleiterschicht und Verfahren zur Herstellung eines solchen Strahlenwandlers
EP3043376B1 (fr) * 2013-09-05 2021-03-03 Fuji Electric Co., Ltd. Procédé de fabrication d'un élément semi-conducteur au carbure de silicium

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2513055B2 (ja) * 1990-02-14 1996-07-03 日本電装株式会社 半導体装置の製造方法
DE69126228T2 (de) 1990-03-24 1997-10-09 Canon Kk Optische Wärmebehandlungsmethode für Halbleiterschicht und Herstellungsverfahren von Halbleiteranordnung mit solcher Halbleiterschicht
US5296385A (en) * 1991-12-31 1994-03-22 Texas Instruments Incorporated Conditioning of semiconductor wafers for uniform and repeatable rapid thermal processing
US5679152A (en) * 1994-01-27 1997-10-21 Advanced Technology Materials, Inc. Method of making a single crystals Ga*N article
US5654904A (en) * 1994-05-18 1997-08-05 Micron Technology, Inc. Control and 3-dimensional simulation model of temperature variations in a rapid thermal processing machine
FR2744839B1 (fr) * 1995-04-04 1999-04-30 Centre Nat Rech Scient Dispositifs pour l'absorption du rayonnement infrarouge comprenant un element en alliage quasi-cristallin
JPH09246202A (ja) * 1996-03-07 1997-09-19 Shin Etsu Handotai Co Ltd 熱処理方法および半導体単結晶基板
JP3711635B2 (ja) * 1996-06-17 2005-11-02 ソニー株式会社 窒化物系ｉｉｉ−ｖ族化合物半導体の成長方法
JP2000058423A (ja) * 1998-08-12 2000-02-25 Toshiba Corp 熱処理方法及び熱処理装置
US6245692B1 (en) * 1999-11-23 2001-06-12 Agere Systems Guardian Corp. Method to selectively heat semiconductor wafers
US6447604B1 (en) * 2000-03-13 2002-09-10 Advanced Technology Materials, Inc. Method for achieving improved epitaxy quality (surface texture and defect density) on free-standing (aluminum, indium, gallium) nitride ((al,in,ga)n) substrates for opto-electronic and electronic devices
US7198671B2 (en) * 2001-07-11 2007-04-03 Matsushita Electric Industrial Co., Ltd. Layered substrates for epitaxial processing, and device
JP3818102B2 (ja) * 2001-08-31 2006-09-06 住友電気工業株式会社 放熱基板とその製造方法及び半導体装置
US7037733B2 (en) * 2001-10-30 2006-05-02 Matsushita Electric Industrial Co., Ltd. Method for measuring temperature, annealing method and method for fabricating semiconductor device
US6670283B2 (en) * 2001-11-20 2003-12-30 International Business Machines Corporation Backside protection films
DE10250915B4 (de) * 2002-10-31 2009-01-22 Osram Opto Semiconductors Gmbh Verfahren zur Abscheidung eines Materials auf einem Substratwafer
US20050277053A1 (en) * 2004-06-01 2005-12-15 Anocoil Corporation Increased sensitivity, IR, and UV imageable photographic elements
ATE393473T1 (de) * 2004-06-11 2008-05-15 Soitec Silicon On Insulator Verfahren zur herstellung eines verbundsubstrats
US7330041B2 (en) * 2004-06-14 2008-02-12 Cascade Microtech, Inc. Localizing a temperature of a device for testing
US20060060145A1 (en) * 2004-09-17 2006-03-23 Van Den Berg Jannes R Susceptor with surface roughness for high temperature substrate processing
US20060108325A1 (en) * 2004-11-19 2006-05-25 Everson William J Polishing process for producing damage free surfaces on semi-insulating silicon carbide wafers
WO2006082467A1 (fr) * 2005-02-01 2006-08-10 S.O.I.Tec Silicon On Insulator Technologies Substrat destine a la cristallogenese d'un semi-conducteur de nitrure
US7576361B2 (en) * 2005-08-03 2009-08-18 Aptina Imaging Corporation Backside silicon wafer design reducing image artifacts from infrared radiation
FR2914488B1 (fr) * 2007-03-30 2010-08-27 Soitec Silicon On Insulator Substrat chauffage dope
FR2927218B1 (fr) * 2008-02-06 2010-03-05 Hydromecanique & Frottement Procede de fabrication d'un element chauffant par depot de couches minces sur un substrat isolant et l'element obtenu

Also Published As

Publication number Publication date
FR2914488A1 (fr) 2008-10-03
US20100044705A1 (en) 2010-02-25
US8198628B2 (en) 2012-06-12
WO2008120092A1 (fr) 2008-10-09

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