FR2864732B1 - PHASE STACK LOOP - Google Patents
PHASE STACK LOOPInfo
- Publication number
- FR2864732B1 FR2864732B1 FR0315414A FR0315414A FR2864732B1 FR 2864732 B1 FR2864732 B1 FR 2864732B1 FR 0315414 A FR0315414 A FR 0315414A FR 0315414 A FR0315414 A FR 0315414A FR 2864732 B1 FR2864732 B1 FR 2864732B1
- Authority
- FR
- France
- Prior art keywords
- phase stack
- stack loop
- loop
- phase
- stack
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C3/00—Angle modulation
- H03C3/02—Details
- H03C3/09—Modifications of modulator for regulating the mean frequency
- H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
- H03C3/0916—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop
- H03C3/0925—Modifications of modulator for regulating the mean frequency using a phase locked loop with frequency divider or counter in the loop applying frequency modulation at the divider in the feedback loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
- H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0315414A FR2864732B1 (en) | 2003-12-24 | 2003-12-24 | PHASE STACK LOOP |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0315414A FR2864732B1 (en) | 2003-12-24 | 2003-12-24 | PHASE STACK LOOP |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2864732A1 FR2864732A1 (en) | 2005-07-01 |
FR2864732B1 true FR2864732B1 (en) | 2006-08-11 |
Family
ID=34639618
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0315414A Expired - Lifetime FR2864732B1 (en) | 2003-12-24 | 2003-12-24 | PHASE STACK LOOP |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR2864732B1 (en) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE69926215D1 (en) * | 1999-04-21 | 2005-08-25 | St Microelectronics Srl | Method and circuit for minimizing interference in phase locked loops |
JP4138264B2 (en) * | 2001-03-16 | 2008-08-27 | 富士通株式会社 | PLL frequency synthesizer |
TW513860B (en) * | 2001-09-12 | 2002-12-11 | Via Tech Inc | Clock and data recovery circuit and related method |
DE10210057A1 (en) * | 2002-03-08 | 2003-09-18 | Michael Pierschel | Phase locked loop for frequency synthesis has noise signal suppression, filter capacitance is divided into two sub-capacitances, switch introduced between sub-capacitances opens during noise pulse |
-
2003
- 2003-12-24 FR FR0315414A patent/FR2864732B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
FR2864732A1 (en) | 2005-07-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
CD | Change of name or company name | ||
CA | Change of address |
Effective date: 20130722 |
|
TP | Transmission of property |
Owner name: CASSIDIAN SAS, FR Effective date: 20130722 |
|
CD | Change of name or company name |
Owner name: AIRBUS DS SAS, FR Effective date: 20150106 |
|
PLFP | Fee payment |
Year of fee payment: 13 |
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PLFP | Fee payment |
Year of fee payment: 14 |
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PLFP | Fee payment |
Year of fee payment: 15 |
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PLFP | Fee payment |
Year of fee payment: 17 |
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PLFP | Fee payment |
Year of fee payment: 18 |
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PLFP | Fee payment |
Year of fee payment: 19 |
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PLFP | Fee payment |
Year of fee payment: 20 |