FR2856194B1 - Procede perfectionne de recuit de stabilisation - Google Patents

Procede perfectionne de recuit de stabilisation

Info

Publication number
FR2856194B1
FR2856194B1 FR0306920A FR0306920A FR2856194B1 FR 2856194 B1 FR2856194 B1 FR 2856194B1 FR 0306920 A FR0306920 A FR 0306920A FR 0306920 A FR0306920 A FR 0306920A FR 2856194 B1 FR2856194 B1 FR 2856194B1
Authority
FR
France
Prior art keywords
recovery method
improved stabilization
stabilization recovery
improved
stabilization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR0306920A
Other languages
English (en)
Other versions
FR2856194A1 (fr
Inventor
Walter Schwarzenbach
Jean Marc Waechter
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Priority to FR0306920A priority Critical patent/FR2856194B1/fr
Priority to US10/863,352 priority patent/US7098148B2/en
Priority to PCT/FR2004/001449 priority patent/WO2004112124A2/fr
Priority to EP04767314A priority patent/EP1639633A2/fr
Priority to JP2006516283A priority patent/JP4949021B2/ja
Publication of FR2856194A1 publication Critical patent/FR2856194A1/fr
Application granted granted Critical
Publication of FR2856194B1 publication Critical patent/FR2856194B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Laminated Bodies (AREA)
FR0306920A 2003-06-10 2003-06-10 Procede perfectionne de recuit de stabilisation Expired - Lifetime FR2856194B1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR0306920A FR2856194B1 (fr) 2003-06-10 2003-06-10 Procede perfectionne de recuit de stabilisation
US10/863,352 US7098148B2 (en) 2003-06-10 2004-06-09 Method for heat treating a semiconductor wafer
PCT/FR2004/001449 WO2004112124A2 (fr) 2003-06-10 2004-06-10 Procede perfectionne de recuit de stabilisation
EP04767314A EP1639633A2 (fr) 2003-06-10 2004-06-10 Procede perfectionne de recuit de stabilisation
JP2006516283A JP4949021B2 (ja) 2003-06-10 2004-06-10 改良された安定化アニール方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0306920A FR2856194B1 (fr) 2003-06-10 2003-06-10 Procede perfectionne de recuit de stabilisation

Publications (2)

Publication Number Publication Date
FR2856194A1 FR2856194A1 (fr) 2004-12-17
FR2856194B1 true FR2856194B1 (fr) 2005-08-26

Family

ID=33484295

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0306920A Expired - Lifetime FR2856194B1 (fr) 2003-06-10 2003-06-10 Procede perfectionne de recuit de stabilisation

Country Status (4)

Country Link
EP (1) EP1639633A2 (fr)
JP (1) JP4949021B2 (fr)
FR (1) FR2856194B1 (fr)
WO (1) WO2004112124A2 (fr)

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4437922A (en) * 1982-03-26 1984-03-20 International Business Machines Corporation Method for tailoring oxygen precipitate particle density and distribution silicon wafers
US4804633A (en) * 1988-02-18 1989-02-14 Northern Telecom Limited Silicon-on-insulator substrates annealed in polysilicon tube
JPH03166733A (ja) * 1989-11-27 1991-07-18 Olympus Optical Co Ltd 半導体装置の製造方法
JP2752799B2 (ja) * 1991-03-27 1998-05-18 三菱マテリアル株式会社 Soi基板の製造方法
JPH0845946A (ja) * 1994-08-01 1996-02-16 Hitachi Ltd シリコン半導体単結晶基板の熱処理方法及び熱処理装置、半導体装置
US5788763A (en) * 1995-03-09 1998-08-04 Toshiba Ceramics Co., Ltd. Manufacturing method of a silicon wafer having a controlled BMD concentration
FR2777115B1 (fr) * 1998-04-07 2001-07-13 Commissariat Energie Atomique Procede de traitement de substrats semi-conducteurs et structures obtenues par ce procede
JP3956271B2 (ja) * 2000-10-26 2007-08-08 株式会社Sumco シリコンウェーハの製造方法
JP3927778B2 (ja) * 2001-07-09 2007-06-13 住友電気工業株式会社 エピタキシャルウエハとその製造方法

Also Published As

Publication number Publication date
WO2004112124A2 (fr) 2004-12-23
EP1639633A2 (fr) 2006-03-29
FR2856194A1 (fr) 2004-12-17
WO2004112124A3 (fr) 2005-05-12
JP4949021B2 (ja) 2012-06-06
JP2006527493A (ja) 2006-11-30

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