FR2846786B1 - Procede de recuit thermique rapide de tranches a couronne - Google Patents

Procede de recuit thermique rapide de tranches a couronne

Info

Publication number
FR2846786B1
FR2846786B1 FR0213810A FR0213810A FR2846786B1 FR 2846786 B1 FR2846786 B1 FR 2846786B1 FR 0213810 A FR0213810 A FR 0213810A FR 0213810 A FR0213810 A FR 0213810A FR 2846786 B1 FR2846786 B1 FR 2846786B1
Authority
FR
France
Prior art keywords
crown
wafers
wafer
thermal recovery
quick thermal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR0213810A
Other languages
English (en)
Other versions
FR2846786A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to FR0213810A priority Critical patent/FR2846786B1/fr
Priority to FR0300286A priority patent/FR2846787B1/fr
Priority to AU2003280109A priority patent/AU2003280109A1/en
Priority to KR1020057008087A priority patent/KR100814998B1/ko
Priority to JP2005502143A priority patent/JP4772501B2/ja
Priority to AT03772490T priority patent/ATE528790T1/de
Priority to CNB2003801027637A priority patent/CN100541739C/zh
Priority to EP03772490A priority patent/EP1559136B1/fr
Priority to EP10176486A priority patent/EP2330616A3/fr
Priority to US10/700,885 priority patent/US6853802B2/en
Priority to PCT/IB2003/005295 priority patent/WO2004042802A2/fr
Priority to TW092130768A priority patent/TWI278937B/zh
Publication of FR2846786A1 publication Critical patent/FR2846786A1/fr
Priority to US11/008,928 priority patent/US7049250B2/en
Application granted granted Critical
Publication of FR2846786B1 publication Critical patent/FR2846786B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H01L21/3247—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering for altering the shape, e.g. smoothing the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67103—Apparatus for thermal treatment mainly by conduction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Formation Of Insulating Films (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
FR0213810A 2002-11-05 2002-11-05 Procede de recuit thermique rapide de tranches a couronne Expired - Lifetime FR2846786B1 (fr)

Priority Applications (13)

Application Number Priority Date Filing Date Title
FR0213810A FR2846786B1 (fr) 2002-11-05 2002-11-05 Procede de recuit thermique rapide de tranches a couronne
FR0300286A FR2846787B1 (fr) 2002-11-05 2003-01-13 Procede de recuit thermique rapide de tranches a couronne
US10/700,885 US6853802B2 (en) 2002-11-05 2003-11-03 Heat treatment for edges of multilayer semiconductor wafers
JP2005502143A JP4772501B2 (ja) 2002-11-05 2003-11-03 縁部を有する多層ウェハの急速熱アニール方法
AT03772490T ATE528790T1 (de) 2002-11-05 2003-11-03 Verfahren zum schnellen tempern von mehrschicht- wafern mit einer kante
CNB2003801027637A CN100541739C (zh) 2002-11-05 2003-11-03 快速热退火具有边缘的多层晶片的方法
AU2003280109A AU2003280109A1 (en) 2002-11-05 2003-11-03 A method of rapidly thermally annealing multilayer wafers with an edge
EP10176486A EP2330616A3 (fr) 2002-11-05 2003-11-03 Procédé de recuit thermique rapide de tranches à couronne
KR1020057008087A KR100814998B1 (ko) 2002-11-05 2003-11-03 에지를 가지는 다중층 웨이퍼의 급속 열적 어닐링 방법
PCT/IB2003/005295 WO2004042802A2 (fr) 2002-11-05 2003-11-03 Procede de recuit thermique rapide de tranches multicouches comportant un bord
EP03772490A EP1559136B1 (fr) 2002-11-05 2003-11-03 Procede de recuit thermique rapide de tranches multicouches comportant un bord
TW092130768A TWI278937B (en) 2002-11-05 2003-11-04 A method of rapidly thermally annealing multilayer wafers with an edge
US11/008,928 US7049250B2 (en) 2002-11-05 2004-12-13 Heat treatment for edges of multilayer semiconductor wafers

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0213810A FR2846786B1 (fr) 2002-11-05 2002-11-05 Procede de recuit thermique rapide de tranches a couronne
FR0300286A FR2846787B1 (fr) 2002-11-05 2003-01-13 Procede de recuit thermique rapide de tranches a couronne

Publications (2)

Publication Number Publication Date
FR2846786A1 FR2846786A1 (fr) 2004-05-07
FR2846786B1 true FR2846786B1 (fr) 2005-06-17

Family

ID=32109208

Family Applications (2)

Application Number Title Priority Date Filing Date
FR0213810A Expired - Lifetime FR2846786B1 (fr) 2002-11-05 2002-11-05 Procede de recuit thermique rapide de tranches a couronne
FR0300286A Expired - Lifetime FR2846787B1 (fr) 2002-11-05 2003-01-13 Procede de recuit thermique rapide de tranches a couronne

Family Applications After (1)

Application Number Title Priority Date Filing Date
FR0300286A Expired - Lifetime FR2846787B1 (fr) 2002-11-05 2003-01-13 Procede de recuit thermique rapide de tranches a couronne

Country Status (10)

Country Link
US (2) US6853802B2 (fr)
EP (2) EP2330616A3 (fr)
JP (1) JP4772501B2 (fr)
KR (1) KR100814998B1 (fr)
CN (1) CN100541739C (fr)
AT (1) ATE528790T1 (fr)
AU (1) AU2003280109A1 (fr)
FR (2) FR2846786B1 (fr)
TW (1) TWI278937B (fr)
WO (1) WO2004042802A2 (fr)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2846786B1 (fr) * 2002-11-05 2005-06-17 Procede de recuit thermique rapide de tranches a couronne
US7127367B2 (en) * 2003-10-27 2006-10-24 Applied Materials, Inc. Tailored temperature uniformity
US20080090309A1 (en) * 2003-10-27 2008-04-17 Ranish Joseph M Controlled annealing method
US8536492B2 (en) * 2003-10-27 2013-09-17 Applied Materials, Inc. Processing multilayer semiconductors with multiple heat sources
JP4826994B2 (ja) * 2004-09-13 2011-11-30 信越半導体株式会社 Ｓｏｉウェーハの製造方法
US7788589B2 (en) * 2004-09-30 2010-08-31 Microsoft Corporation Method and system for improved electronic task flagging and management
ATE441206T1 (de) * 2004-12-28 2009-09-15 Soitec Silicon On Insulator Verfahren zum erhalten einer dünnen schicht mit einer geringen dichte von líchern
FR2880988B1 (fr) * 2005-01-19 2007-03-30 Soitec Silicon On Insulator TRAITEMENT D'UNE COUCHE EN SI1-yGEy PRELEVEE
JP4786925B2 (ja) * 2005-04-04 2011-10-05 東京エレクトロン株式会社 基板処理方法および基板処理装置
US7700376B2 (en) * 2005-04-06 2010-04-20 Applied Materials, Inc. Edge temperature compensation in thermal processing particularly useful for SOI wafers
DE602005009159D1 (de) * 2005-06-10 2008-10-02 Soitec Silicon On Insulator Kalibrierverfahren für Apparaturen zur thermischen Behandlung
FR2895563B1 (fr) * 2005-12-22 2008-04-04 Soitec Silicon On Insulator Procede de simplification d'une sequence de finition et structure obtenue par le procede
JP5168788B2 (ja) * 2006-01-23 2013-03-27 信越半導体株式会社 Ｓｏｉウエーハの製造方法
FR2899382B1 (fr) * 2006-03-29 2008-08-22 Soitec Silicon On Insulator Procede de fabrication de structures soi avec limitation des lignes de glissement
EP1918349A1 (fr) * 2006-10-12 2008-05-07 SOLVAY (Société Anonyme) Matériau luminescent
US7860379B2 (en) * 2007-01-15 2010-12-28 Applied Materials, Inc. Temperature measurement and control of wafer support in thermal processing chamber
US8222574B2 (en) * 2007-01-15 2012-07-17 Applied Materials, Inc. Temperature measurement and control of wafer support in thermal processing chamber
US8111978B2 (en) * 2008-07-11 2012-02-07 Applied Materials, Inc. Rapid thermal processing chamber with shower head
FR2941324B1 (fr) * 2009-01-22 2011-04-29 Soitec Silicon On Insulator Procede de dissolution de la couche d'oxyde dans la couronne d'une structure de type semi-conducteur sur isolant.
US7927975B2 (en) * 2009-02-04 2011-04-19 Micron Technology, Inc. Semiconductor material manufacture
CN102479690B (zh) * 2010-11-23 2013-12-11 中芯国际集成电路制造(上海)有限公司 提高晶圆上源漏极退火时工作电流均匀性的方法
US9814099B2 (en) * 2013-08-02 2017-11-07 Applied Materials, Inc. Substrate support with surface feature for reduced reflection and manufacturing techniques for producing same
CN108603290B (zh) * 2015-10-01 2021-09-10 环球晶圆股份有限公司 Cvd设备

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62128525A (ja) * 1985-11-29 1987-06-10 Matsushita Electric Ind Co Ltd 化合物半導体基板のアニ−ル方法
KR0155545B1 (ko) * 1988-06-27 1998-12-01 고다까 토시오 기판의 열처리 장치
US5011794A (en) 1989-05-01 1991-04-30 At&T Bell Laboratories Procedure for rapid thermal annealing of implanted semiconductors
DE69118513T2 (de) * 1990-01-19 1996-10-02 Applied Materials Inc Vorrichtung zum erwärmen von halbleiterscheiben oder -substraten
JP3563224B2 (ja) * 1996-03-25 2004-09-08 住友電気工業株式会社 半導体ウエハの評価方法、熱処理方法、および熱処理装置
US5937142A (en) * 1996-07-11 1999-08-10 Cvc Products, Inc. Multi-zone illuminator for rapid thermal processing
US6051512A (en) * 1997-04-11 2000-04-18 Steag Rtp Systems Apparatus and method for rapid thermal processing (RTP) of a plurality of semiconductor wafers
US6303411B1 (en) * 1999-05-03 2001-10-16 Vortek Industries Ltd. Spatially resolved temperature measurement and irradiance control
DE19936081A1 (de) * 1999-07-30 2001-02-08 Siemens Ag Vorrichtung und Verfahren zum Temperieren eines Mehrschichtkörpers, sowie ein unter Anwendung des Verfahrens hergestellter Mehrschichtkörper
US7037797B1 (en) * 2000-03-17 2006-05-02 Mattson Technology, Inc. Localized heating and cooling of substrates
EP1189266B1 (fr) * 2000-03-29 2017-04-05 Shin-Etsu Handotai Co., Ltd. Procede d'obtention de tranches de silicium ou de soi et tranches ainsi obtenues
JP2002184961A (ja) * 2000-09-29 2002-06-28 Canon Inc Ｓｏｉ基板の熱処理方法およびｓｏｉ基板
TW540121B (en) * 2000-10-10 2003-07-01 Ushio Electric Inc Heat treatment device and process with light irradiation
JP2002118071A (ja) * 2000-10-10 2002-04-19 Ushio Inc 光照射式加熱処理装置及び方法
FR2846786B1 (fr) * 2002-11-05 2005-06-17 Procede de recuit thermique rapide de tranches a couronne

Also Published As

Publication number Publication date
EP2330616A3 (fr) 2011-12-07
US20040151483A1 (en) 2004-08-05
JP4772501B2 (ja) 2011-09-14
CN1711629A (zh) 2005-12-21
US7049250B2 (en) 2006-05-23
AU2003280109A8 (en) 2004-06-07
WO2004042802A3 (fr) 2004-08-12
AU2003280109A1 (en) 2004-06-07
WO2004042802A2 (fr) 2004-05-21
JP2006505959A (ja) 2006-02-16
US6853802B2 (en) 2005-02-08
FR2846787B1 (fr) 2005-12-30
FR2846787A1 (fr) 2004-05-07
EP2330616A2 (fr) 2011-06-08
KR20050062653A (ko) 2005-06-23
CN100541739C (zh) 2009-09-16
TWI278937B (en) 2007-04-11
FR2846786A1 (fr) 2004-05-07
US20050094990A1 (en) 2005-05-05
TW200416895A (en) 2004-09-01
KR100814998B1 (ko) 2008-03-18
EP1559136B1 (fr) 2011-10-12
EP1559136A2 (fr) 2005-08-03
ATE528790T1 (de) 2011-10-15

Similar Documents

Publication Publication Date Title
FR2846786B1 (fr) Procede de recuit thermique rapide de tranches a couronne
WO2006110217A3 (fr) Traitement thermique rapide au moyen de couches de transfert d'energie
DE502007003501D1 (de) Nden halbleiterwafers und halbleiterbauelement
US8999090B2 (en) Process for bonding two substrates
DE60133092D1 (de) Örtliche erwärmung und kühlung von substraten
HK1070985A1 (en) Method for thermally treating substrates
WO2002071446A3 (fr) Procédé et dispositif de régulation de la température active des suscepteurs
WO2006130573A3 (fr) Optimisation du bilan thermique au cours d'un processus de chauffage pulse
SG131859A1 (en) Method and apparatus for peeling surface protective film
WO2006099498A3 (fr) Appareil de metrologie de plaquette semi-conductrice et methodes associees
TW200727349A (en) Treatment of semiconductor wafers
JP2007168436A (ja) 脆性材料のディスク、特にウェーハの切断方法および切断装置
WO2002011196A1 (fr) Procede de fabrication de plaquette au silicium monocristallin
WO2004057260A3 (fr) Technique d'echange thermique
TW200607011A (en) Method of performing double side processes upon a wafer
ATE330791T1 (de) Vorrichtung und verfahren zum flächigen zusammendrücken zu verbindender scheibenförmiger elemente
JP2004214400A5 (fr)
JP2002538624A5 (fr)
WO2004059695A3 (fr) Procede et dispositif de traitement thermique de substrats en forme de disque
JP2002184714A (ja) 炭化珪素半導体装置の製造方法
TW200614460A (en) A heating method for rapid thermal process
TW290719B (en) The manufacturing method of reducing silicide loss in pre-metal etching process
TW200507015A (en) Semiconductor substrate surface preparation using high temperature convection heating
ES2048997T3 (es) Procedimiento y dispositivo de obtencion de hojas de vidrio abombadas y/o esmaltadas.
TW200625384A (en) Heater for heating a wafer and method for preventing contamination of the heater

Legal Events

Date Code Title Description
CD Change of name or company name

Owner name: SOITEC, FR

Effective date: 20120423

PLFP Fee payment

Year of fee payment: 14

PLFP Fee payment

Year of fee payment: 15

PLFP Fee payment

Year of fee payment: 16

PLFP Fee payment

Year of fee payment: 17

PLFP Fee payment

Year of fee payment: 18

PLFP Fee payment

Year of fee payment: 19

PLFP Fee payment

Year of fee payment: 20