FR2845201B1 - Procede de formation de portions d'un materiau compose a l'interieur d'une cavite et circuit electrique incorporant des portions de materiau compose ainsi obtenues - Google Patents
Procede de formation de portions d'un materiau compose a l'interieur d'une cavite et circuit electrique incorporant des portions de materiau compose ainsi obtenuesInfo
- Publication number
- FR2845201B1 FR2845201B1 FR0211989A FR0211989A FR2845201B1 FR 2845201 B1 FR2845201 B1 FR 2845201B1 FR 0211989 A FR0211989 A FR 0211989A FR 0211989 A FR0211989 A FR 0211989A FR 2845201 B1 FR2845201 B1 FR 2845201B1
- Authority
- FR
- France
- Prior art keywords
- portions
- compound
- cavity
- formation
- electric circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 150000001875 compounds Chemical class 0.000 title 2
- 230000015572 biosynthetic process Effects 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49158—Manufacturing circuit on or in base with molding of insulated base
- Y10T29/4916—Simultaneous circuit manufacturing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
- Y10T29/49167—Manufacturing circuit on or in base by forming conductive walled aperture in base with deforming of conductive path
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0211989A FR2845201B1 (fr) | 2002-09-27 | 2002-09-27 | Procede de formation de portions d'un materiau compose a l'interieur d'une cavite et circuit electrique incorporant des portions de materiau compose ainsi obtenues |
US10/657,514 US7188411B2 (en) | 2002-09-27 | 2003-09-08 | Process for forming portions of a compound material inside a cavity |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0211989A FR2845201B1 (fr) | 2002-09-27 | 2002-09-27 | Procede de formation de portions d'un materiau compose a l'interieur d'une cavite et circuit electrique incorporant des portions de materiau compose ainsi obtenues |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2845201A1 FR2845201A1 (fr) | 2004-04-02 |
FR2845201B1 true FR2845201B1 (fr) | 2005-08-05 |
Family
ID=31985291
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0211989A Expired - Fee Related FR2845201B1 (fr) | 2002-09-27 | 2002-09-27 | Procede de formation de portions d'un materiau compose a l'interieur d'une cavite et circuit electrique incorporant des portions de materiau compose ainsi obtenues |
Country Status (2)
Country | Link |
---|---|
US (1) | US7188411B2 (fr) |
FR (1) | FR2845201B1 (fr) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1480266A3 (fr) * | 2003-05-20 | 2006-03-15 | STMicroelectronics S.A. | Procédé de réalisation d'un circuit électronique intégré comprenant des composants superposés et circuit électronique intégré ainsi obtenu |
CN101903992B (zh) * | 2007-12-21 | 2012-06-27 | Nxp股份有限公司 | 用于平面独立栅或环栅晶体管的改进的制造方法 |
FR2928029B1 (fr) * | 2008-02-27 | 2011-04-08 | St Microelectronics Crolles 2 | Procede de fabrication d'un dispositif semi-conducteur a grille enterree et circuit integre correspondant. |
FR2928028B1 (fr) * | 2008-02-27 | 2011-07-15 | St Microelectronics Crolles 2 | Procede de fabrication d'un dispositif semi-conducteur a grille enterree et circuit integre correspondant. |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3256A (en) * | 1843-09-09 | Improvement in disti lling alcohol | ||
JPH02302044A (ja) * | 1989-05-16 | 1990-12-14 | Fujitsu Ltd | 半導体装置の製造方法 |
JP3460863B2 (ja) * | 1993-09-17 | 2003-10-27 | 三菱電機株式会社 | 半導体装置の製造方法 |
US5497019A (en) * | 1994-09-22 | 1996-03-05 | The Aerospace Corporation | Silicon-on-insulator gate-all-around MOSFET devices and fabrication methods |
US5736435A (en) * | 1995-07-03 | 1998-04-07 | Motorola, Inc. | Process for fabricating a fully self-aligned soi mosfet |
KR100230418B1 (ko) * | 1997-04-17 | 1999-11-15 | 윤종용 | 백금족 금속층 형성방법 및 이를 이용한 커패시터 제조방법 |
FR2799305B1 (fr) * | 1999-10-05 | 2004-06-18 | St Microelectronics Sa | Procede de fabrication d'un dispositif semi-conducteur a grille enveloppante et dispositif obtenu |
JP2002151688A (ja) * | 2000-08-28 | 2002-05-24 | Mitsubishi Electric Corp | Mos型半導体装置およびその製造方法 |
-
2002
- 2002-09-27 FR FR0211989A patent/FR2845201B1/fr not_active Expired - Fee Related
-
2003
- 2003-09-08 US US10/657,514 patent/US7188411B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20040124468A1 (en) | 2004-07-01 |
US7188411B2 (en) | 2007-03-13 |
FR2845201A1 (fr) | 2004-04-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |
Effective date: 20100531 |