FR2842647B1 - Procede de transfert de couche - Google Patents

Procede de transfert de couche

Info

Publication number
FR2842647B1
FR2842647B1 FR0209018A FR0209018A FR2842647B1 FR 2842647 B1 FR2842647 B1 FR 2842647B1 FR 0209018 A FR0209018 A FR 0209018A FR 0209018 A FR0209018 A FR 0209018A FR 2842647 B1 FR2842647 B1 FR 2842647B1
Authority
FR
France
Prior art keywords
substrate
source
support
recess
front face
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0209018A
Other languages
English (en)
Other versions
FR2842647A1 (fr
Inventor
Bernard Aspar
Severine Bressot
Olivier Rayssac
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Soitec SA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR0209018A priority Critical patent/FR2842647B1/fr
Priority to US10/616,586 priority patent/US6913971B2/en
Priority to AT03763890T priority patent/ATE498201T1/de
Priority to EP03763890A priority patent/EP1543553B1/fr
Priority to TW092119343A priority patent/TWI286816B/zh
Priority to AU2003250992A priority patent/AU2003250992A1/en
Priority to DE60335995T priority patent/DE60335995D1/de
Priority to PCT/EP2003/007853 priority patent/WO2004008526A1/fr
Priority to JP2004520666A priority patent/JP4740590B2/ja
Priority to MYPI20032677A priority patent/MY135493A/en
Publication of FR2842647A1 publication Critical patent/FR2842647A1/fr
Application granted granted Critical
Publication of FR2842647B1 publication Critical patent/FR2842647B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76259Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along a porous layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
FR0209018A 2002-07-17 2002-07-17 Procede de transfert de couche Expired - Fee Related FR2842647B1 (fr)

Priority Applications (10)

Application Number Priority Date Filing Date Title
FR0209018A FR2842647B1 (fr) 2002-07-17 2002-07-17 Procede de transfert de couche
US10/616,586 US6913971B2 (en) 2002-07-17 2003-07-09 Layer transfer methods
EP03763890A EP1543553B1 (fr) 2002-07-17 2003-07-16 Procede de transfert de couche
TW092119343A TWI286816B (en) 2002-07-17 2003-07-16 A layer transfer method
AU2003250992A AU2003250992A1 (en) 2002-07-17 2003-07-16 A layer transfer method
DE60335995T DE60335995D1 (de) 2002-07-17 2003-07-16 Schichtentransferverfahren
AT03763890T ATE498201T1 (de) 2002-07-17 2003-07-16 Schichtentransferverfahren
PCT/EP2003/007853 WO2004008526A1 (fr) 2002-07-17 2003-07-16 Procede de transfert de couche
JP2004520666A JP4740590B2 (ja) 2002-07-17 2003-07-16 層転写方法
MYPI20032677A MY135493A (en) 2002-07-17 2003-07-17 Layer transfer methods

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0209018A FR2842647B1 (fr) 2002-07-17 2002-07-17 Procede de transfert de couche

Publications (2)

Publication Number Publication Date
FR2842647A1 FR2842647A1 (fr) 2004-01-23
FR2842647B1 true FR2842647B1 (fr) 2004-09-17

Family

ID=29797483

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0209018A Expired - Fee Related FR2842647B1 (fr) 2002-07-17 2002-07-17 Procede de transfert de couche

Country Status (10)

Country Link
US (1) US6913971B2 (fr)
EP (1) EP1543553B1 (fr)
JP (1) JP4740590B2 (fr)
AT (1) ATE498201T1 (fr)
AU (1) AU2003250992A1 (fr)
DE (1) DE60335995D1 (fr)
FR (1) FR2842647B1 (fr)
MY (1) MY135493A (fr)
TW (1) TWI286816B (fr)
WO (1) WO2004008526A1 (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1571705A3 (fr) * 2004-03-01 2006-01-04 S.O.I.Tec Silicon on Insulator Technologies Réalisation d'une entité en matériau semiconducteur sur substrat
EP1978554A3 (fr) * 2007-04-06 2011-10-12 Semiconductor Energy Laboratory Co., Ltd. Procédé de fabrication d'un substrat semi-conducteur comprenant des étapes d'implantation et de séparation.
FR2939962B1 (fr) * 2008-12-15 2011-03-18 Soitec Silicon On Insulator Procede d'amincissement d'une structure.
US7927975B2 (en) 2009-02-04 2011-04-19 Micron Technology, Inc. Semiconductor material manufacture
US9847243B2 (en) 2009-08-27 2017-12-19 Corning Incorporated Debonding a glass substrate from carrier using ultrasonic wave
WO2011144226A1 (fr) * 2010-05-20 2011-11-24 Ev Group E. Thallner Gmbh Procédé de fabrication d'empilements de puces ainsi que support pour la mise en œuvre du procédé
FR2961948B1 (fr) * 2010-06-23 2012-08-03 Soitec Silicon On Insulator Procede de traitement d'une piece en materiau compose
JP5939881B2 (ja) * 2012-05-02 2016-06-22 株式会社ディスコ 研削方法
WO2014020387A1 (fr) 2012-07-31 2014-02-06 Soitec Procédés de formation de structures semi-conductrices incluant des dispositifs de microsystème électromécanique et des circuits intégrés sur les côtés opposés de substrats, et structures ainsi que dispositifs connexes
DE102014102917B4 (de) * 2013-03-05 2024-01-18 Flextronics Ap, Llc Bauteil mit Abzugsstrecken, Halbleiterbaugruppe mit Druckentlastungsstruktur und Verfahren zur Verhinderung von Druckaufbau in einer Halbleiterverpackung

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61208842A (ja) * 1985-03-14 1986-09-17 Nippon Telegr & Teleph Corp <Ntt> 半導体ウエハ支持基板
JPH0521480A (ja) * 1991-07-12 1993-01-29 Dainippon Printing Co Ltd リードフレーム
FR2681472B1 (fr) * 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
JPH0737768A (ja) * 1992-11-26 1995-02-07 Sumitomo Electric Ind Ltd 半導体ウェハの補強方法及び補強された半導体ウェハ
JPH07335817A (ja) * 1994-06-10 1995-12-22 Dainippon Printing Co Ltd リードフレーム部材
JPH0963912A (ja) * 1995-08-18 1997-03-07 Hoya Corp 貼り合わせ基板製造方法
JPH09232199A (ja) * 1996-02-27 1997-09-05 Victor Co Of Japan Ltd 薄膜プロセス用複合ウェハ基板
ATE261612T1 (de) * 1996-12-18 2004-03-15 Canon Kk Vefahren zum herstellen eines halbleiterartikels unter verwendung eines substrates mit einer porösen halbleiterschicht
US6534380B1 (en) * 1997-07-18 2003-03-18 Denso Corporation Semiconductor substrate and method of manufacturing the same
US6406336B1 (en) 1998-01-20 2002-06-18 Fci Americas Technology, Inc. Contact with anti-skiving feature
US6054370A (en) * 1998-06-30 2000-04-25 Intel Corporation Method of delaminating a pre-fabricated transistor layer from a substrate for placement on another wafer
FR2781925B1 (fr) * 1998-07-30 2001-11-23 Commissariat Energie Atomique Transfert selectif d'elements d'un support vers un autre support
JP2000223683A (ja) 1999-02-02 2000-08-11 Canon Inc 複合部材及びその分離方法、貼り合わせ基板及びその分離方法、移設層の移設方法、並びにsoi基板の製造方法
US6236103B1 (en) * 1999-03-31 2001-05-22 International Business Machines Corp. Integrated high-performance decoupling capacitor and heat sink
US6406636B1 (en) * 1999-06-02 2002-06-18 Megasense, Inc. Methods for wafer to wafer bonding using microstructures
JP2001007362A (ja) * 1999-06-17 2001-01-12 Canon Inc 半導体基材および太陽電池の製造方法
JP2001196566A (ja) * 2000-01-07 2001-07-19 Sony Corp 半導体基板およびその製造方法
JP4361658B2 (ja) * 2000-02-14 2009-11-11 富士通マイクロエレクトロニクス株式会社 実装基板及び実装方法
JP2001296650A (ja) * 2000-04-17 2001-10-26 Nec Corp レチクル
FR2811807B1 (fr) * 2000-07-12 2003-07-04 Commissariat Energie Atomique Procede de decoupage d'un bloc de materiau et de formation d'un film mince
CA2433738C (fr) * 2001-01-02 2012-07-24 The Charles Stark Draper Laboratory, Inc. Procede de microusinage de structures utilisant un materiau de silicium sur isolant
FR2837620B1 (fr) * 2002-03-25 2005-04-29 Commissariat Energie Atomique Procede de transfert d'elements de substrat a substrat

Also Published As

Publication number Publication date
WO2004008526A1 (fr) 2004-01-22
AU2003250992A8 (en) 2004-02-02
FR2842647A1 (fr) 2004-01-23
US20040082147A1 (en) 2004-04-29
MY135493A (en) 2008-04-30
EP1543553B1 (fr) 2011-02-09
DE60335995D1 (de) 2011-03-24
TWI286816B (en) 2007-09-11
TW200416943A (en) 2004-09-01
AU2003250992A1 (en) 2004-02-02
ATE498201T1 (de) 2011-02-15
JP2005533374A (ja) 2005-11-04
EP1543553A1 (fr) 2005-06-22
US6913971B2 (en) 2005-07-05
JP4740590B2 (ja) 2011-08-03

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Legal Events

Date Code Title Description
CD Change of name or company name

Owner name: COMMISSARIAT A L'ENERGIE ATOMIQUE, FR

Effective date: 20120423

Owner name: SOITEC, FR

Effective date: 20120423

PLFP Fee payment

Year of fee payment: 14

ST Notification of lapse

Effective date: 20170331