FR2833781B1 - Circuit integre comprenant un generateur d'horloge, carte a puce comprenant un tel circuit integre et procede de generation d'horloge associe - Google Patents

Circuit integre comprenant un generateur d'horloge, carte a puce comprenant un tel circuit integre et procede de generation d'horloge associe

Info

Publication number
FR2833781B1
FR2833781B1 FR0116066A FR0116066A FR2833781B1 FR 2833781 B1 FR2833781 B1 FR 2833781B1 FR 0116066 A FR0116066 A FR 0116066A FR 0116066 A FR0116066 A FR 0116066A FR 2833781 B1 FR2833781 B1 FR 2833781B1
Authority
FR
France
Prior art keywords
integrated circuit
generation method
chip card
card including
clock generator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0116066A
Other languages
English (en)
Other versions
FR2833781A1 (fr
Inventor
Christophe Moreaux
Ahmed Kari
Olivier Tardieu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0116066A priority Critical patent/FR2833781B1/fr
Priority to US10/498,681 priority patent/US7400874B2/en
Priority to PCT/FR2002/004280 priority patent/WO2003050955A2/fr
Priority to EP02796907A priority patent/EP1456950A2/fr
Publication of FR2833781A1 publication Critical patent/FR2833781A1/fr
Application granted granted Critical
Publication of FR2833781B1 publication Critical patent/FR2833781B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
    • H03K5/2472—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
    • H03K5/2481—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors with at least one differential stage
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0723—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/125—Discriminating pulses

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Manipulation Of Pulses (AREA)
  • Semiconductor Integrated Circuits (AREA)
FR0116066A 2001-12-13 2001-12-13 Circuit integre comprenant un generateur d'horloge, carte a puce comprenant un tel circuit integre et procede de generation d'horloge associe Expired - Fee Related FR2833781B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR0116066A FR2833781B1 (fr) 2001-12-13 2001-12-13 Circuit integre comprenant un generateur d'horloge, carte a puce comprenant un tel circuit integre et procede de generation d'horloge associe
US10/498,681 US7400874B2 (en) 2001-12-13 2002-12-11 Integrated circuit comprising a clock-signal generator, smart card comprising an integrated circuit of this kind and associated method for the generation of clock signals
PCT/FR2002/004280 WO2003050955A2 (fr) 2001-12-13 2002-12-11 Circuit integre comprenant un generateur d'horloge, carte a puce comprenant un tel circuit integre et procede de generation d'horloge associe
EP02796907A EP1456950A2 (fr) 2001-12-13 2002-12-11 Circuit integre comprenant un generateur d'horloge, carte a puce comprenant un tel circuit integre et procede de generation d'horloge associe

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0116066A FR2833781B1 (fr) 2001-12-13 2001-12-13 Circuit integre comprenant un generateur d'horloge, carte a puce comprenant un tel circuit integre et procede de generation d'horloge associe

Publications (2)

Publication Number Publication Date
FR2833781A1 FR2833781A1 (fr) 2003-06-20
FR2833781B1 true FR2833781B1 (fr) 2004-03-12

Family

ID=8870395

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0116066A Expired - Fee Related FR2833781B1 (fr) 2001-12-13 2001-12-13 Circuit integre comprenant un generateur d'horloge, carte a puce comprenant un tel circuit integre et procede de generation d'horloge associe

Country Status (4)

Country Link
US (1) US7400874B2 (fr)
EP (1) EP1456950A2 (fr)
FR (1) FR2833781B1 (fr)
WO (1) WO2003050955A2 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2879754A1 (fr) * 2004-12-20 2006-06-23 St Microelectronics Sa Transpondeur electromagnetique depourvu d'alimentation autonome
JP5594890B2 (ja) * 2010-11-17 2014-09-24 ルネサスエレクトロニクス株式会社 非接触通信装置、非接触ｉｃカード及び形態情報端末
CN112327035B (zh) * 2020-10-21 2023-09-05 武汉光迅科技股份有限公司 一种射频半波电压的测量方法、装置及***

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2752839B2 (ja) * 1992-04-14 1998-05-18 シャープ株式会社 複合論理回路
ITBO940266A1 (it) * 1994-06-06 1995-12-06 Datalogic Spa Transponder passivo, particolarmente per un sistema di identificazione automatica a radiofrequenza.
US6097292A (en) * 1997-04-01 2000-08-01 Cubic Corporation Contactless proximity automated data collection system and method
FR2752076B1 (fr) 1996-08-05 1998-09-11 Inside Technologies Systeme d'alimentation electrique pour microcircuit a fonctionnement mixte, avec ou sans contact
US6009777A (en) * 1997-11-13 2000-01-04 Jarvis; Jack D. Socket wrench and ratchet attachment means
US6525410B1 (en) 1998-07-24 2003-02-25 Texas Instruments Incorporated Integrated circuit wireless tagging
US6368901B2 (en) * 1999-07-15 2002-04-09 Texas Instruments Incorporated Integrated circuit wireless tagging
TW453041B (en) * 2000-10-12 2001-09-01 Ind Tech Res Inst Analog phase frequency detecting device and method
US6907234B2 (en) * 2001-10-26 2005-06-14 Microsoft Corporation System and method for automatically tuning an antenna

Also Published As

Publication number Publication date
FR2833781A1 (fr) 2003-06-20
WO2003050955A3 (fr) 2004-05-13
US7400874B2 (en) 2008-07-15
EP1456950A2 (fr) 2004-09-15
US20050133603A1 (en) 2005-06-23
WO2003050955A2 (fr) 2003-06-19

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Legal Events

Date Code Title Description
ST Notification of lapse