FR2828334A1 - Procede pour rendre connectable electriquement et mecaniquement un dispositif electrique ayant une face munie de plots de contacts - Google Patents
Procede pour rendre connectable electriquement et mecaniquement un dispositif electrique ayant une face munie de plots de contacts Download PDFInfo
- Publication number
- FR2828334A1 FR2828334A1 FR0110483A FR0110483A FR2828334A1 FR 2828334 A1 FR2828334 A1 FR 2828334A1 FR 0110483 A FR0110483 A FR 0110483A FR 0110483 A FR0110483 A FR 0110483A FR 2828334 A1 FR2828334 A1 FR 2828334A1
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- France
- Prior art keywords
- fixing layer
- electrical
- face
- contact pads
- contact
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Abstract
Un dispositif électrique, par exemple une tranche de silicium (en anglais : wafer), comprend une face munie de plots de contact. Le dispositif électrique est rendu connectable mécaniquement et électriquement de la façon suivante. Une couche de fixage est déposée sur la face munie de plots de contact. La couche de fixage possède des propriétés d'adhérence. Par la suite la couche de fixage est munie de voies conductrices qui s'étendent à travers la couche de fixage au niveau des plots de contact. Le dispositif électrique ainsi traité peut être connecté électriquement et mécaniquement à un autre dispositif électrique d'une façon relativement aisée. Par exemple, une tranche de silicium (en anglais : wafer) peut être connecté à une autre tranche de silicium (en anglais : wafer) pour sécuriser les circuits compris dans les tranches de silicium (en anglais : wafers). Ceci est particulièrement avantageux dans le domaine des cartes à puces.
Description
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Procédé pour rendre connectable électriquement et mécaniquement un dispositif électrique ayant une face munie de plots de contacts Domaine de l'invention L'invention concerne la connexion électrique et mécanique d'un dispositif électrique à un autre dispositif électrique. L'un et l'autre pouvant être par exemple une tranche de silicium (en anglais : wafer), un circuit intégré ou même un simple composant.
L'invention est applicable notamment dans le domaine de la sécurisation des circuits intégrés et en particulier dans le domaine des cartes à puce.
Art antérieur Un procédé de connexion repose sur l'utilisation d'un film dit ACF-Anisotropic Conductor Film-. Ce type de film contient des éléments conducteurs s'étendant à travers l'épaisseur du film. Selon une première étape, le film est réalisé séparément sur un support neutre. Selon une deuxième étape, le film est récupéré délicatement par sous gravure. Selon une troisième étape le film est enduit de colle sur chacune de ses faces pour être appliqué ensuite sur un premier composant. Une dernière étape consiste à connecter un deuxième composant sur la partie du film non encore recouverte. Finalement les deux composants sont fixés mécaniquement grâce à la colle enduite sur les deux faces du film, et électriquement au moyen des éléments métalliques inclus dans le film.
Exposé de l'invention Compte tenu de ce qui précède, un problème que se propose de résoudre notre invention est de permettre un procédé de connexion plus aisé.
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Selon un aspect de la présente invention, un tel procédé, qui permet de rendre connectable électriquement et mécaniquement un dispositif électrique ayant une face munie de plots de contacts, est caractérisé en ce qu'il comprend : une première étape de déposition d'une couche de fixage sur la face munie de plots de contacts, ladite couche de fixage étant composée d'une substance ayant une propriété d'adhérence ; - une deuxième étape dans laquelle la couche de fixage est munie de voies conductrices s'étendant à travers ladite couche de fixage au niveau de plots de contact.
Ainsi il n'y a plus besoin de réaliser un film séparément du dispositif électrique à connecter. En outre grâce au fait que la couche de fixage a déjà des propriétés d'adhérence, point n'est besoin d'appliquer une colle ce qui simplifie une deuxième fois le procédé. Un autre avantage de l'invention est que les problèmes de tolérance liés à la réalisation séparée d'un film ne sont plus de mise, le film devait avoir notamment les même dimensions que le dispositif électrique. Ceci permet en outre d'appliquer le procédé de façon aisée non seulement à l'échelle de simples composants mais aussi à l'échelle de tranche de silicium (en anglais : wafer).
Dessins L'invention sera mieux comprise à la lecture de l'exposé non limitatif qui suit, rédigé au regard des dessins annexés, dans lesquels : - La figure 1 montre, en coupe transversale, une plaquette qui constitue un point de départ du procédé selon l'invention ; - La figure 2 montre, en coupe transversale, une couche organique de fixage qui est déposée sur la plaquette selon une première étape du procédé objet de l'invention ;
La figure 3 montre, en coupe transversale, une couche organique de fixage qui a été structurée selon une deuxième étape du procédé objet de l'invention ; - La figure 4 montre l'étape du procédé selon l'invention dans laquelle la couche de fixage est munie de bâtonnets métalliques ;
La figure 3 montre, en coupe transversale, une couche organique de fixage qui a été structurée selon une deuxième étape du procédé objet de l'invention ; - La figure 4 montre l'étape du procédé selon l'invention dans laquelle la couche de fixage est munie de bâtonnets métalliques ;
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La figure 5 montre, en vue de dessus et en coupe transversale, une partie d'une plaquette ;
- La figure 6 illustre le début de l'étape de fixation selon le procédé de l'invention ; - La figure 7 montre, en coupe transversale, les plaquettes après l'étape de fixation par thermo-compression ; - La figure 8 montre, en coupe transversale, l'amincissement de la première plaquette.
- La figure 6 illustre le début de l'étape de fixation selon le procédé de l'invention ; - La figure 7 montre, en coupe transversale, les plaquettes après l'étape de fixation par thermo-compression ; - La figure 8 montre, en coupe transversale, l'amincissement de la première plaquette.
Modes de réalisation de l'invention La figure 1 illustre un point de départ du procédé selon l'invention. Elle montre une plaquette 0 comprenant un substrat en silicium 1 sur lequel sont disposés des circuits 2.
Une couche de passivation 3 est superposée à la couche comprenant les circuits 2. Dans cette couche de passivation 3 sont insérés des plots de contact 4 dans le but d'établir une interconnexion vers des circuits supplémentaires.
La figure 2 illustre la première étape du procédé, en l'occurrence une étape de déposition d'une couche organique 5 possédant des propriétés d'adhérence. Cette couche organique se superpose à la couche de passivation 3 contenant les plots de contact 4. Cette couche organique 5 est par exemple déposée à l'état de solution par centrifugation.
Après une étape de séchage, et comme l'expose la figure 3, on enlève de la matière organique 5 partiellement ou totalement, et ce en particulier au niveau des plots de contact 4. Ce retrait de matière peut se faire par exemple par gravure. Si la matière organique est photosensible, on peut l'exposer également, après application d'un masque, à des rayons en particulier des rayons ultraviolets. Les parties de matière organique exposées seront enfin dissoutes après passage dans un bain chimique. La couche organique 5 ainsi modifiée est dite structurée.
La figure 4 illustre l'étape suivante qui est une étape de croissance de bâtonnets métalliques 7 dans les zones où la matière organique a été enlevée. Cette croissance de
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bâtonnets métalliques est effectuée par exemple dans des bains chimiques par électoless ou électrochimie. Les bâtonnets métalliques 7 sont orientés de préférence perpendiculairement à la surface des plots de contacts 4 et sont isolés entre eux par la matière organique de la couche 5. Bien que la figure 4 suggère la présence de bâtonnets métalliques 7 au niveau des plots de contact 4, ceci n'exclu pas la possibilité d'en faire croître aussi dans d'autres zones.
L'étape suivante, comme l'illustre la figure 6, est une étape d'alignement d'une deuxième plaquette 0'du même type que la plaquette 0 par rapport à la première plaquette 0, de façon à ce que les plots de contacts 4 et 4'soient en vis-à-vis. Cette deuxième plaquette peut comporter des circuits 2'nécessaires au fonctionnement des circuits 2.
Dans une étape ultérieure comme exposé à la figure 7, les deux plaquettes 0 et 0'sont fixées, par exemple par thermo-compression. Des techniques ultrasonores peuvent être également utilisées de façon avantageuse.
La plaquette 0'est munie de vias 8 afin de permettre la sortie des contacts électriques 4 vers l'extérieur au moyen par exemple de fil de câblage 9 comme on le voit à la figure 7.
La figure 8 montre que l'on peut procéder ensuite à l'amincissement de la plaquette 0 au niveau de sa face inférieure 1"afin par exemple de permettre un éventuel encartage dans un corps de carte ou afin d'accroître la difficulté de séparation des circuits dans un but sécuritaire.
Bien entendu, la description du mode de réalisation de l'invention exposé ci-dessus n'est nullement limitative de l'invention qui doit se comprendre de manière large.
En particulier, l'objet de la présente invention peut s'appliquer non seulement au domaine des connexions mécaniques et électriques à l'échelle d'un composant ou d'un circuit intégré mais aussi à l'échelle de tout autre dispositif électrique ayant une face
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munie de plots de contacts. Il peut s'agir en particulier des tranches de silicium de toutes tailles, par exemple 150 mm de diamètre et comportant environ un millier de composants.
Concernant la couche organique 5 tout matériau ayant de préférence des propriétés d'adhérence peut être utilisé. Il peut s'agir en particulier de polyimides, de résines photosensibles ou encore de thermoplastiques. Ces matériaux présentent en outre l'avantage de favoriser la croissance de composés métalliques.
L'utilisation de thermoplastiques est intéressante dans la mesure où il sera possible de dissocier les deux éléments électriques sans dommage. En revanche les polyimides seront avantageusement utilisés lorsque l'on voudra rendre difficile la dissociation des deux composants sans risquer de les détériorer physiquement. Ceci est particulièrement intéressant dans le domaine des cartes à puce en matière de sécurité physique.
Les bâtonnets métalliques 7 peuvent être plus généralement des compositions métalliques, par exemple des compositions à base de nickel, palladium ou cuivre.
De préférence comme on peut l'observer à la figure 5, on fera croître plusieurs bâtonnets métalliques 7 par zone de contact 4, typiquement une dizaine. Ceci permet des contacts électriques de relativement bonne qualité. Les bâtonnets métalliques ont un diamètre compris entre, par exemple 10 et 30 u. m.
La structure des contacts métalliques (4,7, 4') selon l'invention évite de faire ce que l'on appelle des reprises de contacts. En effet sur les tranches de silicium du commerce, des tâches d'oxydation localisées sont souvent présentes sur les plots de contact, qui sont généralement en aluminium. Les reprises de contacts consistent à nettoyer ces plots de contact pour enlever l'oxydation afin d'avoir des connexions électriques de bonne qualité. Or la structure des contacts selon l'invention (4,7, 4'), du fait notamment du nombre et de la taille réduite des sections des bâtonnets métalliques 7 par rapport à la taille des tâches d'oxydation, permet de s'affranchir de cette étape dite de reprise de contact.
Supposons par exemple qu'au niveau d'un certain plot de contact, il y ait 25 bâtonnets métalliques. Supposons en outre qu'il y ait une tâche d'oxydation qui empêche 10 de
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ces 25 bâtonnets d'être en contact avec le plot de contact. Dans ce cas, il reste 15 bâtonnets métalliques qui font contact et qui assurent quand même une assez bonne connexion électrique entre les dispositifs électriques.
Dans le cas notamment d'une fixation par thermo-compression, il est préférable que les voies conductrices 7 illustrées à la figure 7 aient une longueur supérieure à l'épaisseur de la couche organique 5, afin que lors du fixage il y ait une bonne interpénétration de ces voies dans le métal des plots de contact 4'de la deuxième plaquette 0'. En général ces plots sont aluminium et ont une épaisseur d'environ 1 lem.
En outre d'autres modes de réalisation sont susceptibles de donner des résultats particulièrement intéressants.
Au niveau de l'interface de fixage (5,7), plusieurs couches de matériaux composites peuvent être utilisées. Une couche intermédiaire peut être utilisée pour redistribuer les zones de contacts 4 à l'interface (5,7). Après structuration d'une première couche organique, des pistes métalliques peuvent être crées par dépôt. Une deuxième couche organique structurée peut à nouveau servir pour la croissance de composés métallique.
Plusieurs couches analogues à la couche organique 5 peuvent être utilisées de cette façon, soit pour la création de vias conducteurs, soit pour la création de pistes métalliques. La dernière étape reste l'étape de connexion électrique et mécanique avec le deuxième dispositif électrique.
Plusieurs couches analogues à la couche organique 5 peuvent être aussi utilisées pour améliorer l'aspect sécuritaire et la complexité de l'interface. Une multicouche peut aussi améliorer l'aspect de la qualité du fixage par une planarisation meilleure de la surface des circuits ou une recherche d'une meilleure réactivité chimique.
Après croissance des bâtonnets métalliques dans la couche organique 5 jouant le rôle de couche de fixage, la plaquette peut-être découpé en entités électriques plus petites, par exemple des circuits intégrés ou des composants. Ces entités électriques peuvent être alors montées par la technique dite des composants renversés (en anglais : Flip Chip). Le matériau constituant la couche organique sert d'agent de collage sur le
<Desc/Clms Page number 7>
substrat. On obtient ainsi des connexions de l'ordre de 10 jum au lieu des 40 à 60 um obtenu avec la technique des composants renversés (en anglais : Flip Chip) traditionnelle. Cette diminution de la taille des connexions est particulièrement avantageuse dans le domaine des hautes fréquences.
Claims (6)
- Revendications 1. Procédé pour rendre apte à la connexion électrique et mécanique un dispositif électrique ayant une face munie de plots de contact, le procédé étant caractérisé en ce qu'il comprend : - une première étape dans laquelle est déposée une couche de fixage sur la face munie de plots de contacts, ladite couche de fixage étant composée d'une substance ayant une propriété d'adhérence ; - une deuxième étape dans laquelle ladite couche de fixage est munie de voies conductrices s'étendant à travers ladite couche de fixage au niveau desdits plots de contact.
- 2. Procédé selon la revendication 1 caractérisé en ce que la couche de fixage est en polyimide.
- 3. Procédé selon la revendication 1 caractérisé en ce que les voies conductrices comprennent plusieurs bâtonnets métalliques par plots de contact.
- 4. Procédé pour connecter électriquement et mécaniquement un premier dispositif électrique et un deuxième dispositif électrique, chaque dispositif ayant une face munie de plots de contacts, le procédé étant caractérisé en ce qu'il comprend : - une étape de déposition dans laquelle une couche de fixage est déposée sur ladite face du premier dispositif électrique, ladite couche de fixage ayant une propriété d'adhérence ; - une étape dans laquelle la couche de fixage est munie de voies conductrices s'étendant à travers ladite couche de fixage au niveau des plots de contact ; - une étape de connexion électrique et mécanique dans laquelle ladite couche de fixage est mise en contact avec ladite face du deuxième dispositif électrique, une voie conductrice constituant une connexion électrique entre un plot de contact du premier dispositif électrique et un plot de contact du deuxième dispositif électrique.<Desc/Clms Page number 9>
- 5. Procédé pour connecter électriquement et mécaniquement une première tranche de silicium et une deuxième tranche de silicium, chaque tranche ayant une face munie de plots de contacts, le procédé étant caractérisé en ce qu'il comprend : - une étape de déposition dans laquelle une couche de fixage est déposée sur ladite face de la première tranche de silicium, ladite couche de fixage ayant une propriété d'adhérence ; - une étape dans laquelle la couche de fixage est munie de voies conductrices s'étendant à travers ladite couche de fixage au niveau des plots de contact ; - une étape de connexion électrique et mécanique dans laquelle ladite couche de fixage est mise en contact avec ladite face de la deuxième tranche de silicium, une voie conductrice constituant une connexion électrique entre un plot de contact de la première tranche de silicium et un plot de contact de la deuxième tranche de silicium ; - une étape de découpe des deux tranches de siliciums ainsi connectées, en entités électriques plus petites.
- 6. Composant électrique connectable mécaniquement et électriquement comprenant : - un dispositif électrique ayant une face munie de plots de contact ; - une couche de fixage déposée sur ladite face, ladite couche de fixage ayant une propriété d'adhérence et étant munie de voies conductrices s'étendant à travers la couche de fixage.
Priority Applications (11)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0110483A FR2828334A1 (fr) | 2001-08-03 | 2001-08-03 | Procede pour rendre connectable electriquement et mecaniquement un dispositif electrique ayant une face munie de plots de contacts |
PCT/IB2002/003041 WO2003015153A2 (fr) | 2001-08-03 | 2002-08-02 | Procede permettant la connexion electrique et mecanique d'un dispositif electrique avec une face pourvue de pastilles de contact |
CN028195388A CN1565053B (zh) | 2001-08-03 | 2002-08-02 | 允许具有带接触焊盘的面的电器件的电和机械连接的工艺 |
EP02751499.1A EP1421614B1 (fr) | 2001-08-03 | 2002-08-02 | Procede permettant la connexion electrique et mecanique d'un dispositif electrique avec une face pourvue de pastilles de contact |
CN200910205384XA CN101872753B (zh) | 2001-08-03 | 2002-08-02 | 具有带接触焊盘的面的电器件及其构成的电装置 |
KR1020047001685A KR100934862B1 (ko) | 2001-08-03 | 2002-08-02 | 접촉패드가 구비된 표면을 가진 전기장치의 전기적 및기계적 연결을 허용하는 방법 및 장치 |
AU2002355496A AU2002355496A1 (en) | 2001-08-03 | 2002-08-02 | Process to allow electrical and mechanical connection of an electrical device with a face equipped with contact pads |
JP2003519986A JP2005526374A (ja) | 2001-08-03 | 2002-08-02 | 電気装置と接触パッドを装備した面との電子および機械接続を可能にする方法 |
US10/485,693 US8429813B2 (en) | 2001-08-03 | 2002-08-02 | Process to allow electrical and mechanical connection of an electrical device with a face equipped with contact pads |
HK05101074.2A HK1068730A1 (en) | 2001-08-03 | 2005-02-08 | Process to allow electrical and mechanical connection of an electrical device with a face equipped with contact pads |
US12/714,719 US8508952B2 (en) | 2001-08-03 | 2010-03-01 | Electrical assembly |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0110483A FR2828334A1 (fr) | 2001-08-03 | 2001-08-03 | Procede pour rendre connectable electriquement et mecaniquement un dispositif electrique ayant une face munie de plots de contacts |
Publications (1)
Publication Number | Publication Date |
---|---|
FR2828334A1 true FR2828334A1 (fr) | 2003-02-07 |
Family
ID=8866302
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0110483A Pending FR2828334A1 (fr) | 2001-08-03 | 2001-08-03 | Procede pour rendre connectable electriquement et mecaniquement un dispositif electrique ayant une face munie de plots de contacts |
Country Status (9)
Country | Link |
---|---|
US (2) | US8429813B2 (fr) |
EP (1) | EP1421614B1 (fr) |
JP (1) | JP2005526374A (fr) |
KR (1) | KR100934862B1 (fr) |
CN (2) | CN1565053B (fr) |
AU (1) | AU2002355496A1 (fr) |
FR (1) | FR2828334A1 (fr) |
HK (1) | HK1068730A1 (fr) |
WO (1) | WO2003015153A2 (fr) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR3078823A1 (fr) * | 2018-03-12 | 2019-09-13 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Empilement 3d de puces electroniques |
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FR2866753B1 (fr) * | 2004-02-25 | 2006-06-09 | Commissariat Energie Atomique | Dispositif microelectronique d'interconnexion a tiges conductrices localisees |
US20220084884A1 (en) | 2020-09-15 | 2022-03-17 | Nanya Technology Corporation | Semiconductor structure and method of forming the same |
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2002
- 2002-08-02 WO PCT/IB2002/003041 patent/WO2003015153A2/fr active Application Filing
- 2002-08-02 US US10/485,693 patent/US8429813B2/en not_active Expired - Fee Related
- 2002-08-02 CN CN028195388A patent/CN1565053B/zh not_active Expired - Fee Related
- 2002-08-02 JP JP2003519986A patent/JP2005526374A/ja active Pending
- 2002-08-02 EP EP02751499.1A patent/EP1421614B1/fr not_active Expired - Lifetime
- 2002-08-02 CN CN200910205384XA patent/CN101872753B/zh not_active Expired - Fee Related
- 2002-08-02 KR KR1020047001685A patent/KR100934862B1/ko active IP Right Grant
- 2002-08-02 AU AU2002355496A patent/AU2002355496A1/en not_active Abandoned
-
2005
- 2005-02-08 HK HK05101074.2A patent/HK1068730A1/xx not_active IP Right Cessation
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2010
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FR3078823A1 (fr) * | 2018-03-12 | 2019-09-13 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Empilement 3d de puces electroniques |
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Also Published As
Publication number | Publication date |
---|---|
AU2002355496A1 (en) | 2003-02-24 |
EP1421614B1 (fr) | 2015-02-25 |
HK1068730A1 (en) | 2005-04-29 |
JP2005526374A (ja) | 2005-09-02 |
CN101872753B (zh) | 2013-01-30 |
KR100934862B1 (ko) | 2009-12-31 |
EP1421614A2 (fr) | 2004-05-26 |
US20100157555A1 (en) | 2010-06-24 |
US20050034303A1 (en) | 2005-02-17 |
WO2003015153A2 (fr) | 2003-02-20 |
CN1565053B (zh) | 2010-05-26 |
US8508952B2 (en) | 2013-08-13 |
US8429813B2 (en) | 2013-04-30 |
KR20040030921A (ko) | 2004-04-09 |
CN1565053A (zh) | 2005-01-12 |
CN101872753A (zh) | 2010-10-27 |
WO2003015153A3 (fr) | 2004-03-11 |
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