FR2817656A1 - ELECTRICAL INSULATION OF GROUPED MICROCIRCUITS BEFORE UNIT BONDING - Google Patents
ELECTRICAL INSULATION OF GROUPED MICROCIRCUITS BEFORE UNIT BONDING Download PDFInfo
- Publication number
- FR2817656A1 FR2817656A1 FR0015941A FR0015941A FR2817656A1 FR 2817656 A1 FR2817656 A1 FR 2817656A1 FR 0015941 A FR0015941 A FR 0015941A FR 0015941 A FR0015941 A FR 0015941A FR 2817656 A1 FR2817656 A1 FR 2817656A1
- Authority
- FR
- France
- Prior art keywords
- microcircuit
- protective layer
- connection
- pad
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/2401—Structure
- H01L2224/24011—Deposited, e.g. MCM-D type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/2405—Shape
- H01L2224/24051—Conformal with the semiconductor or solid-state device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24105—Connecting bonding areas at different heights
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/24226—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/2499—Auxiliary members for HDI interconnects, e.g. spacers, alignment aids
- H01L2224/24991—Auxiliary members for HDI interconnects, e.g. spacers, alignment aids being formed on the semiconductor or solid-state body to be connected
- H01L2224/24992—Flow barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/2499—Auxiliary members for HDI interconnects, e.g. spacers, alignment aids
- H01L2224/24996—Auxiliary members for HDI interconnects, e.g. spacers, alignment aids being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/24998—Reinforcing structures, e.g. ramp-like support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/27011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
- H01L2224/27013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73267—Layer and HDI connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/76—Apparatus for connecting with build-up interconnects
- H01L2224/7615—Means for depositing
- H01L2224/76151—Means for direct writing
- H01L2224/76155—Jetting means, e.g. ink jet
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
- H01L2224/82007—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting a build-up interconnect during or after the bonding process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
- H01L2224/82009—Pre-treatment of the connector or the bonding area
- H01L2224/8203—Reshaping, e.g. forming vias
- H01L2224/82035—Reshaping, e.g. forming vias by heating means
- H01L2224/82039—Reshaping, e.g. forming vias by heating means using a laser
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
- H01L2224/821—Forming a build-up interconnect
- H01L2224/82101—Forming a build-up interconnect by additive methods, e.g. direct writing
- H01L2224/82102—Forming a build-up interconnect by additive methods, e.g. direct writing using jetting, e.g. ink jet
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83009—Pre-treatment of the layer connector or the bonding area
- H01L2224/83051—Forming additional members, e.g. dam structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92244—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01058—Cerium [Ce]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01073—Tantalum [Ta]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01087—Francium [Fr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19042—Component type being an inductor
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Dicing (AREA)
- Die Bonding (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
<Desc/Clms Page number 1> <Desc / Clms Page number 1>
L'invention concerne le domaine général de la fabrication de dispositifs électroniques comportant au moins un microcircuit fixé sur un support et protégé par un isolant. Un tel dispositif est appelé module . The invention relates to the general field of manufacturing electronic devices comprising at least one microcircuit fixed on a support and protected by an insulator. Such a device is called a module.
Dans ce domaine, la technique du microcircuit fixé sur un support est appelée en anglais die attach . In this field, the microcircuit technique fixed on a support is called in English die attach.
L'invention s'applique aux modules destinés ou intégrés à des objets portables intelligents, notamment les cartes à puce et étiquettes électroniques. The invention applies to modules intended for or integrated into intelligent portable objects, in particular smart cards and electronic labels.
Pour situer l'invention, décrivons rapidement un tel microcircuit :
Le microcircuit est réalisé dans un matériau semi conducteur appelé substrat : il s'agit par exemple de silicium. Un microcircuit possède deux faces principales opposées, l'une dite face active recouverte par une couche de passivation, à l'exception de plots de connexion. L'autre face est appelée arrière ou bulk en anglais. Entre ces deux faces, se trouve une tranche périphérique. To situate the invention, let us quickly describe such a microcircuit:
The microcircuit is made of a semiconductor material called a substrate: it is for example silicon. A microcircuit has two opposite main faces, one called the active face covered by a passivation layer, with the exception of connection pads. The other side is called rear or bulk in English. Between these two faces is a peripheral edge.
Dans un module, le microcircuit est monté soit avec sa face passive contre le support et les plots de connexion de la face active débouchant à l'opposé du support. Soit la face active est en regard du support. On parle alors en anglais de flip chip : ce montage n'est pas concerné ici. In a module, the microcircuit is mounted either with its passive face against the support and the connection pads of the active face opening out opposite the support. Either the active face is opposite the support. We then speak in English of flip chip: this assembly is not concerned here.
Dans un montage comme dans l'autre, la tranche périphérique et la face arrière sont conductrices, et il convient de les isoler électriquement après le sciage rendant le microcircuit unitaire. In an assembly as in the other, the peripheral edge and the rear face are conductive, and they should be electrically isolated after sawing making the microcircuit unitary.
En outre, ce microcircuit-et de manière plus large le module-doit être pourvu d'une protection contre les atteintes extérieures notamment, physico-chimiques comme l'humidité, et mécaniques comme les chocs ou efforts. In addition, this microcircuit - and more broadly the module - must be provided with protection against external damage in particular, physicochemical like humidity, and mechanical like shock or stress.
Cette protection électrique et mécanique est réalisée de manière différente selon le type de la connexion des plots avec des éléments d'interface du module. Ici ces éléments sont indifféremment reliés électriquement à (ou font partie d un bornier à plages de contact tel que celui d'une carte à puce bancaire, et/ou à une antenne de transmission sans contact, telle que dans une étiquette électronique. This electrical and mechanical protection is carried out differently depending on the type of connection of the pads with interface elements of the module. Here these elements are indifferently electrically connected to (or form part of a terminal block with contact pads such as that of a bank chip card, and / or to a contactless transmission antenna, such as in an electronic label.
Un type connu de connexion aux éléments d'interface, est appelé câblage filaire. Le document FR-A-2684802 décrit un câblage filaire, où les plots du microcircuit sont reliés à des éléments d'interface par des fils métalliques. A known type of connection to interface elements is called wired wiring. The document FR-A-2684802 describes a wired wiring, where the pads of the microcircuit are connected to interface elements by metallic wires.
<Desc/Clms Page number 2> <Desc / Clms Page number 2>
En général ces fils sont en or, cuivre, nickel ou alliage de métaux ce qui rend la connexion coûteuse. Tandis que la pose de ces fils nécessite un équipement de précision qui ralentit la cadence de fabrication. En outre, on comprend qu'une connexion filaire est une opération délicate, puisqu'il faut positionner puis souder en place des fils de section et longueur microscopique. In general these wires are made of gold, copper, nickel or a metal alloy which makes the connection expensive. While laying these wires requires precision equipment which slows down the production rate. In addition, it is understood that a wired connection is a delicate operation, since it is necessary to position and then weld in place wires of microscopic section and length.
Avec le câblage filaire, il est courant de recouvrir le microcircuit fixé sur le support et ses connexions, par une goutte de matériau isolant. En anglais, ce recouvrement est appelé glob top . Il augmente conséquemment l'épaisseur (c'est-à-dire la distance entre l'arrière du support et le sommet de la protection, mesurée transversalement aux faces du microcircuit) et la rigidité du module ainsi obtenu. With wired wiring, it is common to cover the microcircuit fixed on the support and its connections, with a drop of insulating material. In English, this covering is called glob top. It consequently increases the thickness (that is to say the distance between the rear of the support and the top of the protection, measured transversely to the faces of the microcircuit) and the rigidity of the module thus obtained.
Un autre type de connexion des plots d'un microcircuit aux éléments d'interface fait appel, à la place des fils soudés, à des composés polymères électriquement conducteurs. Le document FR-A-2761498 décrit ce type de connexion, où les plots et les éléments d'interface sont raccordés par dépôt d'une résine telle qu'une colle polymérisable chargée de particules conductrices par exemple d'argent. Another type of connection of the pads of a microcircuit to the interface elements uses, instead of the soldered wires, electrically conductive polymer compounds. The document FR-A-2761498 describes this type of connection, where the pads and the interface elements are connected by depositing a resin such as a polymerizable adhesive charged with conductive particles, for example silver.
Ces connexions par dépôt de polymères connues sont économiques et performantes. These connections by known polymer deposition are economical and efficient.
Mais il réside en pratique des inconvénients liés notamment à l'isolation des tranches du microcircuit qui possèdent une conductivité électrique, par exemple de l'ordre de 0,01 ohm/mm (d'autant plus importante que le substrat est dopé pour accroître ses propriétés électroniques). However, in practice there are drawbacks linked in particular to the insulation of the wafers of the microcircuit which have an electrical conductivity, for example of the order of 0.01 ohm / mm (all the more important as the substrate is doped to increase its electronic properties).
Du fait de ce problème d'isolation, soit un autre type connexion est choisi. Because of this insulation problem, another type of connection is chosen.
Soit il est tenté que la colle de fixation du microcircuit sur son support soit déposée de sorte qu'elle s'étende en regard des tranches périphériques pour en assurer la protection. Either it is attempted that the adhesive for fixing the microcircuit on its support is deposited so that it extends opposite the peripheral edges to ensure protection.
Toutefois, il est difficile en fabrication d'obtenir que la protection présente une épaisseur (c'est-à-dire la distance entre le support et le sommet de la protection, mesurée transversalement aux faces du microcircuit) appropriée. Car soit seulement une partie de l'épaisseur du microcircuit est couverte par la colle : il existe alors sur la tranche, une zone périphérique sans protection isolante, à proximité de la face active. However, it is difficult in manufacturing to obtain that the protection has an appropriate thickness (that is to say the distance between the support and the top of the protection, measured transversely to the faces of the microcircuit). Because either only part of the thickness of the microcircuit is covered by the adhesive: there is then on the edge, a peripheral zone without insulating protection, near the active face.
<Desc/Clms Page number 3><Desc / Clms Page number 3>
Soit la goutte de colle dans laquelle est fixée le microcircuit déborde sur sa face active, voire les plots de connexion, ce qui n'est pas acceptable. Either the drop of glue in which the microcircuit is fixed overflows on its active face, or even the connection pads, which is not acceptable.
Ceci vient de ce que les contraintes dimensionnelles imposées sont difficiles à respecter avec les équipements courants. La cote visée pour l'épaisseur de colle est par exemple de l'ordre de 80% de l'épaisseur du microcircuit (par exemple de 180um) avec une tolérance de l'ordre de +/- 10% de l'épaisseur du microcircuit. This comes from the fact that the dimensional constraints imposed are difficult to meet with current equipment. The target dimension for the glue thickness is for example of the order of 80% of the thickness of the microcircuit (for example 180 μm) with a tolerance of the order of +/- 10% of the thickness of the microcircuit .
En outre, dans nombre de cas, il est souhaitable d'obtenir l'épaisseur la plus réduite possible du module (par exemple pour se conformer aux exigences telle que la norme IS07816 sur les cartes à puce), c'est-à-dire la distance entre l'extérieur du support et de la protection, mesurée transversalement aux faces du microcircuit. In addition, in many cases, it is desirable to obtain the smallest possible thickness of the module (for example to comply with requirements such as the standard IS07816 on smart cards), that is to say the distance between the outside of the support and the protection, measured transversely to the faces of the microcircuit.
Tandis qu'il est souvent souhaité que le module présente des propriétés de flexibilité en correspondance avec celles imposées à l'objet portable (carte, étiquette ou analogues) auquel il est destiné. While it is often desired that the module has flexibility properties in correspondence with those imposed on the portable object (card, label or the like) for which it is intended.
L'invention a pour but de pallier ces inconvénients notamment. The invention aims to overcome these drawbacks in particular.
Elle vise à ce que les zones conductrices du microcircuit, et en particulier ses tranches périphériques, soit protégées entièrement . Bien sûr, le terme entièrement exclut les parties du microcircuit auxquelles il est nécessaire de pouvoir accéder, comme par exemple les plots de connexion. Hormis ces zones, on souhaite atteindre une protection étendue sur sensiblement 100% de la surface conductrice du microcircuit. It aims to ensure that the conductive areas of the microcircuit, and in particular its peripheral edges, are fully protected. Of course, the term entirely excludes the parts of the microcircuit which it is necessary to be able to access, such as for example the connection pads. Apart from these zones, it is desired to achieve protection extended over substantially 100% of the conductive surface of the microcircuit.
En outre, l'invention doit permettre l'intégration des étapes de protection du microcircuit dans une fabrication en ligne et continue. La cadence des étapes de protection doit donc être proche de celle des étapes en amont et en aval, suivant le sens de déroulement du procédé de fabrication du micromodule. Tel n'est pas le cas par exemple pour le câblage filaire. In addition, the invention must allow the integration of the microcircuit protection steps in an online and continuous manufacturing. The rate of the protection steps must therefore be close to that of the upstream and downstream steps, depending on the direction of the micromodule manufacturing process. This is not the case for example for wired cabling.
A cet effet, un objet de l'invention vise un procédé de fabrication d'un dispositif électronique, notamment module d'objet portable intelligent tel que carte à puce ou étiquette électronique. To this end, an object of the invention relates to a method of manufacturing an electronic device, in particular an intelligent portable object module such as a smart card or electronic label.
Ce procédé comprend les étapes prévoyant de : monter sur un véhicule de sciage une plaque semi-conductrice dite wafer , formant substrat pour plusieurs microcircuits ; scier chacun des microcircuits pour les rendre unitaires ; placer puis fixer le microcircuit sur son support ; This method includes the steps of: mounting on a sawing vehicle a so-called wafer semiconductor plate, forming a substrate for several microcircuits; saw each of the microcircuits to make them unitary; place and then fix the microcircuit on its support;
<Desc/Clms Page number 4><Desc / Clms Page number 4>
connecter au moins un élément d'interface à un plot correspondant au moins ; et déposer le matériau de protection. connect at least one interface element to at least one corresponding pad; and deposit the protective material.
Selon l'invention, le procédé comporte les étapes prévoyant : 'avant que la plaque formant substrat ne soit sciée, d'appliquer une couche diélectrique de protection sur au moins une face active de microcircuit de cette plaque ; au moins un évidemment d'accès étant réservé ou formé dans cette couche diélectrique, qui débouche en regard d'au moins un plot de connexion ; 'pour au moins un micromodule, de le placer puis de le fixer sur son support, par collage de sa face passive, une périphérie de la couche de protection formant par exemple barrière contre le débordement de la colle sur la face active du microcircuit ; et 'connecter après protection, chaque élément d'interface au plot correspondant, par exemple par dépose de matériau conducteur. According to the invention, the method comprises the steps providing: 'before the substrate plate is sawn, applying a protective dielectric layer on at least one active microcircuit face of this plate; at least one access recess being reserved or formed in this dielectric layer, which opens facing at least one connection pad; '' for at least one micromodule, to place it then to fix it on its support, by gluing of its passive face, a periphery of the protective layer forming for example barrier against the overflow of the glue on the active face of the microcircuit; and 'connect after protection, each interface element to the corresponding pad, for example by depositing conductive material.
Selon une caractéristique, l'étape lors de laquelle la couche de protection est appliquée, est effectuée avant le montage de la plaque dite wafer sur son véhicule de sciage. According to one characteristic, the step during which the protective layer is applied is carried out before the mounting of the so-called wafer plate on its sawing vehicle.
Selon une autre caractéristique, au moins un microcircuit possédant sur la face active une couche de passivation ; la couche de protection est appliquée sur cette couche de passivation. According to another characteristic, at least one microcircuit having on the active face a passivation layer; the protective layer is applied to this passivation layer.
Selon encore une caractéristique, les étapes prévoyant d'appliquer la couche de protection, de placer puis fixer le microcircuit sur son support et de le connecter, sont intégrées à un procédé de fabrication en ligne et continu, la cadence de ces étapes étant proche de celle d'étapes de fabrication en amont et en aval, suivant le sens de déroulement du procédé. According to yet another characteristic, the steps providing for applying the protective layer, for placing then fixing the microcircuit on its support and for connecting it, are integrated into an online and continuous manufacturing process, the rate of these steps being close to that of manufacturing stages upstream and downstream, according to the direction of the process.
Dans une réalisation, la couche de protection est un film diélectrique en polymère, d'une épaisseur par exemple de l'ordre de 50um, appliqué par lamination et à travers lequel au moins un évidemment d'accès réservé préalablement à la lamination ; cet évidemment débouchant en regard d'au moins un plot de connexion et étant formé par découpe laser, mécanique telle qu'estampage ou analogues. In one embodiment, the protective layer is a dielectric polymer film, of a thickness for example of the order of 50 μm, applied by lamination and through which at least one access cavity reserved prior to lamination; this obviously opening facing at least one connection pad and being formed by laser cutting, mechanical such as stamping or the like.
<Desc/Clms Page number 5> <Desc / Clms Page number 5>
Une réalisation prévoit que la couche de protection est un film diélectrique en polymère, d'une épaisseur par exemple de l'ordre de 50um, appliqué par lamination et à travers lequel au moins un évidemment d'accès est formé après lamination sur la face active ; cet évidemment débouchant en regard d'au moins un plot de connexion et étant formé par découpe laser, mécanique telle qu'estampage ou analogues. One embodiment provides that the protective layer is a dielectric polymer film, of a thickness for example of the order of 50 μm, applied by lamination and through which at least one access recess is formed after lamination on the active face. ; this obviously opening facing at least one connection pad and being formed by laser cutting, mechanical such as stamping or the like.
Dans une autre réalisation, la couche de protection est un matériau diélectrique polymère et initialement visqueux, appliqué par sérigraphie ; au moins un évidemment d'accès est formé utilisation d'un écran comportant au moins une zone de masquage évitant de déposer le matériau de sérigraphie en regard d'au moins un plot de connexion. In another embodiment, the protective layer is a polymeric and initially viscous dielectric material, applied by screen printing; at least one access opening is formed using a screen comprising at least one masking area avoiding depositing the screen printing material opposite at least one connection pad.
Encore une autre réalisation prévoit que la couche de protection est un matériau diélectrique polymère et initialement visqueux, tel qu'encre ou colle polymère, appliqué jet par exemple depuis une matrice de buses d'une section de l'ordre de 20um par exemple ; au moins un évidemment d'accès est formé par programmation lors de la projection des jets à travers ce matériau, cet évidemment débouchant en regard d'au moins un plot de connexion. Yet another embodiment provides that the protective layer is a polymeric and initially viscous dielectric material, such as ink or polymer adhesive, applied jet for example from a matrix of nozzles with a section of the order of 20 μm for example; at least one access recess is formed by programming during the projection of the jets through this material, this obviously opening facing at least one connection pad.
Une mise en oeuvre avec l'application d'un matériau initialement visqueux par sérigraphie ou jet d'encre prévoit, par exemple avant le sciage rendant les microcircuits d'une plaque de substrat unitaires, une étape de polymérisation par apport thermique, photonique, chimique ou analogues. An implementation with the application of an initially viscous material by screen printing or ink jet provides, for example before sawing making the microcircuits of a unitary substrate plate, a step of polymerization by thermal, photonic, chemical contribution or the like.
Selon une caractéristique, la couche de protection forme une barrière par exemple d'une épaisseur de 70um et présentant un profil externe sensiblement identique ainsi qu'au droit de la tranche périphérique, contre le débordement de la colle vers l'intérieur sur la face active du microcircuit, lors de l'étape de fixation. According to one characteristic, the protective layer forms a barrier for example with a thickness of 70 μm and having a substantially identical external profile as well as at the right of the peripheral edge, against the overflow of the adhesive towards the inside on the active face. of the microcircuit, during the fixing step.
Dans une réalisation, le microcircuit est fixé sur le support par placement dans un dépôt de colle polymère isolante telle qu'une résine ; cette colle remontant lors du placement contre la tranche périphérique externe du microcircuit ; par exemple l'épaisseur de colle est comprise entre 80% et 100% de l'épaisseur du microcircuit telle que de l'ordre de 180um, avec une tolérance de l'ordre de +/-10% de l'épaisseur du microcircuit. In one embodiment, the microcircuit is fixed to the support by placing in a deposit of insulating polymer adhesive such as a resin; this adhesive rising during placement against the external peripheral edge of the microcircuit; for example, the thickness of glue is between 80% and 100% of the thickness of the microcircuit such as of the order of 180 μm, with a tolerance of the order of +/- 10% of the thickness of the microcircuit.
<Desc/Clms Page number 6> <Desc / Clms Page number 6>
Une caractéristique prévoit que !'étape visant à connecter après protection chaque élément d'interface au plot correspondant, est effectuée par dépose de matériau conducteur tel que résine ou colle polymère chargée de particules électriquement conductrices ou polymère intrinsèquement conducteur, par exemple par tampographie, jet d'encre, dépose à la seringue ou analogues. One characteristic provides that the step aimed at connecting, after protection, each interface element to the corresponding pad, is carried out by depositing conductive material such as resin or polymer adhesive charged with electrically conductive particles or intrinsically conductive polymer, for example by pad printing, jet ink, syringe removal or the like.
Dans une réalisation, le matériau de connexion est déposé sur la colle de fixation et sur au moins une partie externe de la couche de diélectrique de protection appliquée sur le substrat, par exemple en recouvrant une barrière périphérique de cette couche, tandis qu'éventuellement une partie de la face active et/ou de sa couche de passivation est dépourvue de cette couche de protection et/ou de recouvrement par le matériau de connexion. In one embodiment, the connection material is deposited on the fixing adhesive and on at least one external part of the protective dielectric layer applied to the substrate, for example by covering a peripheral barrier with this layer, while possibly a part of the active face and / or of its passivation layer is devoid of this protective and / or covering layer by the connection material.
Dans une réalisation, un apport de connexion appelé bossage ou "bump"est déposé après fixation du microcircuit sur son support, par exemple préalablement à l'étape prévoyant de connecter le plot à l'élément d'interface correspondant ; cet apport étant disposé sur ce plot et destiné à recevoir une portion d'extrémité de raccordement électrique de l'élément d'interface. In one embodiment, a connection input called boss or "bump" is deposited after fixing the microcircuit on its support, for example prior to the step providing for connecting the pad to the corresponding interface element; this contribution being disposed on this pad and intended to receive an electrical connection end portion of the interface element.
Un autre objet de l'invention vise un dispositif électronique formant module d'objet portable intelligent tel que carte à puce ou étiquette électronique.
Another object of the invention relates to an electronic device forming an intelligent portable object module such as a smart card or electronic label.
Ce dispositif comprend, une fois fabriqué, au moins : 'un microcircuit pourvu d'au moins : 'une tranche périphérique qui présente une conductivité 'de part et d'autre de la tranche, deux faces principales, l'une arrière et l'autre active car pourvue d'au moins un plot de connexion 'un support diélectrique, sur lequel est fixée la face passive du microcircuit, par collage . un élément d'interface connecté électriquement au plot par un matériau conducteur dit d'interface 'une structure de protection du micromodule en matériau électriquement isolant dit de protection. This device comprises, once manufactured, at least: 'a microcircuit provided with at least:' a peripheral wafer which has a conductivity 'on either side of the wafer, two main faces, one rear and the another active because provided with at least one connection pad 'a dielectric support, on which is fixed the passive face of the microcircuit, by gluing. an interface element electrically connected to the pad by a conductive material called interface 'a protection structure of the micromodule made of electrically insulating material called protection.
Selon l'invention, la structure de protection est appliquée sur au plus une partie de la face active du microcircuit, à proximité ou en contact According to the invention, the protective structure is applied to at most part of the active face of the microcircuit, close to or in contact
<Desc/Clms Page number 7><Desc / Clms Page number 7>
avec la colle de fixation par exemple via une barrière périphérique de cette structure ; cette structure étant au moins en partie recouverte par le matériau conducteur d'interface assurant la connexion. with the fixing adhesive, for example via a peripheral barrier of this structure; this structure being at least partly covered by the conductive interface material ensuring the connection.
Dans une réalisation, au moins une partie isolante de la face active du microcircuit, par exemple une partie de sa couche de passivation, est dégagée c'est-à-dire dépourvue de toute couche de protection et/ou matière de connexion
Une caractéristique prévoit que ce dispositif est fabriqué selon le procédé évoqué plus haut. In one embodiment, at least one insulating part of the active face of the microcircuit, for example part of its passivation layer, is free, that is to say devoid of any protective layer and / or connection material
A feature provides that this device is manufactured according to the process mentioned above.
Encore un autre objet de l'invention vise un équipement tel que chaîne de fabrication en ligne et en continu de dispositif électronique, formant module d'objet portable intelligent tel que carte à puce ou étiquette électronique. Yet another object of the invention relates to equipment such as an online and continuous production line for an electronic device, forming an intelligent portable object module such as a smart card or electronic label.
Cet équipement possède un poste de dépose unitaire d'une couche de protection isolante sur une plaque regroupant plusieurs microcircuits, en amont d'un poste de montage de la plaque sur un véhicule de sciage ; tandis qu'en aval d'un poste de fixation par collage d'un microcircuit unitaire sur un support, l'équipement possède un poste de dépose d'un matériau conducteur de connexion. This equipment has a unit for depositing an insulating protective layer on a plate grouping together several microcircuits, upstream of a station for mounting the plate on a sawing vehicle; while downstream of a fixing station by bonding a unitary microcircuit on a support, the equipment has a station for depositing a conductive connection material.
Il est apte à mettre en oeuvre le procédé et/ou à fabriquer le de dispositif électronique formant module évoqués plus haut. It is suitable for implementing the method and / or for manufacturing the electronic device forming module mentioned above.
Maintenant, l'invention va être décrite en se référant à des exemples de mise en oeuvre non limitatifs, et illustrés dans les dessins joints. Now, the invention will be described with reference to non-limiting examples of implementation, and illustrated in the accompanying drawings.
Dans ces dessins, la figure 1 représente en section schématique partielle, d'une part (en haut) une couche solide de protection à laminer, et d'autre part (en bas) une plaque formant substrat pour des microcircuits. In these drawings, FIG. 1 represents in partial schematic section, on the one hand (top) a solid protective layer to be laminated, and on the other hand (bottom) a plate forming a substrate for microcircuits.
La figure 2 est une vue similaire à la figure 1, qui représente d'une part (en haut) une couche solide de protection pourvue d'évidements d'accès, et d'autre part (en bas) une plaque formant substrat pour des microcircuits, ses plots de connexion étant en regard des évidements. FIG. 2 is a view similar to FIG. 1, which represents on the one hand (top) a solid protective layer provided with access recesses, and on the other hand (bottom) a plate forming a substrate for microcircuits, its connection pads being opposite the recesses.
La figure 3 représente en section schématique partielle, une étape de fabrication durant laquelle sont formés des évidements d'accès dans une couche solide de protection laminée sur une plaque formant substrat pour des microcircuits. FIG. 3 shows in partial schematic section, a manufacturing step during which access recesses are formed in a solid protective layer laminated on a plate forming a substrate for microcircuits.
<Desc/Clms Page number 8> <Desc / Clms Page number 8>
La figure 4 représente en section schématique partielle, une étape de fabrication durant laquelle une couche en matériau visqueux de protection est déposée par sérigraphie ou jet d'encre, sur une plaque formant substrat pour des microcircuits, des évidements d'accès étant formés lors du dépôt dans cette couche. FIG. 4 shows in partial schematic section, a manufacturing step during which a layer of viscous protective material is deposited by screen printing or ink jet, on a plate forming a substrate for microcircuits, access recesses being formed during the deposit in this layer.
La figure 5 est une vue similaire aux précédentes, qui illustre une étape de montage d'une plaque de substrat pour microcircuits sur son véhicule de sciage. FIG. 5 is a view similar to the previous ones, which illustrates a step of mounting a substrate plate for microcircuits on its sawing vehicle.
La figure 6 est une vue similaire à la figure 5, qui illustre le résultat d'une étape de sciage d'une plaque de substrat en microcircuits, ces derniers restant sur le véhicule. FIG. 6 is a view similar to FIG. 5, which illustrates the result of a step of sawing a substrate plate into microcircuits, the latter remaining on the vehicle.
La figure 7 représente en section schématique, le résultat d'une étape de fixation d'un microcircuit sur son support, à l'aide d'une colle polymère. FIG. 7 represents in schematic section, the result of a step of fixing a microcircuit on its support, using a polymer adhesive.
La figure 8 représente en section schématique, le résultat d'une étape de connexion des plots d'un microcircuit sur son support, par dépôt d'un matériau polymère sur la colle de fixation et une couche de protection, notamment. FIG. 8 represents in schematic section, the result of a step of connection of the pads of a microcircuit on its support, by deposition of a polymeric material on the fixing glue and a protective layer, in particular.
Et la figure 9 représente schématiquement un équipement de fabrication de modules et d'objets portables (ici une carte à puce), avec suivant le sens de déroulement du procédé mis en oeuvre par l'équipement, des postes de :
application d'une couche de protection 'montage de substrat sur véhicule de sciage 'sciage des microcircuits fixation de microcircuit sur son support . connexion des plots à des éléments d'interface, et 'intégration du module dans un objet portable intelligent, ici par encartage . And FIG. 9 schematically represents an equipment for manufacturing modules and portable objects (here a smart card), with, depending on the direction of the process implemented by the equipment, stations for:
application of a protective layer 'mounting of substrate on sawing vehicle' sawing of microcircuits fixing of microcircuit on its support. connection of the pads to interface elements, and 'integration of the module into an intelligent portable object, here by inserting.
Sur la figure 8 notamment, on voit un dispositif électronique 1. Ce dispositif 1 forme un module aussi désigné en 1, pour un objet portable intelligent 2 tel que la carte à puce montrée sur la figure 9. In FIG. 8 in particular, an electronic device 1 can be seen. This device 1 forms a module also designated in 1, for an intelligent portable object 2 such as the smart card shown in FIG. 9.
Il ressort de cette figure 8 que le dispositif 1 comprend : un microcircuit 3 pourvu d'au moins : 'une tranche périphérique 4 qui présente une conductivité It appears from this FIG. 8 that the device 1 comprises: a microcircuit 3 provided with at least: 'a peripheral section 4 which has a conductivity
<Desc/Clms Page number 9><Desc / Clms Page number 9>
de part et d'autre de la tranche, deux faces principales (5,
6), l'une désignée en 5 appelée arrière et l'autre désignée en
6 appelée active, car elle est pourvue de plots 7 de connexion un support diélectrique 8, sur lequel est fixée la face passive 5 du microcircuit 3, par collage à l'aide d'un matériau de fixation 9 des éléments 10 d'interface, connectés électriquement aux plots
7 par un matériau conducteur dit d'interface 11. une structure de protection du micromodule, désignée de manière générale en 12 sur la figure 8 et comportant notamment un premier matériau électriquement isolant 13. Plus généralement, tous les matériaux de la structure 12 sont appelés par la suite matériaux de protection . on either side of the wafer, two main faces (5,
6), one designated at 5 called rear and the other designated at
6 called active, because it is provided with pads 7 for connecting a dielectric support 8, on which the passive face 5 of the microcircuit 3 is fixed, by bonding using a fixing material 9 of the interface elements 10, electrically connected to the pads
7 by a conductive material called interface 11. a micromodule protection structure, generally designated at 12 in FIG. 8 and comprising in particular a first electrically insulating material 13. More generally, all the materials of the structure 12 are called thereafter protective materials.
Sur la figure 8, la structure 12 comporte deux matériaux de protection, à savoir d'une part le premier matériau 13 qui est en fait la colle de fixation évoquée plus haut. In FIG. 8, the structure 12 comprises two protective materials, namely on the one hand the first material 13 which is in fact the fixing glue mentioned above.
D'autre part, la structure 12 selon l'invention comporte un deuxième matériau de protection 14. Cette même référence numérique 14 désigne également un composant de la structure 12 appelé couche de protection . On the other hand, the structure 12 according to the invention comprises a second protective material 14. This same reference numeral 14 also designates a component of the structure 12 called the protective layer.
Il ressort de la figure 8 que le deuxième matériau 14 est appliqué avant sciage (sur la plaque ou wafer ), mais sur une partie seulement de la face active 6, en contact avec la colle 9 faisant aussi office de premier matériau de protection 13. It appears from FIG. 8 that the second material 14 is applied before sawing (on the plate or wafer), but only on part of the active face 6, in contact with the adhesive 9 also acting as the first protective material 13.
Plus précisément, c'est ici une barrière périphérique 15 de la couche 14 (notamment visible sur la figure 7), qui est en contact avec la colle de fixation et protection désignée en 9 et 13 selon sa fonction. More specifically, here is a peripheral barrier 15 of the layer 14 (in particular visible in FIG. 7), which is in contact with the fixing and protection adhesive designated at 9 and 13 according to its function.
Ceci distingue la structure de protection de l'invention des connexions connues par dépôt avec une seringue (en anglais dispense ) de polymère conducteur, où une matière d'isolation est déposée lors d'une étape dédiée postérieure à la fixation du microcircuit sur son support, contre la tranche à isoler. This distinguishes the protective structure of the invention from known connections by deposition with a syringe (in English exemption) of conductive polymer, where an insulation material is deposited during a dedicated step subsequent to the fixing of the microcircuit on its support. , against the edge to be insulated.
Il faut aussi souligner qu'ici, la structure 12 est en partie recouverte par le matériau conducteur d'interface 11 assurant la connexion. Dans les protection par glob top notamment, c'est le conducteur d'interface qui est recouvert par la goutte de résine. It should also be emphasized that here the structure 12 is partly covered by the conductive interface material 11 ensuring the connection. In glob top protection in particular, the interface conductor is covered by the drop of resin.
<Desc/Clms Page number 10> <Desc / Clms Page number 10>
Dans la réalisation de la figure 8, une partie isolante 16 de la face active 3, ici de sa couche de passivation, est dégagée c'est-à-dire dépourvue de toute couche de protection et/ou matière de connexion
Décrivons maintenant comment ce dispositif 1 est fabriqué et sur quel équipement tel que celui désigné en 17 (qui schématise ici une chaîne de fabrication en ligne et en continu de dispositifs électroniques) et visible sur la figure 9, est mis en oeuvre) le procédé de l'invention. In the embodiment of FIG. 8, an insulating part 16 of the active face 3, here of its passivation layer, is cleared, that is to say devoid of any protective layer and / or connection material
Let us now describe how this device 1 is manufactured and on which equipment such as that designated in 17 (which schematizes here an online and continuous production line for electronic devices) and visible in FIG. 9, is implemented) the method of the invention.
Suivant un sens de déroulement du procédé désigné en 18 sur la figure 9, l'équipement 17 comporte un (ou plusieurs) :
'poste d'application 19 d'une couche de protection 14 'poste de montage 20 de substrat sur un véhicule de sciage (désigné en 25 sur les figures 5, 6 et 9) 'poste de sciage 21 des microcircuits 3 'poste de fixation 22 de microcircuit sur son support 8 'poste de connexion 23 des plots 7 aux éléments d'interface 10, et 'poste de intégration 24 du module (1) dans un objet portable intelligent, ici la carte 2. According to a direction of flow of the process designated at 18 in FIG. 9, the equipment 17 comprises one (or more):
'application station 19 with a protective layer 14' mounting station 20 for substrate on a sawing vehicle (designated 25 in FIGS. 5, 6 and 9) 'sawing station 21 for microcircuits 3' fixing station 22 of microcircuit on its support 8 'connection station 23 of the pads 7 to the interface elements 10, and' integration station 24 of the module (1) in an intelligent portable object, here the card 2.
Pour simplifier la lecture, les étapes effectuées sur ces postes sont désignées par les mêmes références numériques. To simplify reading, the steps performed on these stations are designated by the same reference numerals.
Cet équipement 17 possède son poste 19 d'application unitaire de la couche de protection isolante 14 sur une plaque ou substrat désignée en 26 et regroupant plusieurs microcircuits, en amont du poste de montage 20, suivant le sens 18 du procédé. This equipment 17 has its station 19 for unitary application of the insulating protective layer 14 on a plate or substrate designated at 26 and grouping together several microcircuits, upstream from the mounting station 20, according to the direction 18 of the process.
Tandis qu'en aval du poste de fixation 22 (ici par collage), l'équipement 17 possède un poste 23 de dépose d'un matériau 11 conducteur assurant la connexion du microcircuit 3 aux éléments d'interface (ici un bornier pour une carte à puce). While downstream of the fixing station 22 (here by bonding), the equipment 17 has a station 23 for depositing a conductive material 11 ensuring the connection of the microcircuit 3 to the interface elements (here a terminal block for a card smart).
En se reportant aux figures 1 à 8 notamment, passons à l'exposé du procédé de fabrication de dispositifs électroniques 1. Referring to FIGS. 1 to 8 in particular, let us pass to the description of the process for manufacturing electronic devices 1.
De manière classique, un tel procédé comprend l'enchaînement chronologique suivant d'étapes prévoyant de : monter (comme illustré par la flèche 20 sur la figure 5), sur un véhicule de sciage 25 une plaque semi-conductrice dite wafer 26, formant substrat unitaire pour plusieurs microcircuits 3 ; Conventionally, such a method comprises the following chronological sequence of steps providing for: mounting (as illustrated by the arrow 20 in FIG. 5), on a sawing vehicle 25 a semiconductor plate called a wafer 26, forming a substrate unit for several microcircuits 3;
<Desc/Clms Page number 11> <Desc / Clms Page number 11>
'scier (comme illustré par la flèche 21 sur la figure 6) par exemple à l'aide d'un outil diamanté tel que scie circulaire, chacun des microcircuits 3 pour les rendre unitaires, mais en les gardant solidaires et soutenus par le véhicule 25 ; 'placer puis fixer (sur un poste tel que celui désigné en 22 sur la figure 9) le microcircuit 3 sur son support 8 ; 'connecter (sur un poste tel que celui désigné en 23 sur la figure
9) les éléments d'interface 10 aux plots 7 correspondants ; puis . déposer le matériau de protection.
'' saw (as illustrated by arrow 21 in Figure 6) for example using a diamond tool such as circular saw, each of the microcircuits 3 to make them unitary, but keeping them integral and supported by the vehicle 25 ; 'place then fix (on a station such as that designated at 22 in Figure 9) the microcircuit 3 on its support 8; '' connect (on a station such as that designated at 23 in the figure
9) the interface elements 10 to the corresponding pads 7; then. remove the protective material.
Selon l'invention, le procédé de fabrication comporte en synthèse, suivant le sens de déroulement 18, les étapes prévoyant : . avant que la plaque 26 formant substrat ne soit sciée (en 21), d'appliquer (à l'étape 19 sur la figure 9) une couche diélectrique
14 de protection sur au moins une face active 6 de microcircuit
3 de cette plaque 26 ; 'pour au moins un micromodule 3, de le placer puis de le fixer (à l'étape 22 sur la figure 9) sur son support 8, par collage de sa face passive 5, une périphérie de la couche 14 formant la barrière 15 contre le débordement de la colle (9-13) sur la face active 6 du microcircuit 3 ; et connecter comme illustré en 23 sur la figure 8, après avoir finalisé la protection comme illustré sur la figure 7, chaque élément d'interface 10 au plot 7 correspondant, ici par dépose (étape 23) de matériau conducteur. According to the invention, the manufacturing process comprises in synthesis, according to the direction of unfolding 18, the stages providing: before the plate 26 forming the substrate is sawn (at 21), applying (in step 19 in FIG. 9) a dielectric layer
14 of protection on at least one active face 6 of microcircuit
3 of this plate 26; '' for at least one micromodule 3, place it and then fix it (in step 22 in Figure 9) on its support 8, by bonding its passive face 5, a periphery of the layer 14 forming the barrier 15 against the glue overflow (9-13) on the active face 6 of the microcircuit 3; and connect as illustrated at 23 in FIG. 8, after having finalized the protection as illustrated in FIG. 7, each interface element 10 to the corresponding pad 7, here by depositing (step 23) of conductive material.
On a donc vu que l'étape 19 lors de laquelle la couche de protection 14 est appliquée, est effectuée avant le montage 20 de la plaque 26 sur son véhicule 25. Dans les exemples, notons que les microcircuits 3 possèdent sur leur face active 6 une couche de passivation qui n'est pas représentée : la couche de protection 14 est appliquée sur cette couche de passivation. We have therefore seen that step 19 during which the protective layer 14 is applied, is carried out before mounting the plate 26 on its vehicle 25. In the examples, note that the microcircuits 3 have on their active face 6 a passivation layer which is not shown: the protective layer 14 is applied to this passivation layer.
D'autres particularités du procédé sont décrites maintenant. Other features of the process are now described.
Dans les exemples, les étapes prévoyant d'appliquer en 19 la couche de protection 14, de placer puis fixer en 22 le microcircuit 3 sur son support 8 et de le connecter (23), sont intégrées à un procédé de fabrication en ligne et continu. La cadence de ces étapes est proche de In the examples, the steps providing for applying at 19 the protective layer 14, placing then fixing at 22 the microcircuit 3 on its support 8 and connecting it (23), are integrated into a continuous and online manufacturing process . The pace of these stages is close to
<Desc/Clms Page number 12><Desc / Clms Page number 12>
celle d'étapes de fabrication en amont et en aval, suivant le sens de déroulement 18 du procédé. that of manufacturing stages upstream and downstream, according to the direction of flow 18 of the process.
Sur les figures 1 à 3 et 9, la couche de protection 14 est un film diélectrique en polymère, d'une épaisseur par exemple de l'ordre de 50pom. Ce film est d'abord déroulé depuis une bobine de distribution 29 puis appliqué par lamination. In FIGS. 1 to 3 and 9, the protective layer 14 is a dielectric polymer film, with a thickness for example of the order of 50 μm. This film is first unwound from a distribution reel 29 and then applied by lamination.
La figure 2 montre un tel film, aussi désigné en 14, à travers lequel des évidemments 30 d'accès sont réservés préalablement à la lamination. FIG. 2 shows such a film, also designated at 14, through which access recesses 30 are reserved prior to lamination.
Chaque évidemment 30 débouche une fois la couche 14 appliquée sur la plaque 26 comme illustré sur la figure 4, en regard des plots de connexion 7. Sur le film 14, les évidements 30 sont préalablement formés par découpe laser, mécanique telle qu'estampage ou analogues, avant la mise en bobine 29. Each obviously 30 opens once the layer 14 applied to the plate 26 as illustrated in FIG. 4, opposite the connection pads 7. On the film 14, the recesses 30 are previously formed by laser cutting, mechanical cutting or stamping or similar, before re-reeling 29.
La réalisation de la figure 3 montre une couche de protection 14 en film diélectrique polymère, appliqué aussi par lamination. Mais ici, les évidemments d'accès 30 sont formés après lamination sur la face active 6. The embodiment of FIG. 3 shows a protective layer 14 of polymeric dielectric film, also applied by lamination. But here, the access recesses 30 are formed after lamination on the active face 6.
Un outil de découpe est désigné en 31 pour former ces évidements 30. Selon les réalisations, cet outil opère la découpe dans le film 14 par laser, estampage ou analogues. A cutting tool is designated at 31 to form these recesses 30. According to the embodiments, this tool operates the cutting in the film 14 by laser, stamping or the like.
Dans la réalisation de la figure 4, la couche de protection 14 est un matériau diélectrique polymère et initialement visqueux. Ici, la couche 14 est appliquée par sérigraphie. Alors, les évidemments 30 sont formés lors de la sérigraphie, pour qu'it n'y ait pas de protection aux emplacements désirés. In the embodiment of FIG. 4, the protective layer 14 is a polymeric and initially viscous dielectric material. Here, layer 14 is applied by screen printing. Then, the recesses 30 are formed during screen printing, so that there is no protection at the desired locations.
Plus précisemment, un écran avec une zone de masquage est utilisé pour empêcher le dépôt de matériau de sérigraphie sur les plots 7. More precisely, a screen with a masking area is used to prevent the deposition of screen printing material on the pads 7.
Cet éran n'est pas représenté sur les figures. This screen is not shown in the figures.
Encore une autre réalisation prévoit que la couche de protection 14 est aussi en matériau diélectrique polymère et initialement visqueux, tel qu'encre ou colle polymère, mais est ici appliqué par jet de matière. Par exemple, une matrice de buses d'une section de l'ordre de 20um lance du matériau 14 sur la face 6, sauf à l'emplacement des évidemments 30. Ceci est obtenu par programmation lors de la projection des jets. Yet another embodiment provides that the protective layer 14 is also made of a polymeric and initially viscous dielectric material, such as ink or polymer adhesive, but is here applied by jet of material. For example, a matrix of nozzles with a section of the order of 20 μm launches material 14 on the face 6, except at the location of the recesses 30. This is obtained by programming when the jets are projected.
Le résultat atteint à la fin de l'étape d'application, quelle que soit la technique, est tel que celui montré sur la figure 4 : la face destinée à The result achieved at the end of the application step, whatever the technique, is such as that shown in FIG. 4: the face intended for
<Desc/Clms Page number 13> <Desc / Clms Page number 13>
former les faces actives 6 de la plaque 26 est"entièrement"revêtue de) a couche 14, sauf à l'emplacement des évidements 30.
forming the active faces 6 of the plate 26 is "entirely" coated with) a layer 14, except at the location of the recesses 30.
Une mise en oeuvre avec l'application d'un matériau initialement visqueux par sérigraphie ou jet d'encre prévoit, par exemple avant le sciage 28, une étape de polymérisation par apport thermique, photonique, chimique ou analogues. Cette étape est schématisée sur la figure 4 en 32. An implementation with the application of an initially viscous material by screen printing or ink jet provides, for example before sawing 28, a step of polymerization by thermal, photonic, chemical or the like. This step is shown diagrammatically in FIG. 4 at 32.
Il ressort des figures 7 et 8 notamment que la couche 14 présente une barrière 15 (dans cette réalisation d'une épaisseur de 70um) dont le profil externe est sensiblement identique à-ainsi qu'au droit de-la tranche périphérique 4. La barrière 15 empêche le débordement vers l'intérieur de la colle 9/13 sur la face active 6. En effet, la colle 9/13 flue vers le haut et contre les tanches 4, lors de l'étape de fixation du microcircuit 3. Ici, cette colle 9/13 est une résine polymère isolante. It appears from FIGS. 7 and 8 in particular that the layer 14 has a barrier 15 (in this embodiment with a thickness of 70 μm) whose external profile is substantially identical to — as well as to the right of — the peripheral section 4. The barrier 15 prevents the glue 9/13 from overflowing inwards onto the active face 6. In fact, the glue 9/13 creeps upwards and against the slabs 4, during the step of fixing the microcircuit 3. Here , this glue 9/13 is an insulating polymer resin.
A la fin de la fixation, cette colle 9/13 est remontée contre la tranche périphérique externe 4 du microcircuit 3. At the end of the fixing, this adhesive 9/13 is raised against the external peripheral edge 4 of the microcircuit 3.
Dans une réalisation, l'épaisseur de colle 9/13 est comprise entre 80% et 100% de l'épaisseur du microcircuit 3 telle que de l'ordre de 180um, avec une tolérance de l'ordre de +/-10% de l'épaisseur du microcircuit 3. In one embodiment, the thickness of glue 9/13 is between 80% and 100% of the thickness of the microcircuit 3 such as of the order of 180 μm, with a tolerance of the order of +/- 10% of the thickness of the microcircuit 3.
En se reportant à la figure 8, on comprend que l'étape 23 visant à connecter les plots 7, est effectuée par dépose de matériau conducteur 11 tel que résine ou colle polymère. Une telle colle est soit intrinsèquement conductrice d'électricité, soit elle est chargée en particules électriquement conductrices. Referring to Figure 8, it is understood that step 23 aimed at connecting the pads 7, is carried out by depositing conductive material 11 such as resin or polymer adhesive. Such an adhesive is either intrinsically electrically conductive, or it is charged with electrically conductive particles.
Selon les réalisation, cette connexion est effectuée par tampographie, jet d'encre, dépose à la seringue ou analogues. According to the embodiments, this connection is made by pad printing, ink jet, syringe deposition or the like.
Il ressort de la figure 8 qu'ici le matériau de connexion 11 est déposé sur la colle de fixation 9/13 et donc sur une partie externe de la couche diélectrique 14 de protection. It appears from FIG. 8 that here the connection material 11 is deposited on the fixing adhesive 9/13 and therefore on an external part of the dielectric protective layer 14.
La barrière périphérique 15 est ici recouverte localement par les apports de connexion 11. The peripheral barrier 15 is here locally covered by the connection inputs 11.
On voit en outre que la partire 16 de la face active 6 et donc de la couche de passivation, est dépourvue de cette couche de protection 14. It can also be seen that the part 16 of the active face 6 and therefore of the passivation layer, is devoid of this protective layer 14.
Dans une réalisation non représentée, un apport de connexion appelé bossage (ou"bump"en anglais) est déposé après fixation du microcircuit 3 sur son support 8. Cet apport est souvent disposé sur les In an embodiment not shown, a connection contribution called boss (or "bump" in English) is deposited after fixing the microcircuit 3 on its support 8. This contribution is often placed on the
<Desc/Clms Page number 14><Desc / Clms Page number 14>
plots 7 et destiné à recevoir une portion d'extrémité des raccordements électriques 11 aux éléments d'interface 10. studs 7 and intended to receive an end portion of the electrical connections 11 to the interface elements 10.
L'invention couvre aussi les objets portables intelligents 2 tels que la carte de la figure 9. Mais d'autres objets 2 entrent aussi dans son champ, tels que les étiquettes électroniques ou d'autres objets communicant sans contact. The invention also covers intelligent portable objects 2 such as the card in FIG. 9. But other objects 2 also fall within its scope, such as electronic tags or other objects communicating without contact.
Ainsi, les étiquettes électroniques flexibles sont une application possible de l'invention. En effet, il est plus aisé du fait de l'absence de glob top par exemple, que le module présente des propriétés de flexibilité en correspondance avec celles imposées. Thus, flexible electronic labels are a possible application of the invention. Indeed, it is easier because of the absence of glob top for example, that the module has flexibility properties in correspondence with those imposed.
Grâce à l'invention les contraintes dimensionnelles imposées sont plus faciles à respecter, notamment du fait de la barrière 15. Il est ainsi possible d'obtenir aisément l'épaisseur la plus réduite possible du module. Thanks to the invention, the dimensional constraints imposed are easier to comply with, in particular due to the barrier 15. It is thus possible to easily obtain the smallest possible thickness of the module.
Enfin, l'invention permet l'intégration des étapes de protection du microcircuit dans une fabrication en ligne et continue, à une cadence proche de celle des étapes en amont et en aval. Elle assure une protection optimale du microcircuit, avec les techniques de fixation par collage et de connexion par dispense . Finally, the invention allows the integration of the microcircuit protection steps in an online and continuous manufacturing, at a rate close to that of the upstream and downstream steps. It provides optimal protection for the microcircuit, with bonding and exemption connection techniques.
Claims (20)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0015941A FR2817656B1 (en) | 2000-12-05 | 2000-12-05 | ELECTRICAL INSULATION OF GROUPED MICROCIRCUITS BEFORE UNIT BONDING |
PCT/FR2001/003834 WO2002047161A2 (en) | 2000-12-05 | 2001-12-05 | Barrier against overflow for fixing adhesive of a semiconductor chip |
AU2002216172A AU2002216172A1 (en) | 2000-12-05 | 2001-12-05 | Barrier against overflow for fixing adhesive of a semiconductor chip |
PCT/FR2001/003846 WO2002047151A2 (en) | 2000-12-05 | 2001-12-05 | Method for making a semiconductor chip using an integrated rigidity layer |
AU2002216182A AU2002216182A1 (en) | 2000-12-05 | 2001-12-05 | Method for making a semiconductor chip using an integrated rigidity layer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0015941A FR2817656B1 (en) | 2000-12-05 | 2000-12-05 | ELECTRICAL INSULATION OF GROUPED MICROCIRCUITS BEFORE UNIT BONDING |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2817656A1 true FR2817656A1 (en) | 2002-06-07 |
FR2817656B1 FR2817656B1 (en) | 2003-09-26 |
Family
ID=8857387
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0015941A Expired - Fee Related FR2817656B1 (en) | 2000-12-05 | 2000-12-05 | ELECTRICAL INSULATION OF GROUPED MICROCIRCUITS BEFORE UNIT BONDING |
Country Status (3)
Country | Link |
---|---|
AU (2) | AU2002216172A1 (en) |
FR (1) | FR2817656B1 (en) |
WO (2) | WO2002047151A2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2845805A1 (en) * | 2002-10-10 | 2004-04-16 | Gemplus Card Int | Electronic device manufacturing method of the roll to roll type wherein chips are inserted from the same face of the advancing structure, as that on which conducting strips are applied, using an adhesive insertion layer |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102006010523B3 (en) | 2006-02-20 | 2007-08-02 | Siemens Ag | Method and device for contacting an electrical contact surface on a substrate and/or a component on the substrate laminates an insulating film with laser-cut openings and applies electrically conductive material |
JP4303282B2 (en) | 2006-12-22 | 2009-07-29 | Tdk株式会社 | Wiring structure of printed wiring board and method for forming the same |
EP2357875A1 (en) * | 2010-02-16 | 2011-08-17 | Gemalto SA | Method for manufacturing an electronic box |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS535970A (en) * | 1976-07-07 | 1978-01-19 | Toshiba Corp | Semiconductor device |
JPS53120271A (en) * | 1977-03-29 | 1978-10-20 | Mitsubishi Electric Corp | Semiconductor device |
JPS5760844A (en) * | 1980-09-30 | 1982-04-13 | Nec Corp | Semiconductor device |
US5144407A (en) * | 1989-07-03 | 1992-09-01 | General Electric Company | Semiconductor chip protection layer and protected chip |
FR2779272A1 (en) * | 1998-05-27 | 1999-12-03 | Gemplus Card Int | METHOD FOR MANUFACTURING A MICROMODULE AND A STORAGE MEDIUM COMPRISING SUCH A MICROMODULE |
FR2779851A1 (en) * | 1998-06-12 | 1999-12-17 | Gemplus Card Int | METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT CARD AND CARD OBTAINED |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3212110B2 (en) * | 1991-07-15 | 2001-09-25 | 沖電気工業株式会社 | Method for manufacturing semiconductor device |
JP3128878B2 (en) * | 1991-08-23 | 2001-01-29 | ソニー株式会社 | Semiconductor device |
FR2735284B1 (en) * | 1995-06-12 | 1997-08-29 | Solaic Sa | CHIP FOR ELECTRONIC CARD COATED WITH A LAYER OF INSULATING MATERIAL AND ELECTRONIC CARD CONTAINING SUCH A CHIP |
DE19845296A1 (en) * | 1998-09-03 | 2000-03-16 | Fraunhofer Ges Forschung | Method for contacting a circuit chip |
FR2791471B1 (en) * | 1999-03-22 | 2002-01-25 | Gemplus Card Int | METHOD FOR MANUFACTURING INTEGRATED CIRCUIT CHIPS |
FR2806189B1 (en) * | 2000-03-10 | 2002-05-31 | Schlumberger Systems & Service | REINFORCED INTEGRATED CIRCUIT AND METHOD FOR REINFORCING INTEGRATED CIRCUITS |
-
2000
- 2000-12-05 FR FR0015941A patent/FR2817656B1/en not_active Expired - Fee Related
-
2001
- 2001-12-05 AU AU2002216172A patent/AU2002216172A1/en not_active Abandoned
- 2001-12-05 WO PCT/FR2001/003846 patent/WO2002047151A2/en not_active Application Discontinuation
- 2001-12-05 WO PCT/FR2001/003834 patent/WO2002047161A2/en not_active Application Discontinuation
- 2001-12-05 AU AU2002216182A patent/AU2002216182A1/en not_active Abandoned
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS535970A (en) * | 1976-07-07 | 1978-01-19 | Toshiba Corp | Semiconductor device |
JPS53120271A (en) * | 1977-03-29 | 1978-10-20 | Mitsubishi Electric Corp | Semiconductor device |
JPS5760844A (en) * | 1980-09-30 | 1982-04-13 | Nec Corp | Semiconductor device |
US5144407A (en) * | 1989-07-03 | 1992-09-01 | General Electric Company | Semiconductor chip protection layer and protected chip |
FR2779272A1 (en) * | 1998-05-27 | 1999-12-03 | Gemplus Card Int | METHOD FOR MANUFACTURING A MICROMODULE AND A STORAGE MEDIUM COMPRISING SUCH A MICROMODULE |
FR2779851A1 (en) * | 1998-06-12 | 1999-12-17 | Gemplus Card Int | METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT CARD AND CARD OBTAINED |
Non-Patent Citations (3)
Title |
---|
PATENT ABSTRACTS OF JAPAN vol. 002, no. 040 (E - 022) 16 March 1978 (1978-03-16) * |
PATENT ABSTRACTS OF JAPAN vol. 002, no. 150 (E - 078) 15 December 1978 (1978-12-15) * |
PATENT ABSTRACTS OF JAPAN vol. 006, no. 136 (E - 120) 23 July 1982 (1982-07-23) * |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2845805A1 (en) * | 2002-10-10 | 2004-04-16 | Gemplus Card Int | Electronic device manufacturing method of the roll to roll type wherein chips are inserted from the same face of the advancing structure, as that on which conducting strips are applied, using an adhesive insertion layer |
Also Published As
Publication number | Publication date |
---|---|
AU2002216182A1 (en) | 2002-06-18 |
AU2002216172A1 (en) | 2002-06-18 |
WO2002047161A3 (en) | 2003-04-24 |
WO2002047151A2 (en) | 2002-06-13 |
WO2002047151B1 (en) | 2004-02-26 |
FR2817656B1 (en) | 2003-09-26 |
WO2002047161A2 (en) | 2002-06-13 |
WO2002047151A3 (en) | 2003-02-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0391790B1 (en) | Method of manufacturing an electronic module | |
EP1619722B1 (en) | Method for manufacturing backside-illuminated optical sensor | |
EP1168240B1 (en) | Connection by depositing a viscous material following the relief shape | |
EP1715518B1 (en) | Device for protecting an electronic circuit | |
EP0321340A1 (en) | Electronic-component support, especially for a memory card, and product so obtained | |
EP0647357A1 (en) | Semiconductor chip encapsulation method, device produced by this method and its application to three dimensional chip interconnection | |
EP0226480B1 (en) | Method of manufacturing a housing for a microelectronic device with contact pads, and its use in cards containing components | |
FR2761527A1 (en) | METHOD OF MANUFACTURING CONTACTLESS CARD WITH ANTENNA CONNECTION BY WELDED WIRES | |
EP1478021B1 (en) | Semiconductor device and manufacturing method thereof | |
EP0321326B1 (en) | Method for positioning an electronic component on a substrate | |
EP0321327B1 (en) | Method of mounting an electronic component and its electronic connections on a support | |
EP1724712A1 (en) | Micromodule, specifically for a smart card | |
EP1192592B1 (en) | Device and method for making devices comprising at least a chip fixed on a support | |
FR2817656A1 (en) | ELECTRICAL INSULATION OF GROUPED MICROCIRCUITS BEFORE UNIT BONDING | |
EP1192593A1 (en) | Device and method for making devices comprising at least a chip mounted on a support | |
WO2000045434A1 (en) | Integrated circuit device, electronic module for chip card using said device and method for making same | |
WO2000031686A1 (en) | Method for making a flush chip card using a laser engraving step and resulting chip card | |
FR2831718A1 (en) | MALE ELECTRICAL CONNECTION OF A CONNECTION PLOT FROM A CHIP TO A COMMUNICATION INTERFACE, IN PARTICULAR FOR INTELLIGENT PORTABLE OBJECT SUCH AS A CHIP CARD | |
EP1210690B1 (en) | Electronic device comprising a chip fixed on a support and method for making same | |
EP0901165A1 (en) | Housing for integrated circuit and method for mounting integrated circuit | |
WO2002050905A1 (en) | Connection by cut-out insulation and plane-printed weld | |
WO2001015266A1 (en) | Method for making electronic micromodules and micromodules obtained by said method | |
WO2000060656A1 (en) | Method for producing portable electronic devices having an integrated circuit which is protected by a pulverized film | |
FR2831991A1 (en) | Localized encapsulation of a connection comprising bonding pads and conductors for an intelligent portable object such as a chip card | |
FR3030087A1 (en) | MODULE FOR MICROCIRCUIT CARDS, MICROCIRCUIT CARDS COMPRISING SUCH A MODULE AND METHOD OF MANUFACTURE |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |
Effective date: 20090831 |