FR2814854B1 - Procede de fabrication d'ilots juxtaposes par depot autoorganise sur un substrat et structure ainsi obtenue - Google Patents

Procede de fabrication d'ilots juxtaposes par depot autoorganise sur un substrat et structure ainsi obtenue

Info

Publication number
FR2814854B1
FR2814854B1 FR0012505A FR0012505A FR2814854B1 FR 2814854 B1 FR2814854 B1 FR 2814854B1 FR 0012505 A FR0012505 A FR 0012505A FR 0012505 A FR0012505 A FR 0012505A FR 2814854 B1 FR2814854 B1 FR 2814854B1
Authority
FR
France
Prior art keywords
ilots
juxtaposes
self
substrate
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0012505A
Other languages
English (en)
Other versions
FR2814854A1 (fr
Inventor
David Martrou
Noel Magnea
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to FR0012505A priority Critical patent/FR2814854B1/fr
Priority to PCT/FR2001/003026 priority patent/WO2002029871A1/fr
Priority to EP01974416A priority patent/EP1238413A1/fr
Priority to JP2002533353A priority patent/JP2004511100A/ja
Publication of FR2814854A1 publication Critical patent/FR2814854A1/fr
Priority to US10/163,035 priority patent/US7285378B2/en
Application granted granted Critical
Publication of FR2814854B1 publication Critical patent/FR2814854B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/02433—Crystal orientation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/02428—Structure
    • H01L21/0243—Surface structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02658—Pretreatments

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Micromachines (AREA)
  • Physical Vapour Deposition (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Optical Integrated Circuits (AREA)
FR0012505A 2000-10-02 2000-10-02 Procede de fabrication d'ilots juxtaposes par depot autoorganise sur un substrat et structure ainsi obtenue Expired - Fee Related FR2814854B1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR0012505A FR2814854B1 (fr) 2000-10-02 2000-10-02 Procede de fabrication d'ilots juxtaposes par depot autoorganise sur un substrat et structure ainsi obtenue
PCT/FR2001/003026 WO2002029871A1 (fr) 2000-10-02 2001-10-01 Procede de fabrication d"ilots juxtaposes par depot autoorganise sur un substrat et structure ainsi obtenue
EP01974416A EP1238413A1 (fr) 2000-10-02 2001-10-01 Procede de fabrication d'ilots juxtaposes par depot autoorganise sur un substrat et structure ainsi obtenue
JP2002533353A JP2004511100A (ja) 2000-10-02 2001-10-01 基板上に自己組織化堆積法によって並列配置されたアイランドの形成方法及びその方法を用いて得られた構造
US10/163,035 US7285378B2 (en) 2000-10-02 2002-06-04 Juxtaposed island manufacturing method by means of self-organised deposition on a substrate and structure obtained using said method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0012505A FR2814854B1 (fr) 2000-10-02 2000-10-02 Procede de fabrication d'ilots juxtaposes par depot autoorganise sur un substrat et structure ainsi obtenue

Publications (2)

Publication Number Publication Date
FR2814854A1 FR2814854A1 (fr) 2002-04-05
FR2814854B1 true FR2814854B1 (fr) 2003-07-25

Family

ID=8854874

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0012505A Expired - Fee Related FR2814854B1 (fr) 2000-10-02 2000-10-02 Procede de fabrication d'ilots juxtaposes par depot autoorganise sur un substrat et structure ainsi obtenue

Country Status (5)

Country Link
US (1) US7285378B2 (fr)
EP (1) EP1238413A1 (fr)
JP (1) JP2004511100A (fr)
FR (1) FR2814854B1 (fr)
WO (1) WO2002029871A1 (fr)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0779158B2 (ja) 1988-11-19 1995-08-23 新技術事業団 結合量子箱列構造半導体
US5013683A (en) * 1989-01-23 1991-05-07 The Regents Of The University Of California Method for growing tilted superlattices
JP2575901B2 (ja) * 1989-11-13 1997-01-29 新技術事業団 グリッド入り量子構造
US5298108A (en) * 1991-07-05 1994-03-29 The University Of California Serpentine superlattice methods and devices
US5436468A (en) * 1992-03-17 1995-07-25 Fujitsu Limited Ordered mixed crystal semiconductor superlattice device
DE69429906T2 (de) * 1993-11-25 2002-08-01 Nippon Telegraph And Telephone Corp., Tokio/Tokyo Halbleiterstruktur und Herstellungsverfahren

Also Published As

Publication number Publication date
WO2002029871A1 (fr) 2002-04-11
EP1238413A1 (fr) 2002-09-11
FR2814854A1 (fr) 2002-04-05
US7285378B2 (en) 2007-10-23
US20030064570A1 (en) 2003-04-03
JP2004511100A (ja) 2004-04-08

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20100630