FR2813460B1 - Circuit de filtrage de signaux logiques parasites - Google Patents

Circuit de filtrage de signaux logiques parasites

Info

Publication number
FR2813460B1
FR2813460B1 FR0010884A FR0010884A FR2813460B1 FR 2813460 B1 FR2813460 B1 FR 2813460B1 FR 0010884 A FR0010884 A FR 0010884A FR 0010884 A FR0010884 A FR 0010884A FR 2813460 B1 FR2813460 B1 FR 2813460B1
Authority
FR
France
Prior art keywords
interfered
filtering
circuit
logic signals
logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0010884A
Other languages
English (en)
Other versions
FR2813460A1 (fr
Inventor
Rosa Francesco La
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0010884A priority Critical patent/FR2813460B1/fr
Priority to US09/938,289 priority patent/US6507221B2/en
Publication of FR2813460A1 publication Critical patent/FR2813460A1/fr
Application granted granted Critical
Publication of FR2813460B1 publication Critical patent/FR2813460B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/125—Discriminating pulses
    • H03K5/1252—Suppression or limitation of noise or interference

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
FR0010884A 2000-08-24 2000-08-24 Circuit de filtrage de signaux logiques parasites Expired - Fee Related FR2813460B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0010884A FR2813460B1 (fr) 2000-08-24 2000-08-24 Circuit de filtrage de signaux logiques parasites
US09/938,289 US6507221B2 (en) 2000-08-24 2001-08-23 Circuit for the filtering of parasitic logic signals

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0010884A FR2813460B1 (fr) 2000-08-24 2000-08-24 Circuit de filtrage de signaux logiques parasites

Publications (2)

Publication Number Publication Date
FR2813460A1 FR2813460A1 (fr) 2002-03-01
FR2813460B1 true FR2813460B1 (fr) 2003-01-24

Family

ID=8853701

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0010884A Expired - Fee Related FR2813460B1 (fr) 2000-08-24 2000-08-24 Circuit de filtrage de signaux logiques parasites

Country Status (2)

Country Link
US (1) US6507221B2 (fr)
FR (1) FR2813460B1 (fr)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005057217A (ja) * 2003-08-07 2005-03-03 Renesas Technology Corp 半導体集積回路装置
JP2005198240A (ja) * 2003-12-09 2005-07-21 Mitsubishi Electric Corp 半導体回路
US8319524B1 (en) 2004-01-05 2012-11-27 Marvell International Ltd. Deglitch circuit removing glitches from input clock signal
JP2007088712A (ja) * 2005-09-21 2007-04-05 Seiko Instruments Inc ノイズフィルタ回路
JP2009529823A (ja) * 2006-03-10 2009-08-20 エヌエックスピー ビー ヴィ 水晶発振子のためのパルス整形回路
US7411427B1 (en) 2006-07-28 2008-08-12 Zilog, Inc. Clock input filter circuit
US7629828B1 (en) * 2007-04-27 2009-12-08 Zilog, Inc. Glitch-free clock multiplexer that provides an output clock signal based on edge detection
US8901955B2 (en) 2012-11-05 2014-12-02 Sandisk Technologies Inc. High speed buffer with high noise immunity
KR101444546B1 (ko) * 2012-12-05 2014-09-25 삼성전기주식회사 잡음 필터 회로 및 그 동작 방법
US8803550B2 (en) * 2012-12-12 2014-08-12 Sandisk Technologies Inc. Dynamic high speed buffer with wide input noise margin
FR3075519A1 (fr) 2017-12-14 2019-06-21 Stmicroelectronics (Rousset) Sas Dispositif de filtrage de signaux, notamment des signaux d'un bus i2c
WO2020135955A1 (fr) * 2018-12-27 2020-07-02 Ams International Ag Filtres destinés à retirer les perturbations de signaux
FR3094829B1 (fr) 2019-04-05 2021-03-12 St Microelectronics Rousset Procédé d’écriture de mémoire non-volatile électriquement effaçable et programmable et circuit intégré correspondant

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4137504A (en) * 1977-08-12 1979-01-30 Digital Equipment Corporation Digital filter
US4599525A (en) * 1983-02-02 1986-07-08 Rockwell International Corporation De-glitch circuitry for video game memories
US5479132A (en) * 1994-06-06 1995-12-26 Ramtron International Corporation Noise and glitch suppressing filter with feedback
JPH0998074A (ja) * 1995-10-02 1997-04-08 Toshiba Corp ロウパスフィルタ
US5821782A (en) * 1995-12-18 1998-10-13 Lucent Technologies Inc. Frequency synthesis using a remodulator
US5907250A (en) * 1997-05-16 1999-05-25 International Business Machines Corporation Transition detector with timer
DE19753095A1 (de) * 1997-11-29 1999-06-02 Philips Patentverwaltung Integrator-Filterschaltung

Also Published As

Publication number Publication date
US6507221B2 (en) 2003-01-14
FR2813460A1 (fr) 2002-03-01
US20020113643A1 (en) 2002-08-22

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20080430