FR2802318B1 - Procede d'acces a des donnees dans un systeme en reseau et systeme en reseau - Google Patents
Procede d'acces a des donnees dans un systeme en reseau et systeme en reseauInfo
- Publication number
- FR2802318B1 FR2802318B1 FR0016056A FR0016056A FR2802318B1 FR 2802318 B1 FR2802318 B1 FR 2802318B1 FR 0016056 A FR0016056 A FR 0016056A FR 0016056 A FR0016056 A FR 0016056A FR 2802318 B1 FR2802318 B1 FR 2802318B1
- Authority
- FR
- France
- Prior art keywords
- network system
- accessing data
- network
- accessing
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0815—Cache consistency protocols
- G06F12/0817—Cache consistency protocols using directory methods
- G06F12/0822—Copy directories
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0813—Multiuser, multiprocessor or multiprocessing cache systems with a network or matrix configuration
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0877—Cache access modes
- G06F12/0884—Parallel mode, e.g. in parallel with main memory or CPU
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/25—Using a specific main memory architecture
- G06F2212/254—Distributed memory
- G06F2212/2542—Non-uniform memory access [NUMA] architecture
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP34980999A JP2001167077A (ja) | 1999-12-09 | 1999-12-09 | ネットワークシステムにおけるデータアクセス方法、ネットワークシステムおよび記録媒体 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2802318A1 FR2802318A1 (fr) | 2001-06-15 |
FR2802318B1 true FR2802318B1 (fr) | 2006-09-22 |
Family
ID=18406272
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0016056A Expired - Fee Related FR2802318B1 (fr) | 1999-12-09 | 2000-12-11 | Procede d'acces a des donnees dans un systeme en reseau et systeme en reseau |
Country Status (3)
Country | Link |
---|---|
US (1) | US7093078B2 (fr) |
JP (1) | JP2001167077A (fr) |
FR (1) | FR2802318B1 (fr) |
Families Citing this family (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8301844B2 (en) * | 2004-01-13 | 2012-10-30 | Hewlett-Packard Development Company, L.P. | Consistency evaluation of program execution across at least one memory barrier |
US7296129B2 (en) * | 2004-07-30 | 2007-11-13 | International Business Machines Corporation | System, method and storage medium for providing a serialized memory interface with a bus repeater |
US7389375B2 (en) * | 2004-07-30 | 2008-06-17 | International Business Machines Corporation | System, method and storage medium for a multi-mode memory buffer device |
US7224595B2 (en) * | 2004-07-30 | 2007-05-29 | International Business Machines Corporation | 276-Pin buffered memory module with enhanced fault tolerance |
JP4504134B2 (ja) | 2004-08-16 | 2010-07-14 | 富士通株式会社 | システム制御装置、投機フェッチ方法および情報処理装置 |
JP4695367B2 (ja) * | 2004-08-31 | 2011-06-08 | 富士通株式会社 | 情報処理装置,制御装置及び情報処理装置の制御方法 |
US7441060B2 (en) * | 2004-10-29 | 2008-10-21 | International Business Machines Corporation | System, method and storage medium for providing a service interface to a memory system |
US7277988B2 (en) * | 2004-10-29 | 2007-10-02 | International Business Machines Corporation | System, method and storage medium for providing data caching and data compression in a memory subsystem |
US7305574B2 (en) * | 2004-10-29 | 2007-12-04 | International Business Machines Corporation | System, method and storage medium for bus calibration in a memory subsystem |
US7331010B2 (en) | 2004-10-29 | 2008-02-12 | International Business Machines Corporation | System, method and storage medium for providing fault detection and correction in a memory subsystem |
US7512762B2 (en) | 2004-10-29 | 2009-03-31 | International Business Machines Corporation | System, method and storage medium for a memory subsystem with positional read data latency |
US7356737B2 (en) * | 2004-10-29 | 2008-04-08 | International Business Machines Corporation | System, method and storage medium for testing a memory module |
US7299313B2 (en) | 2004-10-29 | 2007-11-20 | International Business Machines Corporation | System, method and storage medium for a memory subsystem command interface |
JP4362454B2 (ja) * | 2005-04-07 | 2009-11-11 | 富士通株式会社 | キャッシュコヒーレンス管理装置およびキャッシュコヒーレンス管理方法 |
US7478259B2 (en) | 2005-10-31 | 2009-01-13 | International Business Machines Corporation | System, method and storage medium for deriving clocks in a memory system |
US7685392B2 (en) | 2005-11-28 | 2010-03-23 | International Business Machines Corporation | Providing indeterminate read data latency in a memory system |
JP4848771B2 (ja) * | 2006-01-04 | 2011-12-28 | 株式会社日立製作所 | キャッシュ一貫性制御方法およびチップセットおよびマルチプロセッサシステム |
US7640386B2 (en) * | 2006-05-24 | 2009-12-29 | International Business Machines Corporation | Systems and methods for providing memory modules with multiple hub devices |
US7493439B2 (en) * | 2006-08-01 | 2009-02-17 | International Business Machines Corporation | Systems and methods for providing performance monitoring in a memory system |
US7669086B2 (en) * | 2006-08-02 | 2010-02-23 | International Business Machines Corporation | Systems and methods for providing collision detection in a memory system |
US7587559B2 (en) * | 2006-08-10 | 2009-09-08 | International Business Machines Corporation | Systems and methods for memory module power management |
JP4829038B2 (ja) * | 2006-08-17 | 2011-11-30 | 富士通株式会社 | マルチプロセッサシステム |
US7870459B2 (en) * | 2006-10-23 | 2011-01-11 | International Business Machines Corporation | High density high reliability memory module with power gating and a fault tolerant address and command bus |
US7721140B2 (en) | 2007-01-02 | 2010-05-18 | International Business Machines Corporation | Systems and methods for improving serviceability of a memory system |
US7606988B2 (en) * | 2007-01-29 | 2009-10-20 | International Business Machines Corporation | Systems and methods for providing a dynamic memory bank page policy |
US7603526B2 (en) * | 2007-01-29 | 2009-10-13 | International Business Machines Corporation | Systems and methods for providing dynamic memory pre-fetch |
JP5163220B2 (ja) | 2008-03-26 | 2013-03-13 | 富士通株式会社 | キャッシュ制御装置、情報処理装置 |
KR101426187B1 (ko) | 2010-05-27 | 2014-07-31 | 후지쯔 가부시끼가이샤 | 메모리 시스템 및 메모리 인터페이스 장치 |
CN102947817B (zh) * | 2010-06-23 | 2016-03-02 | 富士通株式会社 | 通信装置、通信方法以及通信程序 |
US9727879B2 (en) * | 2011-03-30 | 2017-08-08 | Nokia Technologies Oy | Method and apparatus for providing tag-based content installation |
US20130086328A1 (en) * | 2011-06-13 | 2013-04-04 | Paneve, Llc | General Purpose Digital Data Processor, Systems and Methods |
CN105706068B (zh) * | 2013-04-30 | 2019-08-23 | 慧与发展有限责任合伙企业 | 路由存储器流量和i/o流量的存储器网络 |
Family Cites Families (28)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5996585A (ja) | 1982-11-25 | 1984-06-04 | Mitsubishi Electric Corp | 記憶制御方式 |
JPS60200351A (ja) | 1984-03-26 | 1985-10-09 | Hitachi Ltd | 記憶制御方式 |
JPH02205963A (ja) | 1989-01-27 | 1990-08-15 | Digital Equip Corp <Dec> | 読取中断処理 |
JPH05100952A (ja) | 1991-10-07 | 1993-04-23 | Fuji Xerox Co Ltd | データ処理装置 |
JPH05108578A (ja) | 1991-10-19 | 1993-04-30 | Fuji Xerox Co Ltd | 情報処理システム |
JPH06110844A (ja) | 1992-08-11 | 1994-04-22 | Toshiba Corp | 分散共有メモリ型マルチプロセッサシステム |
US5394555A (en) | 1992-12-23 | 1995-02-28 | Bull Hn Information Systems Inc. | Multi-node cluster computer system incorporating an external coherency unit at each node to insure integrity of information stored in a shared, distributed memory |
US5984579A (en) * | 1993-07-02 | 1999-11-16 | Mcclimans; Richard J. | Residual biotech soil |
EP0681240B1 (fr) * | 1994-05-03 | 2001-01-10 | Hewlett-Packard Company | Système à copie de mémoire d'étiquettes d'antémémoire |
JPH08185359A (ja) | 1994-10-31 | 1996-07-16 | Toshiba Corp | メモリサブシステム |
EP0738977B1 (fr) | 1995-03-31 | 2002-07-03 | Sun Microsystems, Inc. | Procédé et dispositif d'initialisation rapide d'accès en mémoire dans un système multiprocesseur à cohérence d'antémémoire |
JP2786124B2 (ja) | 1995-04-26 | 1998-08-13 | 甲府日本電気株式会社 | 共有メモリ型マルチプロセッサシステム |
JPH09128325A (ja) | 1995-11-06 | 1997-05-16 | Mitsubishi Electric Corp | 階層バス制御方式及びバスブリッジ |
US5881303A (en) * | 1996-07-01 | 1999-03-09 | Sun Microsystems, Inc. | Multiprocessing system configured to perform prefetch coherency activity with separate reissue queue for each processing subnode |
US6253292B1 (en) * | 1997-08-22 | 2001-06-26 | Seong Tae Jhang | Distributed shared memory multiprocessor system based on a unidirectional ring bus using a snooping scheme |
US6055610A (en) | 1997-08-25 | 2000-04-25 | Hewlett-Packard Company | Distributed memory multiprocessor computer system with directory based cache coherency with ambiguous mapping of cached data to main-memory locations |
US6209065B1 (en) * | 1997-10-24 | 2001-03-27 | Compaq Computer Corporation | Mechanism for optimizing generation of commit-signals in a distributed shared-memory system |
US6014690A (en) * | 1997-10-24 | 2000-01-11 | Digital Equipment Corporation | Employing multiple channels for deadlock avoidance in a cache coherency protocol |
US6292705B1 (en) * | 1998-09-29 | 2001-09-18 | Conexant Systems, Inc. | Method and apparatus for address transfers, system serialization, and centralized cache and transaction control, in a symetric multiprocessor system |
US6065077A (en) * | 1997-12-07 | 2000-05-16 | Hotrail, Inc. | Apparatus and method for a cache coherent shared memory multiprocessing system |
US6085293A (en) * | 1998-08-17 | 2000-07-04 | International Business Machines Corporation | Non-uniform memory access (NUMA) data processing system that decreases latency by expediting rerun requests |
US6546429B1 (en) * | 1998-09-21 | 2003-04-08 | International Business Machines Corporation | Non-uniform memory access (NUMA) data processing system that holds and reissues requests at a target processing node in response to a retry |
US6067603A (en) * | 1998-10-01 | 2000-05-23 | International Business Machines Corporation | Non-uniform memory access (NUMA) data processing system that speculatively issues requests on a node interconnect |
JP2000132531A (ja) | 1998-10-23 | 2000-05-12 | Pfu Ltd | マルチプロセッサ |
US6338122B1 (en) * | 1998-12-15 | 2002-01-08 | International Business Machines Corporation | Non-uniform memory access (NUMA) data processing system that speculatively forwards a read request to a remote processing node |
US6192452B1 (en) * | 1999-02-26 | 2001-02-20 | International Business Machines Corporation | Method and system for avoiding data loss due to cancelled transactions within a non-uniform memory access system |
US6591348B1 (en) * | 1999-09-09 | 2003-07-08 | International Business Machines Corporation | Method and system for resolution of transaction collisions to achieve global coherence in a distributed symmetric multiprocessor system |
US6505318B1 (en) * | 1999-10-01 | 2003-01-07 | Intel Corporation | Method and apparatus for partial error detection and correction of digital data |
-
1999
- 1999-12-09 JP JP34980999A patent/JP2001167077A/ja active Pending
-
2000
- 2000-12-08 US US09/731,773 patent/US7093078B2/en not_active Expired - Fee Related
- 2000-12-11 FR FR0016056A patent/FR2802318B1/fr not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2001167077A (ja) | 2001-06-22 |
US20010003839A1 (en) | 2001-06-14 |
US7093078B2 (en) | 2006-08-15 |
FR2802318A1 (fr) | 2001-06-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
FR2802318B1 (fr) | Procede d'acces a des donnees dans un systeme en reseau et systeme en reseau | |
FR2792740B1 (fr) | Procede et dispositif d'installation logicielle restaurable pour un systeme informatique | |
FR2846181B1 (fr) | Procede et dispositif de selection de donnees dans un reseau de communication | |
HK1042352A1 (zh) | 用於訪問在一個網絡上的信息的方法和系統 | |
DE69535013D1 (de) | Urheberrechtsdatenverwaltungssystem | |
DE69532153D1 (de) | Datenurheberrechtsverwaltungssystem | |
FR2848045B1 (fr) | Systeme de gestion d'un interface reseau et procede de ce dernier | |
FR2791189B1 (fr) | Dispositif de raccordement d'une infrastructure multitubulaire et procede d'acces a ce dispositif | |
GB9928964D0 (en) | Method and system for optimising a data carousel | |
FR2772491B1 (fr) | Systeme et procede pour simuler un dispositif de memorisation d'ordinateur | |
FR2842057B1 (fr) | Procede et dispositif de traitement de donnees dans un reseau de communication | |
FR2793046B1 (fr) | Systeme informatique et procede de demarrage de ce systeme | |
FR2812752B1 (fr) | Dispositif a memoire, systeme de memoire et procede pour acceder a des donnees en memoire | |
FR2802667B1 (fr) | Procede et dispositif de configuration de pare-feu dans un systeme informatique | |
FR2794545B1 (fr) | Systeme de radiologie a transmission de donnees et procede associe | |
FR2765983B1 (fr) | Signal de donnees de modification d'une scene graphique, procede et dispositif correspondants | |
FR2784489B1 (fr) | Procede d'affichage de donnees sur un afficheur matriciel | |
FR2796778B1 (fr) | Procede et dispositif de compression par bloc de donnees numeriques | |
FR2819323B1 (fr) | Procede d'acces a un systeme securise | |
FR2805626B1 (fr) | Procede et systeme d'octroi de privileges par un gestionnaire d'acces au sein d'un reseau de communication | |
FR2820846B1 (fr) | Dispositif et procede de gestion d'acces a un support d'enregistrement | |
FR2816781B1 (fr) | Procede et dispositif de securisation d'un portail dans un systeme informatique | |
IT1281734B1 (it) | Metodo per accesso multiplo in un sistema digitale di comunicazione | |
FR2762468B1 (fr) | Procede pour traiter des donnees dans un systeme cellulaire numerique | |
FR2847749B1 (fr) | Procede et dispositif de transmission de donnees d'informations dans un systeme de bus |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |
Effective date: 20081020 |