FR2766939B1 - Procede et appareil de simulation des caracteristiques de dispositifs a semi-conducteur - Google Patents

Procede et appareil de simulation des caracteristiques de dispositifs a semi-conducteur

Info

Publication number
FR2766939B1
FR2766939B1 FR9807986A FR9807986A FR2766939B1 FR 2766939 B1 FR2766939 B1 FR 2766939B1 FR 9807986 A FR9807986 A FR 9807986A FR 9807986 A FR9807986 A FR 9807986A FR 2766939 B1 FR2766939 B1 FR 2766939B1
Authority
FR
France
Prior art keywords
simulating
semiconductor devices
semiconductor
devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9807986A
Other languages
English (en)
Other versions
FR2766939A1 (fr
Inventor
Takaaki Tatsumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of FR2766939A1 publication Critical patent/FR2766939A1/fr
Application granted granted Critical
Publication of FR2766939B1 publication Critical patent/FR2766939B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
FR9807986A 1997-06-25 1998-06-24 Procede et appareil de simulation des caracteristiques de dispositifs a semi-conducteur Expired - Fee Related FR2766939B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9169104A JPH1116795A (ja) 1997-06-25 1997-06-25 半導体特性シミユレーシヨン装置及びその方法

Publications (2)

Publication Number Publication Date
FR2766939A1 FR2766939A1 (fr) 1999-02-05
FR2766939B1 true FR2766939B1 (fr) 2001-10-19

Family

ID=15880388

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9807986A Expired - Fee Related FR2766939B1 (fr) 1997-06-25 1998-06-24 Procede et appareil de simulation des caracteristiques de dispositifs a semi-conducteur

Country Status (4)

Country Link
US (1) US6321183B1 (fr)
JP (1) JPH1116795A (fr)
DE (1) DE19827935A1 (fr)
FR (1) FR2766939B1 (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6904578B2 (en) * 2002-11-13 2005-06-07 Fujitsu Limited System and method for verifying a plurality of states associated with a target circuit
JP2004273903A (ja) * 2003-03-11 2004-09-30 Renesas Technology Corp 回路シミュレータおよびシミュレーションシステム
US7823112B1 (en) 2003-05-30 2010-10-26 Golden Gate Technology, Inc. Method, software and system for ensuring timing between clocked components in a circuit
US7360193B1 (en) * 2004-09-21 2008-04-15 Golden Gate Technology, Inc. Method for circuit block placement and circuit block arrangement based on switching activity
US20060203581A1 (en) * 2005-03-10 2006-09-14 Joshi Rajiv V Efficient method and computer program for modeling and improving static memory performance across process variations and environmental conditions
US8275596B2 (en) * 2006-12-08 2012-09-25 Globalfoundries Inc. Method for robust statistical semiconductor device modeling

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0616475B2 (ja) * 1987-04-03 1994-03-02 三菱電機株式会社 物品の製造システム及び物品の製造方法
US5307296A (en) * 1989-11-17 1994-04-26 Mitsubishi Denki Kabushiki Kaisha Semiconductor workpiece topography prediction method
US5761481A (en) * 1995-05-04 1998-06-02 Advanced Micro Devices, Inc. Semiconductor simulator tool for experimental N-channel transistor modeling
JP2716009B2 (ja) * 1995-07-28 1998-02-18 日本電気株式会社 欠陥分布シミュレーション方法
US5719796A (en) 1995-12-04 1998-02-17 Advanced Micro Devices, Inc. System for monitoring and analyzing manufacturing processes using statistical simulation with single step feedback
JPH09171521A (ja) * 1995-12-20 1997-06-30 Sony Corp 半導体のシミュレーション方法及び装置

Also Published As

Publication number Publication date
US6321183B1 (en) 2001-11-20
FR2766939A1 (fr) 1999-02-05
JPH1116795A (ja) 1999-01-22
DE19827935A1 (de) 1999-01-07

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Legal Events

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