FR2750250B1 - Procede de protection d'une galette de circuits integres, et galette de circuits integres obtenue - Google Patents
Procede de protection d'une galette de circuits integres, et galette de circuits integres obtenueInfo
- Publication number
- FR2750250B1 FR2750250B1 FR9607680A FR9607680A FR2750250B1 FR 2750250 B1 FR2750250 B1 FR 2750250B1 FR 9607680 A FR9607680 A FR 9607680A FR 9607680 A FR9607680 A FR 9607680A FR 2750250 B1 FR2750250 B1 FR 2750250B1
- Authority
- FR
- France
- Prior art keywords
- wafer
- integrated circuits
- protecting
- circuits obtained
- integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9607680A FR2750250B1 (fr) | 1996-06-20 | 1996-06-20 | Procede de protection d'une galette de circuits integres, et galette de circuits integres obtenue |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9607680A FR2750250B1 (fr) | 1996-06-20 | 1996-06-20 | Procede de protection d'une galette de circuits integres, et galette de circuits integres obtenue |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2750250A1 FR2750250A1 (fr) | 1997-12-26 |
FR2750250B1 true FR2750250B1 (fr) | 1998-08-21 |
Family
ID=9493252
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR9607680A Expired - Fee Related FR2750250B1 (fr) | 1996-06-20 | 1996-06-20 | Procede de protection d'une galette de circuits integres, et galette de circuits integres obtenue |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR2750250B1 (fr) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2788375B1 (fr) * | 1999-01-11 | 2003-07-18 | Gemplus Card Int | Procede de protection de puce de circuit integre |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6461934A (en) * | 1987-09-02 | 1989-03-08 | Nippon Denso Co | Semiconductor device and manufacture thereof |
JP2597396B2 (ja) * | 1988-12-21 | 1997-04-02 | ローム株式会社 | シリコーンゴム膜のパターン形成方法 |
EP0511218B1 (fr) * | 1989-07-07 | 1997-03-12 | Irvine Sensors Corporation | Production d'unites de circuits electroniques contenant des couches empilees de circuits integres a reacheminement des conducteurs |
FR2671417B1 (fr) * | 1991-01-04 | 1995-03-24 | Solaic Sa | Procede pour la fabrication d'une carte a memoire et carte a memoire ainsi obtenue . |
JPH0567620A (ja) * | 1991-09-06 | 1993-03-19 | Tanaka Kikinzoku Kogyo Kk | バンプ形成方法 |
JPH05283488A (ja) * | 1992-03-30 | 1993-10-29 | Nec Corp | 半導体装置 |
-
1996
- 1996-06-20 FR FR9607680A patent/FR2750250B1/fr not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
FR2750250A1 (fr) | 1997-12-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |