FR2651923A1 - Power integrated circuit - Google Patents

Power integrated circuit Download PDF

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Publication number
FR2651923A1
FR2651923A1 FR8912057A FR8912057A FR2651923A1 FR 2651923 A1 FR2651923 A1 FR 2651923A1 FR 8912057 A FR8912057 A FR 8912057A FR 8912057 A FR8912057 A FR 8912057A FR 2651923 A1 FR2651923 A1 FR 2651923A1
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Prior art keywords
layer
fixed
strip
interconnection network
insulating material
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Granted
Application number
FR8912057A
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French (fr)
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FR2651923B1 (en
Inventor
Celnik Jean
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Automobiles Peugeot SA
Automobiles Citroen SA
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Automobiles Peugeot SA
Automobiles Citroen SA
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Priority to FR898912057A priority Critical patent/FR2651923B1/en
Publication of FR2651923A1 publication Critical patent/FR2651923A1/en
Application granted granted Critical
Publication of FR2651923B1 publication Critical patent/FR2651923B1/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985—Flexible insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Dispersion Chemistry (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

This power integrated circuit including a chip (8) of semiconductor material, linked by connecting wires (9) to an interconnection network, is characterised in that it includes a layer of conducting material (3) which is etched to form the interconnection network, onto which is fixed a layer of insulating material (4) having recesses (5, 6, 7) for exposing portions of the interconnection network, on which are fixed the chip (8) of semiconductor material and corresponding ends of the connecting wires (9), protective resin (10) being deposited on the chip of semiconductor material and the connecting wires. This circuit can be mounted on the surface of a substrate which is capable of dissipating the power.

Description

La présente invention concerne un circuit intégré de puissance comportant une pastille de matériau semi-conducteur reliée par des fils de raccordement à un réseau d'interconnexion. The present invention relates to an integrated power circuit comprising a chip of semiconductor material connected by connection wires to an interconnection network.

La réalisation de boitiers électroniques dans les nouvelles filières technologiques fait appel aux composants électroniques pour montage en surface également appelés CMS. Presque tous les composants passifs existent sous forme de microboitiers. The realization of electronic boxes in new technological fields uses electronic components for surface mounting also called CMS. Almost all passive components exist in the form of micro-housings.

Les microboitiers existent également pour les circuits intégrés. mais couvrent essentiellement le domaine du traitement du signal et il n'existe pratiquement aucun circuit intégré permettant de dissiper de la puissance. The micro-boxes also exist for integrated circuits. but essentially cover the field of signal processing and there is practically no integrated circuit for dissipating power.

En effet, dans les microboitiers du type mentionné précédemment. les pastilles de matériau semi-conducteur sont entièrement noyées dans du plastique, de sorte que la dissipation thermique et donc de puissance de ces microboitiers est relativement limitée. Indeed, in microbits of the type mentioned above. the pellets of semiconductor material are completely embedded in plastic, so that the heat dissipation and therefore of power of these micro-housings is relatively limited.

Or, dans certains domaines, comme le domaine automobile, il est absolument nécessaire de pouvoir dissiper de la puissance. However, in certain fields, such as the automobile field, it is absolutely necessary to be able to dissipate power.

Le but de l'invention est donc de proposer un circuit intégré de puissance, dont l'encombrement soit très faible mais qui puisse dissiper une puissance relativement élevée et dont la fabrication soit automatisable. donc réalisable à faible coût et de manière plus fiable que dans 1 état de la technique. The object of the invention is therefore to propose an integrated power circuit, the size of which is very small but which can dissipate a relatively high power and the manufacture of which can be automated. therefore achievable at low cost and more reliably than in the prior art.

A cet effet, l'invention a pour objet un circuit intégré de puissance comportant une pastille de matériau semi-conducteur reliée par des fils de raccordement â un réseau d'interconnexion, caractérisé en ce qu'il comporte une couche de matériau conducteur gravée pour former le réseau d'interconnexion, sur laquelle est fixée une couche de matériau isolant, présentant des évidements d'exposition de portions du réseau d'interconnexion, sur lesquelles sont fixées la pastille de matériau semi-conducteur et des extrémités correspondantes des fils de raccordement, de la résine de protection étant déposée sur la pastille de matériau semi-conducteur et les fils de raccordement. To this end, the subject of the invention is an integrated power circuit comprising a chip of semiconductor material connected by connection wires to an interconnection network, characterized in that it comprises a layer of conductive material etched to forming the interconnection network, on which is fixed a layer of insulating material, having exposure recesses of portions of the interconnection network, on which are fixed the wafer of semiconductor material and corresponding ends of the connection wires , protective resin being deposited on the wafer of semiconductor material and the connection wires.

Avantageusement, ce circuit intégré peut être fixé sur un substrat susceptible de dissiper de la puissance. par exemple un substrat de type SMI (substrat métallique isolé) et la pastille étant en contact de portions conductrices de chaleur formant dissipateur thermique, peut alors dissiper plus de puissance. Advantageously, this integrated circuit can be fixed on a substrate capable of dissipating power. for example an SMI type substrate (insulated metal substrate) and the pellet being in contact with heat conducting portions forming a heat sink, can then dissipate more power.

L'invention sera mieux comprise à l'aide de la description qui va suivre, donnée uniquement â titre d'exemple et faite en se référant aux dessins annexés, sur lesquels
- la Fig.1 représente une vue en coupe d'un circuit intégré selon l'invention fixé sur un substrat
SMI; et
- la Fig.2 représente une vue de dessus d'une bande de matériau isolant dans laquelle est prélevée la couche de matériau isolant entrant dans la constitution d un circuit intégré selon l'invention
Ainsi qu on peut le voir sur la Fig .1 , un circuit intégré de puissance 1 selon l'invention, peut constituer un composant électronique pour montage en surface (CMS) fixé sur un substrat 2 constitué par exemple par un substrat SMI (substrat métallique iso ie, décrit dans le document EP-A-0 159 208 aux noms des Demanderesses. Ce circuit intégré comporte une couche de matériau conducteur 3, constitué par exemple par du cuivre, sur laquelle est fixée une couche de matériau isolant 4 constituée par exemple par du
KAPTON.The invention will be better understood with the aid of the description which follows, given solely by way of example and made with reference to the appended drawings, in which
- Fig.1 shows a sectional view of an integrated circuit according to the invention fixed on a substrate
SMI; and
- Fig.2 shows a top view of a strip of insulating material from which is taken the layer of insulating material forming part of an integrated circuit according to the invention
As can be seen in Fig. 1, an integrated power circuit 1 according to the invention, can constitute an electronic component for surface mounting (CMS) fixed on a substrate 2 constituted for example by an SMI substrate (metal substrate iso ie, described in document EP-A-0 159 208 in the names of the Applicants This integrated circuit comprises a layer of conductive material 3, constituted for example by copper, on which is fixed a layer of insulating material 4 constituted for example by
KAPTON.

La couche de matériau conducteur 3 est gravée pour former un réseau d'interconnexion et la couche de matériau isolant 4 présente des évidements par exemple 5, 6 et 7, d'exposition de portions du réseau d'interconnexion, sur lesquelles sont fixées d'une part, une pastille de matériau semi-conducteur 8 constituée par exemple par une pastille de silicium et d'autre part, des extrémités correspondantes de fils, par exemple 9, de raccordement de la pastille de matériau semi-conducteur 8 au réseau d'interconnexion. The layer of conductive material 3 is etched to form an interconnection network and the layer of insulating material 4 has recesses, for example 5, 6 and 7, for exposing portions of the interconnection network, on which are fixed on the one hand, a wafer of semiconductor material 8 constituted for example by a wafer of silicon and on the other hand, corresponding ends of wires, for example 9, for connecting the wafer of semiconductor material 8 to the network of interconnection.

défini par la couche de matériau conducteur 3.defined by the layer of conductive material 3.

Avantageusement, de la résine de protection 10 est déposée sur la pastille de matériau semi-conducteur 8 et les fils de raccordement 9. Advantageously, protective resin 10 is deposited on the wafer of semiconductor material 8 and the connection wires 9.

Dans un mode de réalisation préféré, un anneau de matériau isolant 11 s'étend autour de la pastille 8 et des fils de raccordement 9 et délimite un logement pour la résine 10 afin de concentrer celle-ci autour de la pastille et des fils de raccordement. Cet anneau 11 est fixé sur la face de la couche de matériau isolant 4, opposée à celle sur laquelle est fixée la couche de matériau conducteur 3. In a preferred embodiment, a ring of insulating material 11 extends around the patch 8 and the connecting wires 9 and delimits a housing for the resin 10 in order to concentrate the latter around the patch and the connecting wires . This ring 11 is fixed to the face of the layer of insulating material 4, opposite to that on which the layer of conductive material 3 is fixed.

Ainsi qu on l'a mentionné précédemment, ce circuit intégré peut être par exemple soudé au niveau du plan P, sur une couche de matériau conducteur gravée correspondante du substrat SMI. As mentioned above, this integrated circuit can for example be soldered at the plane P, on a layer of correspondingly etched conductive material of the SMI substrate.

On conçoit donc que la pastille de matériau semi-conducteur 8 soudée par exemple sur la portion conductrice 12 du réseau d'interconnexion, elle-même en contact par l'intermédiaire de la soudure, avec une portion 13 de matériau conducteur du réseau d'inter connexion du substrat SMI. peut dissiper une puissance relativement importante dans la mesure ou ces portions de matériau conducteur forment dissipateur de chaleur. It is therefore understandable that the wafer of semiconductor material 8 welded for example on the conductive portion 12 of the interconnection network, itself in contact via the solder, with a portion 13 of conductive material of the network of interconnection of the SMI substrate. can dissipate a relatively large power since these portions of conductive material form a heat sink.

Ce circuit intégré peut être fabriqué de manière automatique, par exemple en utilisant les techniques de fabrication par bandes. This integrated circuit can be manufactured automatically, for example using strip manufacturing techniques.

Sur la Fig.2, on a représente une bande de matériau isolant 14 présentant deux portions latérales 14a, 14b s'étendant de part et d autre d'une portion centrale 14c. Les portions latérales présentent des trous d'indexation et d'entrainement 15, tandis que la portion centrale comporte des ébauches de découpe 16 permettant la séparation de portions de cette bande. In Fig.2, there is shown a strip of insulating material 14 having two lateral portions 14a, 14b extending on either side of a central portion 14c. The lateral portions have indexing and drive holes 15, while the central portion comprises cutting blanks 16 allowing the separation of portions of this strip.

Le procédé de fabrication du circuit intégré selon l'invention peut par exemple consister a' réaliser les évidements d'exposition mentionnés précédemment, dans la bande de matériau isolant et a' coller sur cette bande de matériau isolant, une bande de matériau conducteur, comme par exemple de cuivre, d une largeur inférieure a celle de la bande de matériau isolant. The method of manufacturing the integrated circuit according to the invention may for example consist in making the exposure recesses mentioned above, in the strip of insulating material and in sticking to this strip of insulating material, a strip of conductive material, as for example copper, with a width less than that of the strip of insulating material.

Après cette opération de collage, on réalise une gravure du matériau conducteur pour obtenir le réseau d'interconnexion mentionné précédemment et éventuellement, pour chaque portion de bande délimitée par les ébauches de découpe 16, on colle l'anneau de matériau isolant adapté pour s étendre autour de la pastille et des fils de raccordement pour délimiter le logement destiné a' la résine de protection de ces éléments. After this bonding operation, an etching of the conductive material is carried out in order to obtain the previously mentioned interconnection network and optionally, for each portion of strip delimited by the cutting blanks 16, the ring of insulating material suitable for spreading is glued. around the patch and the connecting wires to delimit the housing intended for the resin to protect these elements.

Après cette opération de collage, toujours pour chaque portion de bande, on dépose une préforme de soudure sur la portion de la couche de matériau conducteur adaptée pour recevoir la pastille de matériau semi-conducteur et on dispose cette pastille de matériau semi-conducteur sur cette portion. On chauffe alors l'ensemble de la bande dans un four de manière à assurer la fixation de chaque pastille sur la portion de bande de matériau conducteur correspondante. After this bonding operation, still for each strip portion, a solder preform is deposited on the portion of the layer of conductive material suitable for receiving the chip of semiconductor material and this patch of semiconductor material is placed on this portion. The entire strip is then heated in an oven so as to ensure the fixing of each patch on the portion of strip of corresponding conductive material.

On procède ensuite, pour chaque portion de bande, au câblage des fils de raccordement entre les plots correspondants de la pastille de silicium, comme cela est connu en soi, et la partie correspondante du réseau d'interconnexion grave. Next, for each portion of the strip, the connection wires are wired between the corresponding pads of the silicon wafer, as is known per se, and the corresponding part of the serious interconnection network.

Après cette opération de raccordement, on coule une quantité prédéterminée de résine autour de chaque pastille et on polymérise à chaud cette résine, par exemple par passage de la bande dans un four. After this connection operation, a predetermined quantity of resin is poured around each pellet and this resin is hot-polymerized, for example by passing the strip through an oven.

On obtient alors une bande de circuits intégrés. Cette bande est ensuite découpée suivant les ébauches pour obtenir des circuits intégrés unitaires tels que décrits précédemment. A strip of integrated circuits is then obtained. This strip is then cut according to the blanks to obtain unitary integrated circuits as described above.

Ainsi qu'on l'a mentionné précédemment. le circuit intégré selon l'invention peut être disposé sur un substrat SMI comme on aurait reporté un composant discret, par exemple par dépose d'une pâte à braser, le brasage étant obtenu en phase vapeur ou par infrarouge. As previously mentioned. the integrated circuit according to the invention can be placed on an SMI substrate as a discrete component would have been transferred, for example by depositing a solder paste, the soldering being obtained in the vapor phase or by infrared.

Il va de soi que toutes les opérations qui viennent d'être décrites peuvent être automatisées, la bande de matériau isolant défilant et des robots effectuant les différentes opérations décrites précédemment, de manière que le coût de fabrication d'un tel circuit soit le plus faible possible et que sa fiabilité soit la plus élevée possible. It goes without saying that all the operations which have just been described can be automated, the strip of insulating material moving past and robots carrying out the various operations described above, so that the manufacturing cost of such a circuit is the lowest. possible and that its reliability is as high as possible.

Bien entendu, d'autres modes de fabrication peuvent être envisagés.  Of course, other manufacturing methods can be envisaged.

On conçoit donc que dans le circuit intégré selon l'invention, la pastille de matériau semi-conducteur est associée à des moyens de dissipation thermique constitués par une portion de la bande de matériau conducteur pour augmenter sa capacité à supporter de la puissance.  It will therefore be understood that in the integrated circuit according to the invention, the chip of semiconductor material is associated with heat dissipation means constituted by a portion of the strip of conductive material to increase its capacity to withstand power.

Claims (6)

REVENDICATIONS 1. Circuit intégré de puissance comportant une pastille (8) de matériau semi-conducteur, reliée par des fils de raccordement (9) à un réseau d'interconnexion, caractérisé en ce qu'il comporte une couche de matériau conducteur (3) gravée pour former le réseau d'interconnexion, sur laquelle est fixée une couche de matériau isolant (4) présentant des évidements (5,6,7) d'exposition de portions du réseau d'interconnexion, sur lesquelles sont fixées la pastille (8) de matériau semi-conducteur et des extrémités correspondantes des fils de raccordement (9), de la résine (10) étant déposée sur la pastille de matériau semi-conducteur et les fils de raccordement, 1. Integrated power circuit comprising a chip (8) of semiconductor material, connected by connection wires (9) to an interconnection network, characterized in that it comprises a layer of conductive material (3) etched to form the interconnection network, on which is fixed a layer of insulating material (4) having recesses (5, 6, 7) for exposing portions of the interconnection network, on which the patch (8) is fixed of semiconductor material and of the corresponding ends of the connection wires (9), resin (10) being deposited on the chip of semiconductor material and the connection wires, 2.Circuit selon la revendication 1, carac térisé en ce qu'il comporte un anneau (11) de matériau isolant, fixé sur la face de la couche de matériau isolant (4), opposée à celle sur laquelle est fixée la couche de matériau conducteur (3), s'étendant autour de la pastille (8) et des fils de raccordement (9) et délimitant un logement pour la résine (10). 2. The circuit as claimed in claim 1, characterized in that it comprises a ring (11) of insulating material, fixed on the face of the layer of insulating material (4), opposite to that on which the layer of material is fixed. conductor (3), extending around the patch (8) and the connecting wires (9) and delimiting a housing for the resin (10). 3. Circuit selon la revendication 1 ou 2, caractérisé en ce que la pastille (8) et les extrémites correspondantes des fils (9) sont soudées sur la couche de matériau conducteur (3). 3. Circuit according to claim 1 or 2, characterized in that the patch (8) and the corresponding ends of the wires (9) are welded to the layer of conductive material (3). 4. Circuit selon l'une quelconque des revendications précédentes, caractérisé en ce qu'il est fixé sur la surface d'un substrat susceptible de dissiper de la puissance. 4. Circuit according to any one of the preceding claims, characterized in that it is fixed to the surface of a substrate capable of dissipating power. 5. Circuit selon la revendication 4, carac térisé en ce qu'il est fixé sur la surface d'un substrat de type SMI (Substrat Métallique Isolé). 5. The circuit of claim 4, charac terized in that it is fixed on the surface of a substrate of SMI type (Isolated Metal Substrate). 6. Circuit selon l'une quelconque des revendications précédentes, caractérisé en ce que la couche de matériau isolant est formée par une portion d'une bande (14) sur laquelle est réalisée une série de circuits, cette bande comportant des ébauches de découpe de manière que chaque circuit soit séparé de cette bande à la fin de la fabrication.  6. Circuit according to any one of the preceding claims, characterized in that the layer of insulating material is formed by a portion of a strip (14) on which a series of circuits is formed, this strip comprising blanks for cutting out so that each circuit is separated from this strip at the end of manufacturing.
FR898912057A 1989-09-14 1989-09-14 INTEGRATED POWER CIRCUIT. Expired - Fee Related FR2651923B1 (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0470559A1 (en) * 1990-08-07 1992-02-12 Siemens Aktiengesellschaft Method of mounting semiconductor integrated circuits
EP0554893A2 (en) * 1992-02-07 1993-08-11 Lsi Logic Corporation Partially-molded, PCB chip carrier package
EP0664562A1 (en) * 1994-01-12 1995-07-26 AT&T Corp. Ball grid array plastic package
US5557252A (en) * 1993-05-13 1996-09-17 Mitsubishi Denki Kabushiki Kaisha Thick film circuit board and method of manufacturing the same
US5831836A (en) * 1992-01-30 1998-11-03 Lsi Logic Power plane for semiconductor device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2003321A (en) * 1977-07-19 1979-03-07 Citizen Watch Co Ltd Integrated circuit package structures
JPS5769765A (en) * 1980-10-17 1982-04-28 Matsushita Electric Ind Co Ltd Sealed body of semiconductor device
EP0159208A1 (en) * 1984-02-28 1985-10-23 Automobiles Peugeot Method of manufacturing miniaturized electronic power circuits
EP0213974A1 (en) * 1985-06-14 1987-03-11 Sgs-Thomson Microelectronics S.A. Micromodule with embedded contacts and a card containing circuits comprising such a micromodule
WO1989004552A1 (en) * 1987-10-30 1989-05-18 Lsi Logic Corporation Method and means of fabricating a semiconductor device package

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2003321A (en) * 1977-07-19 1979-03-07 Citizen Watch Co Ltd Integrated circuit package structures
JPS5769765A (en) * 1980-10-17 1982-04-28 Matsushita Electric Ind Co Ltd Sealed body of semiconductor device
EP0159208A1 (en) * 1984-02-28 1985-10-23 Automobiles Peugeot Method of manufacturing miniaturized electronic power circuits
EP0213974A1 (en) * 1985-06-14 1987-03-11 Sgs-Thomson Microelectronics S.A. Micromodule with embedded contacts and a card containing circuits comprising such a micromodule
WO1989004552A1 (en) * 1987-10-30 1989-05-18 Lsi Logic Corporation Method and means of fabricating a semiconductor device package

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN, vol. 6, no. 147 (E-123), 6 août 1982; & JP-A-57 69 765 (MATSUSHITA ELECTRIC IND. CO., LTD) 24-04-1982 *

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0470559A1 (en) * 1990-08-07 1992-02-12 Siemens Aktiengesellschaft Method of mounting semiconductor integrated circuits
US5831836A (en) * 1992-01-30 1998-11-03 Lsi Logic Power plane for semiconductor device
EP0554893A2 (en) * 1992-02-07 1993-08-11 Lsi Logic Corporation Partially-molded, PCB chip carrier package
EP0554893A3 (en) * 1992-02-07 1994-03-23 Lsi Logic Corp
US5557252A (en) * 1993-05-13 1996-09-17 Mitsubishi Denki Kabushiki Kaisha Thick film circuit board and method of manufacturing the same
EP0664562A1 (en) * 1994-01-12 1995-07-26 AT&T Corp. Ball grid array plastic package
US5926696A (en) * 1994-01-12 1999-07-20 Lucent Technologies Inc. Ball grid array plastic package

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