FR2406307A1 - Passivated semiconductor devices - esp. mesa diodes, where edges of pn junctions are covered by film of silica - Google Patents

Passivated semiconductor devices - esp. mesa diodes, where edges of pn junctions are covered by film of silica

Info

Publication number
FR2406307A1
FR2406307A1 FR7731146A FR7731146A FR2406307A1 FR 2406307 A1 FR2406307 A1 FR 2406307A1 FR 7731146 A FR7731146 A FR 7731146A FR 7731146 A FR7731146 A FR 7731146A FR 2406307 A1 FR2406307 A1 FR 2406307A1
Authority
FR
France
Prior art keywords
esp
junctions
silica
edges
covered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7731146A
Other languages
French (fr)
Other versions
FR2406307B1 (en
Inventor
Bernard Roger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Radiotechnique Compelec RTC SA
Original Assignee
Radiotechnique Compelec RTC SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Radiotechnique Compelec RTC SA filed Critical Radiotechnique Compelec RTC SA
Priority to FR7731146A priority Critical patent/FR2406307A1/en
Publication of FR2406307A1 publication Critical patent/FR2406307A1/en
Application granted granted Critical
Publication of FR2406307B1 publication Critical patent/FR2406307B1/fr
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3171Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3178Coating or filling in grooves made in the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

Device is made from a semiconductor substrate which has an active surface and another surface on the opposite side of the substrate, which contains >=1 pn-junction in a plane parallel with the active surface. The substrate (partly) coated with a thin passivating layer; and >=1 metal contact is applied to the active surface. Passivating layer and at least the surface of the metal have a feeble or zero mutual adhesion; and the active surface has horizontal, vertical, and sloping zones. Used esp. in the mfr. of mesa devices, where the pn junction extend to the periphery of the mesa.
FR7731146A 1977-10-17 1977-10-17 Passivated semiconductor devices - esp. mesa diodes, where edges of pn junctions are covered by film of silica Granted FR2406307A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7731146A FR2406307A1 (en) 1977-10-17 1977-10-17 Passivated semiconductor devices - esp. mesa diodes, where edges of pn junctions are covered by film of silica

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7731146A FR2406307A1 (en) 1977-10-17 1977-10-17 Passivated semiconductor devices - esp. mesa diodes, where edges of pn junctions are covered by film of silica

Publications (2)

Publication Number Publication Date
FR2406307A1 true FR2406307A1 (en) 1979-05-11
FR2406307B1 FR2406307B1 (en) 1980-04-04

Family

ID=9196578

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7731146A Granted FR2406307A1 (en) 1977-10-17 1977-10-17 Passivated semiconductor devices - esp. mesa diodes, where edges of pn junctions are covered by film of silica

Country Status (1)

Country Link
FR (1) FR2406307A1 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2468207A1 (en) * 1979-10-23 1981-04-30 Thomson Csf Separation slot structure in semiconductors - has shallow V=shape esp. for mesa structures obtained by chemical attack or mechanical grinding
FR2487576A1 (en) * 1980-07-24 1982-01-29 Thomson Csf Glass passivated mesa diode mfr. - by forming semiconductor layers, forming furrows, depositing sipox, glass, and nickel then dicing
FR2676307A1 (en) * 1991-05-06 1992-11-13 Telefunken Electronic Gmbh METHOD FOR MANUFACTURING SEALED SEMICONDUCTOR COMPONENTS BY VITRIFICATION
EP3113219A1 (en) * 2015-06-30 2017-01-04 SEMIKRON Elektronik GmbH & Co. KG Semiconductor device and manufacturing method thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1506862A (en) * 1965-12-28 1967-12-22 Licentia Gmbh semiconductor element
DE1815783A1 (en) * 1967-12-29 1970-02-19 Varian Associates PIN diode and tilt generator equipped with it
FR2096470A1 (en) * 1970-06-24 1972-02-18 Licentia Gmbh
US3731159A (en) * 1971-05-19 1973-05-01 Anheuser Busch Microwave diode with low capacitance package

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1506862A (en) * 1965-12-28 1967-12-22 Licentia Gmbh semiconductor element
DE1815783A1 (en) * 1967-12-29 1970-02-19 Varian Associates PIN diode and tilt generator equipped with it
FR2096470A1 (en) * 1970-06-24 1972-02-18 Licentia Gmbh
US3731159A (en) * 1971-05-19 1973-05-01 Anheuser Busch Microwave diode with low capacitance package

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2468207A1 (en) * 1979-10-23 1981-04-30 Thomson Csf Separation slot structure in semiconductors - has shallow V=shape esp. for mesa structures obtained by chemical attack or mechanical grinding
FR2487576A1 (en) * 1980-07-24 1982-01-29 Thomson Csf Glass passivated mesa diode mfr. - by forming semiconductor layers, forming furrows, depositing sipox, glass, and nickel then dicing
FR2676307A1 (en) * 1991-05-06 1992-11-13 Telefunken Electronic Gmbh METHOD FOR MANUFACTURING SEALED SEMICONDUCTOR COMPONENTS BY VITRIFICATION
EP3113219A1 (en) * 2015-06-30 2017-01-04 SEMIKRON Elektronik GmbH & Co. KG Semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date
FR2406307B1 (en) 1980-04-04

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