FR2402995A1 - Dispositif d'interconnexion de micro-circuits - Google Patents

Dispositif d'interconnexion de micro-circuits

Info

Publication number
FR2402995A1
FR2402995A1 FR7727469A FR7727469A FR2402995A1 FR 2402995 A1 FR2402995 A1 FR 2402995A1 FR 7727469 A FR7727469 A FR 7727469A FR 7727469 A FR7727469 A FR 7727469A FR 2402995 A1 FR2402995 A1 FR 2402995A1
Authority
FR
France
Prior art keywords
circuits
micro
microcircuits
photo
networks
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7727469A
Other languages
English (en)
Other versions
FR2402995B1 (fr
Inventor
Claude Vergnolle
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thomson CSF SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson CSF SA filed Critical Thomson CSF SA
Priority to FR7727469A priority Critical patent/FR2402995A1/fr
Priority to DE19782839215 priority patent/DE2839215A1/de
Priority to GB7836298A priority patent/GB2004127B/en
Priority to JP11212878A priority patent/JPS5450871A/ja
Publication of FR2402995A1 publication Critical patent/FR2402995A1/fr
Application granted granted Critical
Publication of FR2402995B1 publication Critical patent/FR2402995B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • H01L23/047—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being parallel to the base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5387—Flexible insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
  • Led Device Packages (AREA)

Abstract

L'invention concerne les dispositifs permettant d'interconnecter des micro-circuits tels que des circuits intégrés logiques ou analogiques, des réseaux de résistances, et des réseaux de diodes photo-émissives ou photo-sensibles. Elle consiste à réaliser sur un film diélectrique le réseau de conducteurs destiné à l'interconnexion, à placer les micro-circuits dans des perforations réalisées dans le film, et à réunir ces micro-circuits aux conducteurs selon un procédé partiellement dérivé d'un procédé de transfert sur bande. Elle permet de réaliser des circuits intermédiaires entre les circuits hybrides et les circuits intégrés monolithiques.
FR7727469A 1977-09-12 1977-09-12 Dispositif d'interconnexion de micro-circuits Granted FR2402995A1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
FR7727469A FR2402995A1 (fr) 1977-09-12 1977-09-12 Dispositif d'interconnexion de micro-circuits
DE19782839215 DE2839215A1 (de) 1977-09-12 1978-09-08 Anordnung zum verbinden von mikroschaltungen
GB7836298A GB2004127B (en) 1977-09-12 1978-09-11 Device for interconnecting microcircuits
JP11212878A JPS5450871A (en) 1977-09-12 1978-09-12 Device for interconnecting microocircuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7727469A FR2402995A1 (fr) 1977-09-12 1977-09-12 Dispositif d'interconnexion de micro-circuits

Publications (2)

Publication Number Publication Date
FR2402995A1 true FR2402995A1 (fr) 1979-04-06
FR2402995B1 FR2402995B1 (fr) 1980-12-26

Family

ID=9195259

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7727469A Granted FR2402995A1 (fr) 1977-09-12 1977-09-12 Dispositif d'interconnexion de micro-circuits

Country Status (4)

Country Link
JP (1) JPS5450871A (fr)
DE (1) DE2839215A1 (fr)
FR (1) FR2402995A1 (fr)
GB (1) GB2004127B (fr)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0016522B1 (fr) * 1979-02-19 1982-12-22 Fujitsu Limited Dispositif semi-conducteur et procédé pour sa fabrication
EP0409290A3 (en) * 1984-02-21 1991-12-18 Mosaic Systems, Inc. Wafer scale package system and header and method of manufacture thereof
JPS6298737A (ja) * 1985-10-25 1987-05-08 Sharp Corp 半導体装置の交換方法
JPH01503663A (ja) * 1986-05-01 1989-12-07 ハネウエル・インコーポレーテツド 多重集積回路相互接続装置
WO1988002210A1 (fr) * 1986-09-15 1988-03-24 Baysage Pty. Ltd. Dispositif d'isolation electrique
GB2204184A (en) * 1987-04-29 1988-11-02 Stanley Bracey Mounting electronic components on substrates
US4933810A (en) * 1987-04-30 1990-06-12 Honeywell Inc. Integrated circuit interconnector
US4989317A (en) * 1988-11-21 1991-02-05 Hewlett-Packard Company Method for making tab circuit electrical connector supporting multiple components thereon
US4981817A (en) * 1988-12-29 1991-01-01 International Business Machines Corporation Tab method for implementing dynamic chip burn-in
US5164888A (en) * 1988-12-29 1992-11-17 International Business Machines Method and structure for implementing dynamic chip burn-in
WO1991000618A1 (fr) * 1989-07-03 1991-01-10 General Electric Company Systemes electroniques disposes dans un environnement soumis a des efforts importants
JP3985016B2 (ja) * 1997-10-31 2007-10-03 沖電気工業株式会社 半導体装置

Also Published As

Publication number Publication date
FR2402995B1 (fr) 1980-12-26
DE2839215A1 (de) 1979-03-22
GB2004127B (en) 1982-07-14
JPS5450871A (en) 1979-04-21
GB2004127A (en) 1979-03-21

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