FR1379319A - Automatic circuit for starting a memory for an asynchronous data processing system - Google Patents

Automatic circuit for starting a memory for an asynchronous data processing system

Info

Publication number
FR1379319A
FR1379319A FR958957A FR958957A FR1379319A FR 1379319 A FR1379319 A FR 1379319A FR 958957 A FR958957 A FR 958957A FR 958957 A FR958957 A FR 958957A FR 1379319 A FR1379319 A FR 1379319A
Authority
FR
France
Prior art keywords
starting
memory
data processing
processing system
asynchronous data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR958957A
Other languages
French (fr)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US248776A external-priority patent/US3247492A/en
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Priority to FR958957A priority Critical patent/FR1379319A/en
Application granted granted Critical
Publication of FR1379319A publication Critical patent/FR1379319A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G06F13/26—Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
FR958957A 1962-12-31 1963-12-31 Automatic circuit for starting a memory for an asynchronous data processing system Expired FR1379319A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR958957A FR1379319A (en) 1962-12-31 1963-12-31 Automatic circuit for starting a memory for an asynchronous data processing system

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US248776A US3247492A (en) 1962-12-31 1962-12-31 Automatic memory start circuit for asynchronous data processing system
FR958957A FR1379319A (en) 1962-12-31 1963-12-31 Automatic circuit for starting a memory for an asynchronous data processing system

Publications (1)

Publication Number Publication Date
FR1379319A true FR1379319A (en) 1964-11-20

Family

ID=26205145

Family Applications (1)

Application Number Title Priority Date Filing Date
FR958957A Expired FR1379319A (en) 1962-12-31 1963-12-31 Automatic circuit for starting a memory for an asynchronous data processing system

Country Status (1)

Country Link
FR (1) FR1379319A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0141302A2 (en) * 1983-10-25 1985-05-15 BULL HN INFORMATION SYSTEMS ITALIA S.p.A. Data processing system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0141302A2 (en) * 1983-10-25 1985-05-15 BULL HN INFORMATION SYSTEMS ITALIA S.p.A. Data processing system
EP0141302A3 (en) * 1983-10-25 1986-05-21 Honeywell Information Systems Italia S.P.A. Data processing systems architecture
US4665483A (en) * 1983-10-25 1987-05-12 Honeywell Information Systems Italia Data processing system architecture

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