FR1487553A - Data processing system - Google Patents
Data processing systemInfo
- Publication number
- FR1487553A FR1487553A FR7936A FR06007936A FR1487553A FR 1487553 A FR1487553 A FR 1487553A FR 7936 A FR7936 A FR 7936A FR 06007936 A FR06007936 A FR 06007936A FR 1487553 A FR1487553 A FR 1487553A
- Authority
- FR
- France
- Prior art keywords
- data processing
- processing system
- data
- processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Debugging And Monitoring (AREA)
- Communication Control (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB3023665A GB1048525A (en) | 1965-07-16 | 1965-07-16 | Data processing system |
Publications (1)
Publication Number | Publication Date |
---|---|
FR1487553A true FR1487553A (en) | 1967-07-07 |
Family
ID=10304446
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7936A Expired FR1487553A (en) | 1965-07-16 | 1966-07-05 | Data processing system |
Country Status (3)
Country | Link |
---|---|
DE (1) | DE1524164B2 (en) |
FR (1) | FR1487553A (en) |
GB (1) | GB1048525A (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20210155228A (en) * | 2020-06-15 | 2021-12-22 | 에스케이하이닉스 주식회사 | Memory device and method for operating the same |
-
1965
- 1965-07-16 GB GB3023665A patent/GB1048525A/en not_active Expired
-
1966
- 1966-07-05 FR FR7936A patent/FR1487553A/en not_active Expired
- 1966-07-16 DE DE19661524164 patent/DE1524164B2/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
DE1524164A1 (en) | 1970-01-29 |
DE1524164B2 (en) | 1972-03-02 |
GB1048525A (en) | 1966-11-16 |
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