FI98572B - Reliable three-computer multi-computer system - Google Patents

Reliable three-computer multi-computer system

Info

Publication number
FI98572B
FI98572B FI930291A FI930291A FI98572B FI 98572 B FI98572 B FI 98572B FI 930291 A FI930291 A FI 930291A FI 930291 A FI930291 A FI 930291A FI 98572 B FI98572 B FI 98572B
Authority
FI
Finland
Prior art keywords
computer
mca
allocated
mcb
mcc
Prior art date
Application number
FI930291A
Other languages
Finnish (fi)
Swedish (sv)
Other versions
FI930291A (en
FI930291A0 (en
FI98572C (en
Inventor
Michael Gronemeyer
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of FI930291A publication Critical patent/FI930291A/en
Publication of FI930291A0 publication Critical patent/FI930291A0/en
Publication of FI98572B publication Critical patent/FI98572B/en
Application granted granted Critical
Publication of FI98572C publication Critical patent/FI98572C/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/181—Eliminating the failing redundant component
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/183—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components
    • G06F11/184—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components where the redundant components implement processing functionality
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0796—Safety measures, i.e. ensuring safe condition in the event of error, e.g. for controlling element
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/187—Voting techniques

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
  • Debugging And Monitoring (AREA)

Abstract

To each computer (MCA, MCB, MCC) are allocated two hardware comparators (VAR, VAL; VBR, VBL; VCR, VCL) to compare the data from itself with the corresponding data from the partner computers. Only if both comparators (VAR, VAL) allocated to a computer (MCA) detect differences between the data fed to it (DA and DB or DC) is the computer shut down via an AND element (UA). The comparison processes are initialised not only by the computer (MCA) allocated to the comparators (VAR, VAL) but also by a partner computer (MCB or MCC). It is thus made certain that in the event of a breakdown the comparison processes for recognising and shutting down a defective computer actually take place and are not sabotaged by the defective computer. The result of the shutdown (ASSA) of a computer (e.g. MCA) is controlled by the operative computers (MCB, MCC), triggered by the interrupt from an allocated error store (FAL, FAR). If the defective computer is not shut down, the operative computers cause the shutdown themselves (total shutdown). The safe multi-computer system is especially intended for use in railway signal systems.
FI930291A 1990-08-14 1993-01-25 Reliable three-computer multi-computer system FI98572C (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
EP90115585 1990-08-14
EP90115585 1990-08-14
PCT/EP1991/001022 WO1992003787A1 (en) 1990-08-14 1991-06-03 Highly safe multi-computer system with three computers
EP9101022 1991-06-03

Publications (4)

Publication Number Publication Date
FI930291A FI930291A (en) 1993-01-25
FI930291A0 FI930291A0 (en) 1993-01-25
FI98572B true FI98572B (en) 1997-03-27
FI98572C FI98572C (en) 1997-07-10

Family

ID=8204331

Family Applications (1)

Application Number Title Priority Date Filing Date
FI930291A FI98572C (en) 1990-08-14 1993-01-25 Reliable three-computer multi-computer system

Country Status (7)

Country Link
EP (1) EP0543820B1 (en)
AT (1) ATE110477T1 (en)
DE (1) DE59102664D1 (en)
DK (1) DK0543820T3 (en)
ES (1) ES2060389T3 (en)
FI (1) FI98572C (en)
WO (1) WO1992003787A1 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0760395B2 (en) * 1992-11-06 1995-06-28 日本電気株式会社 Fault tolerant computer system
TW320701B (en) * 1996-05-16 1997-11-21 Resilience Corp
US6141769A (en) 1996-05-16 2000-10-31 Resilience Corporation Triple modular redundant computer system and associated method
DE19740136A1 (en) * 1997-09-12 1999-03-18 Alsthom Cge Alcatel Process for isolating a defective computer in a fault-tolerant multi-computer system
DE10036598A1 (en) * 2000-07-27 2002-02-14 Infineon Technologies Ag Arrangement for monitoring the correct operation of components of an electrical system which carry out the same or corresponding actions
DE10053023C1 (en) * 2000-10-13 2002-09-05 Siemens Ag Method for controlling a safety-critical railway operating process and device for carrying out this method
DE10055424A1 (en) * 2000-11-09 2002-05-29 Alcatel Sa Method for storing a security key and multi-computer system for carrying out the method
JP4102306B2 (en) * 2001-11-22 2008-06-18 シーメンス アクチエンゲゼルシヤフト Method for controlling railway operation process requiring safety and apparatus for carrying out this method
US7209811B1 (en) 2001-11-22 2007-04-24 Siemens Aktiengesellschaft System and method for controlling a safety-critical railroad operating process
EP2835759B1 (en) 2013-08-08 2019-03-27 GbR Oliver Oechsle, Dr. Hans-Peter Dietz Method and system for managing a defective electronic user terminal

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3720879A1 (en) * 1987-06-24 1989-01-05 Siemens Ag Device for error-tolerant input/output of data

Also Published As

Publication number Publication date
FI930291A (en) 1993-01-25
ES2060389T3 (en) 1994-11-16
FI930291A0 (en) 1993-01-25
ATE110477T1 (en) 1994-09-15
EP0543820B1 (en) 1994-08-24
DE59102664D1 (en) 1994-09-29
FI98572C (en) 1997-07-10
DK0543820T3 (en) 1995-03-20
EP0543820A1 (en) 1993-06-02
WO1992003787A1 (en) 1992-03-05

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Legal Events

Date Code Title Description
BB Publication of examined application
MM Patent lapsed