ES2103710T3 - Procedimiento de realizacion de un modulo electronico y modulo electronico que se obtiene por dicho procedimiento. - Google Patents
Procedimiento de realizacion de un modulo electronico y modulo electronico que se obtiene por dicho procedimiento.Info
- Publication number
- ES2103710T3 ES2103710T3 ES89403236T ES89403236T ES2103710T3 ES 2103710 T3 ES2103710 T3 ES 2103710T3 ES 89403236 T ES89403236 T ES 89403236T ES 89403236 T ES89403236 T ES 89403236T ES 2103710 T3 ES2103710 T3 ES 2103710T3
- Authority
- ES
- Spain
- Prior art keywords
- electronic module
- procedure
- cavity
- chip
- realization
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 abstract 2
- 238000010276 construction Methods 0.000 abstract 1
- 238000002347 injection Methods 0.000 abstract 1
- 239000007924 injection Substances 0.000 abstract 1
- 239000011810 insulating material Substances 0.000 abstract 1
- 238000000465 moulding Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49121—Beam lead frame or beam lead device
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Theoretical Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Credit Cards Or The Like (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
EL INVENTO SE REFIERE A LA REALIZACION DE UN MODULO ELECTRONICO PARA TARJETA DE MEMORIA. EL INVENTO CONSISTE EN, A PARTIR DE UN ARMAZON-BASE QUE DEFINE LAS ZONAS DE CONTACTO EXTERNAS (24) Y LAS ZONAS DE CONEXION ELECTRICA (26), MOLDEAR SOBRE EL ARMAZON-BASE POR INYECCION UNA PIEZA MOLDEADA (39 Y 40) QUE DEFINE UNA CAVIDAD (41) PARA LA PASTILLA SEMI-CONDUCTORA DEL MODULO ELECTRONICO, EN FIJAR LA PASTILLA SEMI-CONDUCTORA (35) EN ESTA CAVIDAD, EN ENLAZAR ELECTRICAMENTE LAS BORNAS (37) DEL CHIP (35) CON LAS ZONAS DE CONEXION ELECTRICA Y EN RECUBRIR EL CHIP LLENANDO LA CAVIDAD (41) CON UN MATERIAL AISLANTE (42).
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8815553A FR2639763B1 (fr) | 1988-11-29 | 1988-11-29 | Procede de realisation d'un module electronique et module electronique tel qu'obtenu par ce procede |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2103710T3 true ES2103710T3 (es) | 1997-10-01 |
Family
ID=9372343
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES89403236T Expired - Lifetime ES2103710T3 (es) | 1988-11-29 | 1989-11-23 | Procedimiento de realizacion de un modulo electronico y modulo electronico que se obtiene por dicho procedimiento. |
Country Status (7)
Country | Link |
---|---|
US (1) | US5057460A (es) |
EP (1) | EP0371855B1 (es) |
JP (1) | JP2795937B2 (es) |
AT (1) | ATE154164T1 (es) |
DE (1) | DE68928095T2 (es) |
ES (1) | ES2103710T3 (es) |
FR (1) | FR2639763B1 (es) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2650530B1 (fr) * | 1989-08-07 | 1991-11-29 | Schlumberger Ind Sa | Procede de realisation de corps de carte avec graphisme |
JP2874279B2 (ja) * | 1990-05-10 | 1999-03-24 | 三菱電機株式会社 | 薄型半導体装置の製造方法 |
FR2668096B1 (fr) * | 1990-10-19 | 1993-01-22 | Schlumberger Ind Sa | Procede de fabrication de carte a memoire apte a recevoir une image photographique et carte ainsi obtenue. |
US5255430A (en) * | 1992-10-08 | 1993-10-26 | Atmel Corporation | Method of assembling a module for a smart card |
US6828668B2 (en) * | 1994-07-07 | 2004-12-07 | Tessera, Inc. | Flexible lead structures and methods of making same |
US5830782A (en) * | 1994-07-07 | 1998-11-03 | Tessera, Inc. | Microelectronic element bonding with deformation of leads in rows |
US6429112B1 (en) | 1994-07-07 | 2002-08-06 | Tessera, Inc. | Multi-layer substrates and fabrication processes |
US5688716A (en) | 1994-07-07 | 1997-11-18 | Tessera, Inc. | Fan-out semiconductor chip assembly |
US5518964A (en) * | 1994-07-07 | 1996-05-21 | Tessera, Inc. | Microelectronic mounting with multiple lead deformation and bonding |
US5798286A (en) * | 1995-09-22 | 1998-08-25 | Tessera, Inc. | Connecting multiple microelectronic elements with lead deformation |
US6117694A (en) * | 1994-07-07 | 2000-09-12 | Tessera, Inc. | Flexible lead structures and methods of making same |
DE4443767A1 (de) * | 1994-12-08 | 1996-06-13 | Giesecke & Devrient Gmbh | Elektronisches Modul und Datenträger mit elektrischem Modul |
FR2738077B1 (fr) * | 1995-08-23 | 1997-09-19 | Schlumberger Ind Sa | Micro-boitier electronique pour carte a memoire electronique et procede de realisation |
DE19535989C3 (de) * | 1995-09-27 | 2003-03-27 | Siemens Ag | Chipmodul |
US6072698A (en) * | 1995-09-27 | 2000-06-06 | Siemens Aktiengesellschaft | Chip module with heat insulation for incorporation into a chip card |
US5972738A (en) * | 1997-05-07 | 1999-10-26 | Lsi Logic Corporation | PBGA stiffener package |
DE69937936T2 (de) * | 1998-03-27 | 2009-01-08 | Nxp B.V. | Datenträger mit einem auf leiterrahmen basierten modul mit doppelseitiger chip-abdeckung |
WO1999050792A1 (en) * | 1998-03-27 | 1999-10-07 | Koninklijke Philips Electronics N.V. | Data carrier having an implanted module based on a metal lead frame |
FR2781068B1 (fr) * | 1998-07-07 | 2000-10-13 | Rue Cartes Et Systemes De | Procede de fabrication d'une carte a microcircuit permettant de limiter les contraintes mecaniques transmises a celui-ci et carte ainsi obtenue |
ES2312310T3 (es) * | 2000-02-02 | 2009-03-01 | Infineon Technologies Ag | Tarjeta chip con puntos de flexion predefinidos. |
FR2817374B1 (fr) * | 2000-11-28 | 2003-02-21 | Schlumberger Systems & Service | Support electronique d'informations |
DE10101280A1 (de) * | 2001-01-12 | 2002-07-25 | Infineon Technologies Ag | Chipträger für Chipmodul |
US7030316B2 (en) * | 2004-01-30 | 2006-04-18 | Piranha Plastics | Insert molding electronic devices |
JP2007188489A (ja) * | 2005-12-21 | 2007-07-26 | Infineon Technologies Ag | スマートカードモジュール |
US7440285B2 (en) | 2006-12-29 | 2008-10-21 | Piranha Plastics, Llc | Electronic device housing |
US8649820B2 (en) | 2011-11-07 | 2014-02-11 | Blackberry Limited | Universal integrated circuit card apparatus and related methods |
US8936199B2 (en) | 2012-04-13 | 2015-01-20 | Blackberry Limited | UICC apparatus and related methods |
USD703208S1 (en) | 2012-04-13 | 2014-04-22 | Blackberry Limited | UICC apparatus |
USD701864S1 (en) | 2012-04-23 | 2014-04-01 | Blackberry Limited | UICC apparatus |
JP6451117B2 (ja) * | 2014-04-01 | 2019-01-16 | 富士電機株式会社 | 半導体装置の製造方法および半導体装置 |
US20240220760A1 (en) * | 2021-07-15 | 2024-07-04 | Linxens Holding | Lead-frame, card body of a smart card, smart card, and method of forming a smart card |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4152624A (en) * | 1978-03-16 | 1979-05-01 | Monsanto Company | Molded LED indicator |
US4501960A (en) * | 1981-06-22 | 1985-02-26 | Motorola, Inc. | Micropackage for identification card |
FR2520541A1 (fr) * | 1982-01-22 | 1983-07-29 | Flonic Sa | Procede d'insertion d'un circuit integre dans une carte a memoire et carte obtenue suivant ce procede |
JPS5917274A (ja) * | 1982-07-21 | 1984-01-28 | Hitachi Ltd | 半導体装置およびその製造方法 |
FR2579798B1 (fr) * | 1985-04-02 | 1990-09-28 | Ebauchesfabrik Eta Ag | Procede de fabrication de modules electroniques pour cartes a microcircuits et modules obtenus selon ce procede |
US4701999A (en) * | 1985-12-17 | 1987-10-27 | Pnc, Inc. | Method of making sealed housings containing delicate structures |
-
1988
- 1988-11-29 FR FR8815553A patent/FR2639763B1/fr not_active Expired - Lifetime
-
1989
- 1989-11-23 EP EP89403236A patent/EP0371855B1/fr not_active Expired - Lifetime
- 1989-11-23 ES ES89403236T patent/ES2103710T3/es not_active Expired - Lifetime
- 1989-11-23 AT AT89403236T patent/ATE154164T1/de not_active IP Right Cessation
- 1989-11-23 DE DE68928095T patent/DE68928095T2/de not_active Expired - Fee Related
- 1989-11-27 US US07/441,587 patent/US5057460A/en not_active Expired - Lifetime
- 1989-11-29 JP JP1310478A patent/JP2795937B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2795937B2 (ja) | 1998-09-10 |
JPH0316144A (ja) | 1991-01-24 |
EP0371855A1 (fr) | 1990-06-06 |
EP0371855B1 (fr) | 1997-06-04 |
DE68928095D1 (de) | 1997-07-10 |
FR2639763A1 (fr) | 1990-06-01 |
DE68928095T2 (de) | 1997-11-20 |
ATE154164T1 (de) | 1997-06-15 |
US5057460A (en) | 1991-10-15 |
FR2639763B1 (fr) | 1992-12-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FG2A | Definitive protection |
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