EP4059047A4 - APPARATUS AND METHOD FOR MINIMIZING UNDERCURVING DURING A UBM ETCHING PROCESS - Google Patents

APPARATUS AND METHOD FOR MINIMIZING UNDERCURVING DURING A UBM ETCHING PROCESS Download PDF

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Publication number
EP4059047A4
EP4059047A4 EP20887509.6A EP20887509A EP4059047A4 EP 4059047 A4 EP4059047 A4 EP 4059047A4 EP 20887509 A EP20887509 A EP 20887509A EP 4059047 A4 EP4059047 A4 EP 4059047A4
Authority
EP
European Patent Office
Prior art keywords
minimization
etch process
undercut during
ubm
ubm etch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP20887509.6A
Other languages
German (de)
English (en)
French (fr)
Other versions
EP4059047A1 (en
Inventor
John Taddei
David A. Goldberg
Elena Lawrence
Ian COCHRAN
Christopher ORLANDO
James Swallow
William Gilbert Breingan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Veeco Instruments Inc
Original Assignee
Veeco Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US16/685,640 external-priority patent/US11069583B2/en
Application filed by Veeco Instruments Inc filed Critical Veeco Instruments Inc
Publication of EP4059047A1 publication Critical patent/EP4059047A1/en
Publication of EP4059047A4 publication Critical patent/EP4059047A4/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67028Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like
    • H01L21/6704Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for wet cleaning or washing
    • H01L21/67051Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for wet cleaning or washing using mainly spraying means, e.g. nozzles
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67253Process monitoring, e.g. flow or thickness monitoring
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/26Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32134Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Weting (AREA)
EP20887509.6A 2019-11-15 2020-11-02 APPARATUS AND METHOD FOR MINIMIZING UNDERCURVING DURING A UBM ETCHING PROCESS Pending EP4059047A4 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US16/685,640 US11069583B2 (en) 2018-06-20 2019-11-15 Apparatus and method for the minimization of undercut during a UBM etch process
PCT/US2020/058479 WO2021096712A1 (en) 2019-11-15 2020-11-02 An apparatus and method for the minimization of undercut during a ubm etch process

Publications (2)

Publication Number Publication Date
EP4059047A1 EP4059047A1 (en) 2022-09-21
EP4059047A4 true EP4059047A4 (en) 2024-01-03

Family

ID=75912522

Family Applications (1)

Application Number Title Priority Date Filing Date
EP20887509.6A Pending EP4059047A4 (en) 2019-11-15 2020-11-02 APPARATUS AND METHOD FOR MINIMIZING UNDERCURVING DURING A UBM ETCHING PROCESS

Country Status (3)

Country Link
EP (1) EP4059047A4 (zh)
TW (1) TW202135187A (zh)
WO (1) WO2021096712A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2023113088A (ja) * 2022-02-02 2023-08-15 オムロン株式会社 ずれ量の測定方法、及び測定装置、及びプログラム

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040208359A1 (en) * 2001-11-07 2004-10-21 Davar Pishva Image highlight correction using illumination specific hsv color coordinate
US20090046922A1 (en) * 2005-07-04 2009-02-19 Toru Yoshikawa Surface Inspecting Apparatus
US20120114220A1 (en) * 2010-11-05 2012-05-10 Hseb Dresden Gmbh Inspection method
US20140242731A1 (en) * 2013-02-28 2014-08-28 Solid State Equipment Llc System and method for performing a wet etching process
US20180061032A1 (en) * 2016-08-26 2018-03-01 Applied Materials, Inc. Thickness measurement of substrate using color metrology

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040208359A1 (en) * 2001-11-07 2004-10-21 Davar Pishva Image highlight correction using illumination specific hsv color coordinate
US20090046922A1 (en) * 2005-07-04 2009-02-19 Toru Yoshikawa Surface Inspecting Apparatus
US20120114220A1 (en) * 2010-11-05 2012-05-10 Hseb Dresden Gmbh Inspection method
US20140242731A1 (en) * 2013-02-28 2014-08-28 Solid State Equipment Llc System and method for performing a wet etching process
US20180061032A1 (en) * 2016-08-26 2018-03-01 Applied Materials, Inc. Thickness measurement of substrate using color metrology

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
CHALUPA ADAM ET AL: "Using High-Speed Video Analysis for Defect Investigation and Process Improvement", 2019 30TH ANNUAL SEMI ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE (ASMC), IEEE, 6 May 2019 (2019-05-06), pages 1 - 4, XP033592203, DOI: 10.1109/ASMC.2019.8791795 *
See also references of WO2021096712A1 *

Also Published As

Publication number Publication date
TW202135187A (zh) 2021-09-16
EP4059047A1 (en) 2022-09-21
WO2021096712A1 (en) 2021-05-20

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