EP3688799A4 - Group iii-v semiconductor fuses and their methods of fabrication - Google Patents
Group iii-v semiconductor fuses and their methods of fabrication Download PDFInfo
- Publication number
- EP3688799A4 EP3688799A4 EP17926938.6A EP17926938A EP3688799A4 EP 3688799 A4 EP3688799 A4 EP 3688799A4 EP 17926938 A EP17926938 A EP 17926938A EP 3688799 A4 EP3688799 A4 EP 3688799A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- fabrication
- methods
- group iii
- semiconductor fuses
- fuses
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5252—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/62—Protection against overvoltage, e.g. fuses, shunts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/US2017/054185 WO2019066879A1 (en) | 2017-09-28 | 2017-09-28 | Group iii-v semiconductor fuses and their methods of fabrication |
Publications (2)
Publication Number | Publication Date |
---|---|
EP3688799A1 EP3688799A1 (en) | 2020-08-05 |
EP3688799A4 true EP3688799A4 (en) | 2021-05-05 |
Family
ID=65903214
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP17926938.6A Withdrawn EP3688799A4 (en) | 2017-09-28 | 2017-09-28 | Group iii-v semiconductor fuses and their methods of fabrication |
Country Status (3)
Country | Link |
---|---|
US (1) | US11107764B2 (en) |
EP (1) | EP3688799A4 (en) |
WO (1) | WO2019066879A1 (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11437504B2 (en) * | 2017-09-29 | 2022-09-06 | Intel Corporation | Complementary group III-nitride transistors with complementary polarization junctions |
US11295992B2 (en) | 2017-09-29 | 2022-04-05 | Intel Corporation | Tunnel polarization junction III-N transistors |
US11355652B2 (en) | 2017-09-29 | 2022-06-07 | Intel Corporation | Group III-nitride polarization junction diodes |
WO2019066921A1 (en) | 2017-09-29 | 2019-04-04 | Intel Corporation | Group iii-nitride light emitting devices including a polarization junction |
US11139043B2 (en) * | 2019-05-20 | 2021-10-05 | Board Of Trustees Of The University Of Alabama, For And On Behalf Of The University Of Alabama In Huntsville | Systems and methods for identifying counterfeit memory |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080237786A1 (en) * | 2007-03-29 | 2008-10-02 | International Business Machines Corporation | Non-planar fuse structure including angular bend and method for fabrication thereof |
US20090051002A1 (en) * | 2007-08-22 | 2009-02-26 | International Business Machines Corporation | Electrical fuse having a thin fuselink |
US20090108396A1 (en) * | 2007-10-26 | 2009-04-30 | International Business Machines Corporation | Electrical fuse having a fully silicided fuselink and enhanced flux divergence |
US20100025819A1 (en) * | 2008-08-04 | 2010-02-04 | International Business Machines Corporation | Programmable precision resistor and method of programming the same |
WO2015122877A1 (en) * | 2014-02-11 | 2015-08-20 | Intel Corporation | Embedded fuse with conductor backfill |
US20160049367A1 (en) * | 2014-08-15 | 2016-02-18 | United Microelectronics Corp. | Integrated circuit structure including fuse and method thereof |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1056066A (en) * | 1996-08-08 | 1998-02-24 | Matsushita Electron Corp | Anti-fuse device and manufacture thereof |
KR101354585B1 (en) | 2007-08-07 | 2014-01-22 | 삼성전자주식회사 | Semiconductor Device And Method Of Forming The Same |
KR101037452B1 (en) * | 2008-10-22 | 2011-05-26 | 주식회사 하이닉스반도체 | Fuse in the semiconductor device and method for fabricating the same |
DE102010003555B4 (en) * | 2010-03-31 | 2019-12-24 | Globalfoundries Dresden Module One Llc & Co. Kg | Aluminum fuses in a semiconductor device that has metal gate electrode structures |
JP2013157468A (en) | 2012-01-30 | 2013-08-15 | Asahi Kasei Electronics Co Ltd | Method for manufacturing semiconductor device |
US9589971B1 (en) * | 2016-09-12 | 2017-03-07 | Vanguard International Semiconductor Corporation | Anti-fuse one-time programmable memory cell and anti-fuse one-time programmable memory array |
US9799601B1 (en) * | 2017-02-06 | 2017-10-24 | Vanguard International Semiconductor Corporation | Fuse elements and methods for forming the same |
-
2017
- 2017-09-28 WO PCT/US2017/054185 patent/WO2019066879A1/en unknown
- 2017-09-28 EP EP17926938.6A patent/EP3688799A4/en not_active Withdrawn
- 2017-09-28 US US16/629,936 patent/US11107764B2/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080237786A1 (en) * | 2007-03-29 | 2008-10-02 | International Business Machines Corporation | Non-planar fuse structure including angular bend and method for fabrication thereof |
US20090051002A1 (en) * | 2007-08-22 | 2009-02-26 | International Business Machines Corporation | Electrical fuse having a thin fuselink |
US20090108396A1 (en) * | 2007-10-26 | 2009-04-30 | International Business Machines Corporation | Electrical fuse having a fully silicided fuselink and enhanced flux divergence |
US20100025819A1 (en) * | 2008-08-04 | 2010-02-04 | International Business Machines Corporation | Programmable precision resistor and method of programming the same |
WO2015122877A1 (en) * | 2014-02-11 | 2015-08-20 | Intel Corporation | Embedded fuse with conductor backfill |
US20160049367A1 (en) * | 2014-08-15 | 2016-02-18 | United Microelectronics Corp. | Integrated circuit structure including fuse and method thereof |
Non-Patent Citations (1)
Title |
---|
See also references of WO2019066879A1 * |
Also Published As
Publication number | Publication date |
---|---|
US20200357742A1 (en) | 2020-11-12 |
WO2019066879A1 (en) | 2019-04-04 |
US11107764B2 (en) | 2021-08-31 |
EP3688799A1 (en) | 2020-08-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP3257085A4 (en) | High voltage semiconductor devices and methods of making the devices | |
EP3345215A4 (en) | Semiconductor apparatus and method of manufacturing the same | |
TWI801248B (en) | Integrated circuit devices and methods of fabricating such devices | |
EP3655361A4 (en) | Package comprising an ion-trap and method of fabrication | |
SG10201913388VA (en) | Semiconductor package and method of forming the same | |
EP3385353A4 (en) | Composition for etching and method for manufacturing semiconductor device using same | |
EP3706784A4 (en) | T cell manufacturing compositions and methods | |
EP3407376A4 (en) | Semiconductor device and method for manufacturing same | |
SG10201913140RA (en) | Semiconductor package and method of forming the same | |
EP3577700A4 (en) | Systems and methods for fabrication of superconducting integrated circuits | |
EP3130014A4 (en) | Memory cells, semiconductor structures, semiconductor devices, and methods of fabrication | |
EP3207574A4 (en) | Memory cells, semiconductor devices, and methods of fabrication | |
EP3688799A4 (en) | Group iii-v semiconductor fuses and their methods of fabrication | |
EP3245677A4 (en) | Semiconductor devices, magnetic tunnel junctions, and methods of fabrication thereof | |
EP3509090A4 (en) | P-type oxide semiconductor and method for manufacturing same | |
EP3204966A4 (en) | Semiconductor device and method of manufacturing the same | |
EP3289608A4 (en) | Microelectronic conductive routes and methods of making the same | |
EP3149734A4 (en) | Six-transistor sram semiconductor structures and methods of fabrication | |
EP3149737A4 (en) | Two-transistor sram semiconductor structure and methods of fabrication | |
EP3271946A4 (en) | Silicon-containing semiconductor structures, methods of making the same and devices including the same | |
EP3341962A4 (en) | Semiconductor devices including conductive lines and methods of forming the semiconductor devices | |
EP3811408A4 (en) | Semiconductor device and method of fabrication thereof | |
EP3442038A4 (en) | Semiconductor wafer | |
EP3455895A4 (en) | Compositions and methods for electrode fabrication | |
EP3646420A4 (en) | Method of manufacturing optical semiconductor apparatus and the apparatus |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE INTERNATIONAL PUBLICATION HAS BEEN MADE |
|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE |
|
17P | Request for examination filed |
Effective date: 20200121 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR |
|
AX | Request for extension of the european patent |
Extension state: BA ME |
|
DAV | Request for validation of the european patent (deleted) | ||
DAX | Request for extension of the european patent (deleted) | ||
A4 | Supplementary search report drawn up and despatched |
Effective date: 20210401 |
|
RIC1 | Information provided on ipc code assigned before grant |
Ipc: H01L 23/525 20060101AFI20210326BHEP Ipc: H01L 23/62 20060101ALI20210326BHEP |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
18D | Application deemed to be withdrawn |
Effective date: 20211103 |