EP1897145A1 - Nanostructures with negative differential resistance and method for making same - Google Patents

Nanostructures with negative differential resistance and method for making same

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Publication number
EP1897145A1
EP1897145A1 EP06777518A EP06777518A EP1897145A1 EP 1897145 A1 EP1897145 A1 EP 1897145A1 EP 06777518 A EP06777518 A EP 06777518A EP 06777518 A EP06777518 A EP 06777518A EP 1897145 A1 EP1897145 A1 EP 1897145A1
Authority
EP
European Patent Office
Prior art keywords
atomic
metal
nanostructure
nanostructures
silver
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP06777518A
Other languages
German (de)
French (fr)
Inventor
Patrick Soukiassian
Mathieu Studio Silly
Fabrice Charra
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Universite Paris Sud Paris 11
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Universite Paris Sud Paris 11
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Filing date
Publication date
Priority claimed from FR0551848A external-priority patent/FR2887866B1/en
Priority claimed from FR0650145A external-priority patent/FR2896239B1/en
Application filed by Commissariat a lEnergie Atomique CEA, Universite Paris Sud Paris 11 filed Critical Commissariat a lEnergie Atomique CEA
Publication of EP1897145A1 publication Critical patent/EP1897145A1/en
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
    • H01L29/045—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/122—Single quantum well structures
    • H01L29/125—Quantum wire structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/122—Single quantum well structures
    • H01L29/127—Quantum box structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
    • H01L29/1608—Silicon carbide

Definitions

  • the present invention relates to nanostructures with negative differential resistance
  • the invention applies in particular to the field of nanoelectronics.
  • it makes it possible to obtain structures that behave like one - dimensional Esaki diodes on the atomic scale.
  • the conventional diode tunneling diodes or Esaki diodes are generally made of an electron-poor p-type semiconductor material and an electron-rich n-type semiconductor material. At the junction between these two materials appears a region of charge of space (in English, space-charge region), called ZCE (in English, SCR).
  • the Fermi level must be in the valence band on the p side and in the conduction band on the n side, (b) the thickness of the ECA must be small enough for the tunneling probability to be sufficient, and (c) at the same energy, electrons and holes must be available in the conduction band and in the valence band, respectively.
  • the Esaki diodes thus have a negative differential resistance or RDN (in English,
  • a tunneling diode may be prepared by forming a two-layer heterostructure, for example from III-V semiconductor compounds. These compounds may be chosen for example from GaAs, GaP, GaN and GaAlAs.
  • This document [2] discloses structures consisting of sites that are located on a particular surface. These sites are formed using the tip of a tunneling microscope and have an RDN.
  • the particular surface employed is prepared by exposing a silicon (111) surface to decaborane at a temperature above 500 ° C. This surface is then treated by thermal annealing.
  • the authors of the document [2] note the presence of pads whose density of electronic states is greater for regions covered with a boron atom. These regions have an RDN.
  • This document discloses a method for manufacturing planar unidimensional nanostructures. They are obtained by forming parallel atomic lines, on the surface of a silicon carbide substrate, then by depositing and selectively adsorbing a material between these atomic lines, but not on these lines.
  • the resulting strips can be passivated with NO, NH 3 or sulfur, or can be made electrically conductive with a metal such as potassium.
  • the present invention relates to negative differential resistance nanostructures, which are of great interest in nanoelectronics, as well as to a method for manufacturing these nanostructures.
  • nanostructures having a negative differential resistance can be obtained by forming certain structures, in particular quantum dots, also known as nanocrystals, or parallel atomic lines, on the surface of a silicon carbide substrate, and depositing a metal on this surface until the metal covers at least said structures.
  • the subject of the present invention is a nanostructure having a negative differential resistance, this nanostructure being characterized in that it comprises:
  • each structure can be a quantum pad or an atomic line.
  • Quantum dot in English, quantum dot
  • isolated atoms such as atoms or dimers of silicon or silver on an SiC surface.
  • atomic segment the inventors mean a short atomic line, having from one to four atoms in width and one hundred atoms in length.
  • aggregate in English, cluster
  • the inventors mean a grouping of more than fifty atoms (in 2 or 3 dimensions), such as atoms or dimers of silicon or silver on a surface of SiC.
  • the metal deposition has a thickness ranging from one to five atomic monolayers.
  • the structure or structures consist of silicon.
  • the structure or structures consist of carbon.
  • the silicon carbide (SiC) has a cubic structure.
  • the surface is a surface (100) of the cubic silicon carbide substrate.
  • the metal is preferably selected from metals having a solid band (eg, Ag, Au, Cu), alkali metals, transition metals, alkaline earth metals and rare earths.
  • the metal is silver.
  • the present invention furthermore relates to a method of manufacturing a nanostructure having a negative differential resistance, said method being characterized in that it comprises the following steps:
  • each structure or at least one plurality of said at least one structure is formed on the surface of a silicon carbide substrate, the structure being chosen from among the quantum dots, the atomic segments, the atomic lines and the aggregates. and a metal is deposited on said surface until said metal covers at least the structure or at least the plurality of said at least one structure, or the combination of two or more such structures.
  • each structure can be a quantum pad or an atomic line.
  • the thickness of the deposited metal represents one to five atomic monolayers of this metal.
  • the structure or structures consist of silicon.
  • the structure or structures consist of carbon.
  • the silicon carbide has a cubic structure (polytype 3C (or ⁇ )).
  • the surface is a surface (100) of the cubic silicon carbide substrate.
  • the density of structures can be controlled and adjusted to make isolated structures, ranging from an isolated quantum pad, or an isolated atomic line, to a superimposed network (in English, super-lattice) structures variously distributed on the surface, for example massively parallel atomic lines, as required and according to a method known from the following document:
  • control and the adjustment of the density at the surface are realized by self-organization, by means of the temperature and the annealing time, the displacement of the quantum plots according to the crystalline arrangement present.
  • the quantum pads can also be moved by modulating the temperature.
  • the deposited metal is preferably chosen from metals whose band d is solid, alkali metals, such as lithium or rubidium, metals such as platinum or palladium, alkaline earth metals and rare earths.
  • this metal is silver.
  • the thickness of the metal deposit is preferably a few atomic monolayers.
  • it is preferably two to three monolayers for silver, and one to two monolayers for a metal, such as cesium, whose atoms have a large radius.
  • One-dimensional nanostructures having RDNs in accordance with the invention are of great interest in the field of very fast switching and the domain of oscillators and atomic-scale devices working at very high frequencies.
  • the resulting structures are thus real active components, which is unprecedented.
  • FIG. 1 represents an SPS curve, or tunnel spectroscopy curve, in which the intensity I, expressed in nA, is plotted as a function of the voltage V, expressed in mV, for conditions of regulation of the emission of electrons such that the points of sonign (regulation) of the current are little different from 10 nA and the point of setpoint (regulation) of the voltage is little different from 4.9 V,
  • FIG. 2 is an enlargement of zone I of the curve of FIG. 1;
  • FIGS. 3 to 5 are diagrammatic sectional views of examples of nanostructures conforming to
  • FIG. 6 is an STM image of an SiC surface comprising quantum lines and pads of Si which are covered with silver and have a negative differential resistance Rd,
  • FIG. 7 is a schematic view of a surface carrying quantum dots formed according to the present invention.
  • FIG. 8 is a schematic view of a surface on which quantum pads have been formed and organized in accordance with the invention.
  • FIG. 9 is a schematic sectional view of a substrate whose surface carries a metal-covered quantum pad in accordance with the invention.
  • FIG. 10 is a schematic sectional view of a substrate whose surface carries a plurality of quantum pads which are organized and covered with metal according to the invention
  • FIG. 11 is a schematic top view of the surface of FIG. a substrate carrying quantum dots on which a metal is deposited through a mask.
  • a surface of ⁇ -SiC (100) covered with atomic lines of Si which is based on a reconstructed surface c (4x2) is prepared.
  • atomic lines For the general preparation of atomic lines, refer to the following document:
  • This 3x2 surface consists of extremely dense atomic silicon lines, resting on a surface entirely composed of silicon atoms. New anneals make it possible to reduce the density of these lines in a controlled manner and make it possible, for example, to reach densities of 3x2, 5x2 or even 8x2.
  • a source of money is prepared and calibrated. To do this a source of silver atoms is placed in an ultrahigh vacuum chamber and degassed neatly. The source is considered sufficiently degassed when the pressure increase in the chamber, during the time required to evaporate a monolayer of silver, does not exceed 2 x ICT 9 Pa.
  • the next step is to deposit silver atoms on the previously obtained surface.
  • the procedure to follow is given below.
  • the SiC surface comprising the silicon atomic lines, is then introduced into the ultra-high vacuum chamber and placed about 3 cm from the silver source.
  • the source is then heated by a suitable means such as the Joule effect.
  • Silver atoms then evaporate from the source and settle on the SiC surface.
  • the thickness of the silver deposit is controlled by means of a quartz scale.
  • the silver atoms are deposited so as to cover the atomic lines of silicon.
  • the amount of silver to be deposited corresponds to about three atomic monolayers.
  • the silver is deposited so that it completely covers the silicon atoms of the surface and the lines formed on this surface.
  • the formed surface has a c-4x2 type reconstruction.
  • the resulting nanostructure has an RDN.
  • STS tunneling spectroscopy
  • the atomic lines of Si, which are covered with silver give an I (V) response which has a negative differential resistance. This is not the case of the surface which is also covered with silver (2x3) but located between the lines.
  • the spectroscopic curve I (V) can be seen in absolute value, on a linear scale, for the covered atomic lines.
  • the RDN is better highlighted in Figure 2 which is an enlargement of Part I of Figure 1, delimited by dashed lines.
  • curve I (V) of FIG. 1 represents the variations of the intensity I of the current which passes through the tunneling effect between the tip of the microscope used and the sample studied, as a function of the voltage V between the tip and the sample.
  • the tip of the microscope was able to scan the sample and the typical response occurred at each atomic line crossing.
  • FIGS. 3 to 5 are diagrammatic sectional views of examples of RDN nanostructures according to the invention, formed on a surface (100) a silicon carbide substrate 2 having a cubic structure.
  • the nanostructure of FIG. 3 comprises a single atomic line 4 of silicon on the surface of the substrate 2. This line 4 is covered with a layer of silver 6 whose thickness represents a few monolayers of silver, preferably three monolayers.
  • the nanostructure of FIG. 4 comprises several parallel silicon atomic lines 8 formed on the surface (100) of the substrate 2.
  • the curve 6 covers each line 8 as well as the parts of the surface (100) which are included between these lines.
  • the nanostructure of FIG. 5 comprises several sets of silicon atomic lines 12 which are parallel to one another. These sets are spaced apart from each other. Moreover, in each set, a silver layer 14, the thickness of which represents a few atomic layers of silver, covers the atomic lines of this set as well as the parts of the surface (100), which lie between these lines. .
  • masks may be used to deposit the silver layers at the desired locations.
  • a surface of ⁇ -SiC (100) covered with atomic lines of Si which is based on a reconstructed surface c (4x2), and the steps a) and b), which were discussed above, and the following step are performed: c) Thermal annealing, typically carried out between 800 0 C and 1200 0 C, a portion of the deposited silicon is evaporated in a controlled manner until the surface has the following nanostructures: isolated quantum dots (silicon dimers), silicon atom segments or silicon aggregates. This organization of the surface can be controlled by electron diffraction.
  • the silver is then deposited in a small quantity.
  • the silver is advantageously deposited on the isolated quantum dots; but it can also be deposited on the surface surrounding the studs.
  • the SiC surface comprising the nanostructures as defined above, is then introduced into the ultra-high vacuum chamber and placed about 3 cm from the silver source.
  • the source is heated by a suitable means such as the Joule effect.
  • Silver atoms then evaporate from the source and settle on the SiC surface.
  • the thickness of the silver deposit is controlled by means of a quartz scale.
  • the silver atoms are deposited so as to cover the silicon nanostructures.
  • the amount of money to be deposited corresponds to three monolayers about atomic. In order to operate a more precise control on the depot, it is still possible to use the mask or masks mentioned above.
  • the silver is deposited in such a way that it completely covers the silicon nanostructures.
  • the formed surface has a c-2x4 type reconstruction.
  • the new nanostructures obtained have an RDN.
  • RDN the response of the surface obtained by STS, that is to say by tunneling spectroscopy (in English, scanning tunneling spectroscopy).
  • the nanostructures of Si, which are covered with silver, give an I (V) response which has a negative differential resistance. This is not the case of the surface which is also covered with silver (2x3) but located between the nanostructures.
  • FIG. 6 one can see the image obtained by STM, that is to say the scanning tunneling microscopy image (in English, scanning tunneling microscopy), in topographic mode, of a surface of SiC comprising quantum lines and plots of Si which are coated with silver and have a negative differential resistance Rd.
  • the latter is measured by tunneling spectroscopy (STS) and is negative when passing vertically from a plot or an atomic line that has been covered with silver.
  • STS tunneling spectroscopy
  • FIG. 6 where the variations of Rd along a line parallel to an axis X are shown, the Y axis of FIG. 6 being perpendicular to X.
  • a set of nanostructures having a negative differential resistance has therefore been manufactured. These nanostructures behave as "Esaki diodes" of low dimensionality, such as one-dimensional at the atomic scale.
  • Figure 7 is a schematic view of the surface 16 of an SiC substrate, on which silicon quantum pads 18 have been formed in accordance with the invention.
  • Figure 8 is a schematic view of the surface of an SiC substrate, on which silicon quantum pads 22 have been formed in accordance with the invention and then organized.
  • FIG. 9 is a diagrammatic sectional view of an SiC substrate 24, the surface of which carries a silicon quantum pad 26, which was formed and then covered with a metal 28 such as silver, in accordance with the invention .
  • FIG. 10 is a diagrammatic sectional view of an SiC substrate 30, the surface of which bears a plurality of silicon quantum pads 32, which have been formed in accordance with the invention and then arranged and then covered with a metal 34 such as silver, according to the invention.
  • a metal 34 such as silver
  • the space between the pads has also been covered with metal.
  • FIG. 11 shows the surface 36 of an SiC substrate on which silicon quantum pads 38 have been formed, in accordance with the invention, and then these pads have been organized.
  • this mask has an opening 42 through which the silver atoms to deposit on the surface.
  • a more complex mask having several openings, or even several masks, to deposit the silver in various areas of the surface, spaced apart from each other.
  • the nanostructures according to the invention behave like Esaki diodes in that, like the latter, they have an RDN.
  • nanostructures are metal-semiconductor junctions. It should also be mentioned that a further advantage of the present invention lies in the fact that the surfaces carrying the nanostructures coated with a metal according to the invention can serve as an information storage device because the nanostructures are easily detectable by reading by means of of a near field effect microscope tunnel (in English, scanning tunnelling near-field microscope).
  • the topography of the surface, on which the nanostructures are formed becomes a real map and that the nanostructures can be more or less spaced. It is therefore possible to store information between these nanostructures or in zones containing these nanostructures and to find the defined spaces since each zone is identifiable, which makes it possible to count them and thus to reach the searched space.
  • the zones can be specifically identified for example by the number of nanostructures or by the arrangement thereof.
  • silicon (metal-coated) nanostructures instead of silicon (metal-coated) nanostructures, carbon nanostructures (metal coated) can be formed and used.
  • a cubic structure for the silicon carbide substrate instead of a cubic structure for the silicon carbide substrate, other structures may be used, for example a hexagonal structure or a rhombohedral structure.

Abstract

The invention concerns nanostructures of 0, 1, 2 and 3 dimensions, with negative differential resistance and a method for making said nanostructures. The inventive nanostructure is in particular useful in nanoelectronics. It comprises at least one structure (32) or at least a plurality of said at least one structure, on the surface of a silicon carbide substrate (30), the structure being selected among quantum connection pads, atomic segments, atomic lines and aggregates, and at least one metal deposit (34), said metal deposit covering at least the structure or at least the plurality of said at least one structure, or the combination o at least two of said structures with 0, 1, 2 or 3 dimensions.

Description

NANOSTRUCTURES A RESISTANCE DIFFERENTIELLE NEGATIVE ET LEUR PROCEDE DE FABRICATION NANOSTRUCTURES WITH DIFFERENTIAL NEGATIVE RESISTANCE AND METHOD OF MANUFACTURING THE SAME
DESCRIPTIONDESCRIPTION
DOMAINE TECHNIQUETECHNICAL AREA
La présente invention concerne des nanostructures à résistance différentielle négativeThe present invention relates to nanostructures with negative differential resistance
(RDN) (en anglais, négative differential résistance (NDR) ) et un procédé de fabrication de ces nanostructures .(RDN), and a method of manufacturing these nanostructures.
L'invention s'applique notamment au domaine de la nanoélectronique . En particulier, elle permet d' obtenir des structures se comportant comme des diodes Esaki unidimensionnelles à l'échelle atomique.The invention applies in particular to the field of nanoelectronics. In particular, it makes it possible to obtain structures that behave like one - dimensional Esaki diodes on the atomic scale.
ÉTAT DE LA TECHNIQUE ANTÉRIEURESTATE OF THE PRIOR ART
Les diodes à effet tunnel (en anglais, tunnel diodes) , ou diodes Esaki, classiques sont généralement constituées d'un matériau semiconducteur de type p, pauvre en électrons, et d'un matériau semiconducteur de type n, riche en électrons. Au niveau de la jonction entre ces deux matériaux apparaît une région de charge d'espace (en anglais, space-charge région) , appelée ZCE (en anglais, SCR) .The conventional diode tunneling diodes or Esaki diodes are generally made of an electron-poor p-type semiconductor material and an electron-rich n-type semiconductor material. At the junction between these two materials appears a region of charge of space (in English, space-charge region), called ZCE (in English, SCR).
Pour obtenir un effet tunnel, il est admis que les conditions suivantes doivent être remplies :To achieve a tunnel effect, it is accepted that the following conditions must be met:
(a) le niveau de Fermi doit être situé dans la bande de valence du côté p et dans la bande de conduction du côté n, (b) l'épaisseur de la ZCE doit être suffisamment petite pour que la probabilité de passage par effet tunnel soit suffisante, et (c) il faut qu'à la même énergie, des électrons et des trous soient respectivement disponibles dans la bande de conduction et dans la bande de valence.(a) the Fermi level must be in the valence band on the p side and in the conduction band on the n side, (b) the thickness of the ECA must be small enough for the tunneling probability to be sufficient, and (c) at the same energy, electrons and holes must be available in the conduction band and in the valence band, respectively.
Les diodes Esaki possèdent ainsi une résistance différentielle négative ou RDN (en anglais,The Esaki diodes thus have a negative differential resistance or RDN (in English,
NDR) : sur une certaine plage de la caractéristique INDR): over a certain range of characteristic I
(V) , on y observe un effet de diminution du courant lors de l'augmentation de la tension.(V), there is observed a decrease effect of the current during the increase of the voltage.
Une diode à effet tunnel peut être préparée en formant une hétérostructure à deux couches, par exemple à partir de composés semiconducteurs III-V. Ces composés peuvent être choisis par exemple parmi GaAs, GaP, GaN et GaAlAs.A tunneling diode may be prepared by forming a two-layer heterostructure, for example from III-V semiconductor compounds. These compounds may be chosen for example from GaAs, GaP, GaN and GaAlAs.
Au sujet des diodes à effet tunnel, on peut se reporter au document suivant :With regard to tunneling diodes, reference can be made to the following document:
[1] Léo Esaki, Physical Review 109, 603 (1958) .[1] Leo Esaki, Physical Review 109, 603 (1958).
Par ailleurs, on se reportera au document suivant :In addition, reference is made to the following document:
[2] Lyo et Avouris, Science 245, 1369[2] Lyo and Avouris, Science 245, 1369
(1989) .(1989).
Ce document [2] divulgue des structures constituées de sites qui sont localisés sur une surface particulière. Ces sites sont formés au moyen de la pointe d'un microscope à effet tunnel et ont une RDN. La surface particulière employée est préparée par exposition d'une surface de silicium (111) à du décaborane, à une température supérieure à 5000C. Cette surface est ensuite traitée par recuit thermique. Les auteurs du document [2] constatent la présence de plots dont la densité d'états électroniques est plus importante pour les régions couvertes d'un atome de bore. Ces régions présentent une RDN.This document [2] discloses structures consisting of sites that are located on a particular surface. These sites are formed using the tip of a tunneling microscope and have an RDN. The particular surface employed is prepared by exposing a silicon (111) surface to decaborane at a temperature above 500 ° C. This surface is then treated by thermal annealing. The authors of the document [2] note the presence of pads whose density of electronic states is greater for regions covered with a boron atom. These regions have an RDN.
On se reportera aussi au document suivant :We will also refer to the following document:
[3] US 2004 132 242, "Method for the production of one-dimensional nanostructures and nanostructures obtained according to said method", correspondent à FR 2 823 739.[3] US 2004 132 242, "Method for the production of one-dimensional nanostructures and nanostructures obtained according to said method", correspond to FR 2 823 739.
Ce document divulgue un procédé de fabrication de nanostructures unidimensionnelles planes. Elles sont obtenues par formation de lignes atomiques parallèles, à la surface d'un substrat de carbure de silicium, puis, par dépôt et adsorption sélective d'une matière entre ces lignes atomiques, mais pas sur ces lignes.This document discloses a method for manufacturing planar unidimensional nanostructures. They are obtained by forming parallel atomic lines, on the surface of a silicon carbide substrate, then by depositing and selectively adsorbing a material between these atomic lines, but not on these lines.
Selon la matière employée, les bandes ainsi obtenues peuvent être passivées avec du NO, du NH3 ou du soufre, ou peuvent être rendues électriquement conductrices avec un métal comme le potassium.Depending on the material used, the resulting strips can be passivated with NO, NH 3 or sulfur, or can be made electrically conductive with a metal such as potassium.
Ce document concerne ainsi les nanostructures unidimensionnelles. Toutefois, il ne divulgue pas un procédé d' obtention de structures se comportant comme des diodes Esaki à l'échelle atomique. EXPOSE DE L'INVENTIONThis document thus concerns one-dimensional nanostructures. However, it does not disclose a method of obtaining structures behaving like Esaki diodes at the atomic scale. SUMMARY OF THE INVENTION
La présente invention concerne des nanostructures à résistance différentielle négative, qui présentent un grand intérêt en nanoélectronique, ainsi qu'un procédé de fabrication de ces nanostructures .The present invention relates to negative differential resistance nanostructures, which are of great interest in nanoelectronics, as well as to a method for manufacturing these nanostructures.
Les auteurs de la présente invention ont découvert de manière surprenante que des nanostructures ayant une résistance différentielle négative pouvaient être obtenues en formant certaines structures, notamment des plots quantiques (en anglais, quantum dots) , également appelés nanocristaux (en anglais, nanocrystals) , ou des lignes atomiques parallèles, à la surface d'un substrat de carbure de silicium, et en déposant un métal sur cette surface jusqu'à ce que le métal recouvre au moins lesdites structures.The inventors of the present invention have surprisingly discovered that nanostructures having a negative differential resistance can be obtained by forming certain structures, in particular quantum dots, also known as nanocrystals, or parallel atomic lines, on the surface of a silicon carbide substrate, and depositing a metal on this surface until the metal covers at least said structures.
L' invention permet ainsi de fabriquer des structures se comportant comme des diodes Esaki ponctuelles ou unidimensionnelles à l'échelle atomique. De façon précise, la présente invention a pour objet une nanostructure ayant une résistance différentielle négative, cette nanostructure étant caractérisée en ce qu'elle comprend :The invention thus makes it possible to manufacture structures behaving like point or one-dimensional Esaki diodes on the atomic scale. Precisely, the subject of the present invention is a nanostructure having a negative differential resistance, this nanostructure being characterized in that it comprises:
- au moins une structure ou au moins une pluralité de ladite au moins une structure, à la surface d'un substrat de carbure de silicium, la structure étant choisie parmi les plots quantiques (à 0 dimension) , les segments atomiques (à 1 dimension) , les lignes atomiques (à 1 dimension) et les agrégats (à 2 ou 3 dimensions) , et - au moins un dépôt de métal, ce dépôt de métal recouvrant au moins la structure ou au moins la pluralité de ladite au moins une structure, ou de la combinaison de deux ou plus de ces structures. En particulier, chaque structure peut être un plot quantique ou une ligne atomique.at least one structure or at least a plurality of said at least one structure, on the surface of a silicon carbide substrate, the structure being chosen from among the quantum dots (at 0 dimension), the atomic segments (at 1 dimension ), atomic lines (1-dimension) and aggregates (2-dimensional or 3-dimensional), and at least one metal deposit, this metal deposit covering at least the structure or at least the plurality of said at least one structure, or the combination of two or more of these structures. In particular, each structure can be a quantum pad or an atomic line.
Par « plot quantique » (en anglais, quantum dot) , les inventeurs entendent un regroupement de un à cinquante atomes. Il s'agit notamment d'atomes isolés, tels que des atomes ou des dimères de silicium ou d'argent sur une surface de SiC.By "quantum dot" (in English, quantum dot), the inventors hear a grouping of one to fifty atoms. These include isolated atoms, such as atoms or dimers of silicon or silver on an SiC surface.
Par « segment atomique », les inventeurs entendent une ligne atomique courte, comportant de un à quatre atomes en largeur et une centaine d' atomes en longueur.By "atomic segment", the inventors mean a short atomic line, having from one to four atoms in width and one hundred atoms in length.
Par « agrégat » (en anglais, cluster) , les inventeurs entendent un regroupement de plus de cinquante atomes (à 2 ou 3 dimensions) , tels que des atomes ou des dimères de silicium ou d' argent sur une surface de SiC.By "aggregate" (in English, cluster), the inventors mean a grouping of more than fifty atoms (in 2 or 3 dimensions), such as atoms or dimers of silicon or silver on a surface of SiC.
De préférence, le dépôt de métal a une épaisseur allant de une à cinq monocouches atomiques.Preferably, the metal deposition has a thickness ranging from one to five atomic monolayers.
Selon un mode de réalisation particulier de l'invention, la ou les structures sont constituées de silicium.According to a particular embodiment of the invention, the structure or structures consist of silicon.
Selon un autre mode de réalisation particulier, la ou les structures sont constituées de carbone .According to another particular embodiment, the structure or structures consist of carbon.
De préférence, le carbure de silicium (SiC) a une structure cubique. Selon un mode de réalisation préféré de l'invention, la surface est une surface (100) du substrat de carbure de silicium cubique.Preferably, the silicon carbide (SiC) has a cubic structure. According to a preferred embodiment of the invention, the surface is a surface (100) of the cubic silicon carbide substrate.
Le métal est de préférence choisi parmi les métaux dont la bande d est pleine (par exemple Ag, Au, Cu) , les métaux alcalins, les métaux de transition, les métaux alcalino-terreux et les terres rares.The metal is preferably selected from metals having a solid band (eg, Ag, Au, Cu), alkali metals, transition metals, alkaline earth metals and rare earths.
Selon un mode de réalisation préféré de l'invention, le métal est l'argent. La présente invention concerne en outre un procédé de fabrication d'une nanostructure ayant une résistance différentielle négative, ce procédé étant caractérisé en ce qu'il comprend les étapes suivantes :According to a preferred embodiment of the invention, the metal is silver. The present invention furthermore relates to a method of manufacturing a nanostructure having a negative differential resistance, said method being characterized in that it comprises the following steps:
- on forme au moins une structure ou au moins une pluralité de ladite au moins une structure, à la surface d'un substrat de carbure de silicium, la structure étant choisie parmi les plots quantiques, les segments atomiques, les lignes atomiques et les agrégats, et - on dépose un métal sur ladite surface, jusqu'à ce que ce métal recouvre au moins la structure ou au moins la pluralité de ladite au moins une structure, ou de la combinaison de deux ou plus de ces structures . En particulier, chaque structure peut être un plot quantique ou une ligne atomique.at least one structure or at least one plurality of said at least one structure is formed on the surface of a silicon carbide substrate, the structure being chosen from among the quantum dots, the atomic segments, the atomic lines and the aggregates. and a metal is deposited on said surface until said metal covers at least the structure or at least the plurality of said at least one structure, or the combination of two or more such structures. In particular, each structure can be a quantum pad or an atomic line.
De préférence, l'épaisseur du métal déposé représente une à cinq monocouches atomiques de ce métal . Selon un mode de mise en œuvre particulier du procédé objet de l'invention, la ou les structures sont constituées de silicium.Preferably, the thickness of the deposited metal represents one to five atomic monolayers of this metal. According to a particular mode of implementation of the method which is the subject of the invention, the structure or structures consist of silicon.
Selon un autre mode de mise en œuvre particulier, la ou les structures sont constituées de carbone .According to another particular mode of implementation, the structure or structures consist of carbon.
De préférence, le carbure de silicium a une structure cubique (polytype 3C (ou β) ) .Preferably, the silicon carbide has a cubic structure (polytype 3C (or β)).
Selon un mode de réalisation préféré de l'invention, la surface est une surface (100) du substrat de carbure de silicium cubique.According to a preferred embodiment of the invention, the surface is a surface (100) of the cubic silicon carbide substrate.
La densité des structures, telles que des plots quantiques ou les lignes atomiques, peut être contrôlée et ajustée de manière à fabriquer des structures isolées, allant par exemple d'un plot quantique isolé, ou d'une ligne atomique isolée, à un super-réseau (en anglais, super-lattice) de structures diversement réparties sur la surface, par exemple des lignes atomiques massivement parallèles, selon les besoins et selon une méthode connue par le document suivant :The density of structures, such as quantum dots or atomic lines, can be controlled and adjusted to make isolated structures, ranging from an isolated quantum pad, or an isolated atomic line, to a superimposed network (in English, super-lattice) structures variously distributed on the surface, for example massively parallel atomic lines, as required and according to a method known from the following document:
[4] FR 2 757 183 A - voir aussi l'article de Soukiassian et al., Physical Review Letters 79, 2498, 1997.[4] FR 2 757 183 A - see also the article by Soukiassian et al., Physical Review Letters 79, 2498, 1997.
Plus particulièrement, dans le cas de plots quantiques, le contrôle et l'ajustement de la densité à la surface sont réalisés par auto-organisation, par le biais de la température et du temps de recuit, le déplacement des plots quantiques se faisant selon l'arrangement cristallin présent.More particularly, in the case of quantum dots, the control and the adjustment of the density at the surface are realized by self-organization, by means of the temperature and the annealing time, the displacement of the quantum plots according to the crystalline arrangement present.
Il s'agit d'un déplacement selon des lignes atomiques définies par le substrat, notamment lors de l'utilisation d'une surface de β-SiC (100) 4x2.It is a displacement along atomic lines defined by the substrate, especially when using a surface of β-SiC (100) 4x2.
Typiquement, pour obtenir des plots quantiques de silicium, c'est-à-dire des dimères, sur une surface d'un substrat de β-SiC, il faut porter la surface de ce substrat à une température supérieure à 8000C. Les lignes atomiques de silicium préalablement formées commencent à se décomposer, « dimère par dimère », en laissant des segments puis des lignes de lacunes de Si ainsi que des dimères de Si qui forment des plots quantiques. Plus la température est importante et plus le phénomène est rapide. Aussi est-il souhaitable de travailler entre 8000C et 12000C avec ce type de composé, et dans tous les cas à une température inférieure à la température de destruction de la surface. A ce sujet, on se reportera au document suivant :Typically, to obtain silicon quantum dots, that is to say dimers, on a surface of a β-SiC substrate, it is necessary to bring the surface of this substrate to a temperature greater than 800 ° C. Previously formed atomic silicon lines begin to decompose, "dimer by dimer", leaving segments then lines of Si gaps as well as dimers of Si that form quantum dots. The higher the temperature, the faster the phenomenon. It is therefore desirable to work between 800 ° C. and 1200 ° C. with this type of compound, and in all cases at a temperature below the surface destruction temperature. In this regard, reference is made to the following document:
[5] (Aristov et al., Surface Science 440 (1999), L825-L830.[5] (Aristov et al., Surface Science 440 (1999), L825-L830.
Les plots quantiques peuvent également être déplacés en modulant la température.The quantum pads can also be moved by modulating the temperature.
Le métal déposé est de préférence choisi parmi les métaux dont la bande d est pleine, les métaux alcalins, comme le lithium ou le rubidium, les métaux de transition, comme le platine ou le palladium, les métaux alcalino-terreux et les terres rares.The deposited metal is preferably chosen from metals whose band d is solid, alkali metals, such as lithium or rubidium, metals such as platinum or palladium, alkaline earth metals and rare earths.
Avantageusement, il est choisi parmi l'argent, l'or, le cuivre, l'indium, le gallium, l'étain, le plomb, le tungstène, le molybdène, le niobium et l'aluminium. De manière préférentielle, ce métal est l'argent.Advantageously, it is chosen from silver, gold, copper, indium, gallium, tin, lead, tungsten, molybdenum, niobium and aluminum. Preferably, this metal is silver.
Comme on l'a vu, l'épaisseur du dépôt de métal vaut de préférence quelques monocouches atomiques. En particulier, elle vaut de préférence deux à trois monocouches pour l'argent, et une à deux monocouches pour un métal, comme par exemple le césium, dont les atomes ont un rayon important.As has been seen, the thickness of the metal deposit is preferably a few atomic monolayers. In particular, it is preferably two to three monolayers for silver, and one to two monolayers for a metal, such as cesium, whose atoms have a large radius.
Des nanostructures unidimensionnelles ayant des RDN conformément à l'invention, présentent un grand intérêt dans le domaine de la commutation très rapide et le domaine des oscillateurs et des dispositifs à l'échelle atomique qui travaillent à de très hautes fréquences. Les structures obtenues sont ainsi de véritables composants actifs, ce qui est sans précédent.One-dimensional nanostructures having RDNs in accordance with the invention are of great interest in the field of very fast switching and the domain of oscillators and atomic-scale devices working at very high frequencies. The resulting structures are thus real active components, which is unprecedented.
BRÈVE DESCRIPTION DES DESSINSBRIEF DESCRIPTION OF THE DRAWINGS
La présente invention sera mieux comprise à la lecture de la description d'exemples de réalisation donnés ci-après, à titre purement indicatif et nullement limitatif, en faisant référence aux dessins annexés, sur lesquels :The present invention will be better understood on reading the description of exemplary embodiments given below, purely by way of indication and in no way limiting, with reference to the appended drawings, in which:
- la figure 1 représente une courbe de SPS, ou courbe de spectroscopie tunnel (en anglais, scanning tunnel spectroscopy) , dans laquelle l'intensité I, exprimée en nA, est tracée en fonction de la tension V, exprimée en mV, pour des conditions de régulation de l'émission d'électrons telles que les points de sonsigne (régulation) du courant soient peu différents de 10 nA et le point de consigne (régulation) de la tension soit peu différent de 4,9 V,FIG. 1 represents an SPS curve, or tunnel spectroscopy curve, in which the intensity I, expressed in nA, is plotted as a function of the voltage V, expressed in mV, for conditions of regulation of the emission of electrons such that the points of sonign (regulation) of the current are little different from 10 nA and the point of setpoint (regulation) of the voltage is little different from 4.9 V,
- la figure 2 est un agrandissement de la zone I de la courbe de la figure 1,FIG. 2 is an enlargement of zone I of the curve of FIG. 1;
- les figures 3 à 5 sont des vues en coupe schématiques d'exemples de nanostructures conformes àFIGS. 3 to 5 are diagrammatic sectional views of examples of nanostructures conforming to
1' invention,The invention,
- la figure 6 est une image STM d'une surface de SiC comportant des lignes et des plots quantiques de Si qui sont recouverts d'argent et présentent une résistance différentielle négative Rd,FIG. 6 is an STM image of an SiC surface comprising quantum lines and pads of Si which are covered with silver and have a negative differential resistance Rd,
- la figure 7 est une vue schématique d'une surface portant des plots quantiques que l'on a formés conformément à la présente invention,FIG. 7 is a schematic view of a surface carrying quantum dots formed according to the present invention,
- la figure 8 est une vue schématique d'une surface sur laquelle des plots quantiques ont été formés et organisés conformément à l'invention,FIG. 8 is a schematic view of a surface on which quantum pads have been formed and organized in accordance with the invention,
- la figure 9 est une vue en coupe schématique d'un substrat dont la surface porte un plot quantique recouvert de métal conformément à l'invention,FIG. 9 is a schematic sectional view of a substrate whose surface carries a metal-covered quantum pad in accordance with the invention,
- la figure 10 est une vue en coupe schématique d'un substrat dont la surface porte plusieurs plots quantiques qui sont organisés et recouverts de métal conformément à l'invention, et - la figure 11 est une vue de dessus schématique de la surface d'un substrat portant des plots quantiques sur lesquels on dépose un métal à travers un masque.FIG. 10 is a schematic sectional view of a substrate whose surface carries a plurality of quantum pads which are organized and covered with metal according to the invention, and FIG. 11 is a schematic top view of the surface of FIG. a substrate carrying quantum dots on which a metal is deposited through a mask.
EXPOSÉ DÉTAILLÉ DE MODES DE RÉALISATION PARTICULIERSDETAILED PRESENTATION OF PARTICULAR EMBODIMENTS
Un exemple de fabrication d'une nanostructure conforme à l'invention est donné ci- après, à titre purement indicatif et nullement limitatif .An example of manufacture of a nanostructure according to the invention is given below, for purely indicative and not limiting.
On commence par préparer une surface β-SiC (100) pourvue de lignes atomiques.We begin by preparing a β-SiC surface (100) provided with atomic lines.
Plus précisément, dans l'exemple considéré, on prépare une surface de β-SiC(lOO) couverte de lignes atomiques de Si qui reposent sur une surface reconstruite c(4x2). Pour la préparation générale de lignes atomiques, on se reportera au document suivant :More precisely, in the example under consideration, a surface of β-SiC (100) covered with atomic lines of Si which is based on a reconstructed surface c (4x2) is prepared. For the general preparation of atomic lines, refer to the following document:
[6] US 6 274 234, "Very long and highly stable atomic wires, method for making thèse wires, application in nanelectronics", correspondant à WO 98/27578.[6] US 6,274,234, "Very long and highly stable atomic wires, method for making thesis wires, application in nanelectronics", corresponding to WO 98/27578.
La procédure suivie dans l'exemple est donnée ci-après. a) Un échantillon de carbure de silicium cubique (3C-SiC) est placé dans une enceinte, dans laquelle règne une pression inférieure à 5 x 10~9 Pa, et l'échantillon est chauffé par passage d'un courant directement dans cet échantillon, pendant plusieurs heures à 65O0C, puis plusieurs fois à HOO0C pendant une minute.The procedure followed in the example is given below. a) A sample of cubic silicon carbide (3C-SiC) is placed in a chamber, in which a pressure of less than 5 x 10 ~ 9 Pa prevails, and the sample is heated by passing a current directly into this sample , during several hours at 65O 0 C, then several times at HOO 0 C for one minute.
b) A l'aide d'une source de silicium chauffée à 13000C, on dépose plusieurs monocouches de silicium sur la surface (100) du SiC cubique.b) Using a silicon source heated at 1300 ° C., several monolayers of silicon are deposited on the surface (100) of the cubic SiC.
c) Par des recuits thermiques, on évapore de façon contrôlée une partie du silicium déposé jusqu'à ce que la surface présente une organisation à l'échelle atomique (reconstruction) de symétrie 3x2. Cette symétrie de la surface peut être contrôlée par diffraction d'électrons.c) By thermal annealing, a portion of the deposited silicon is evaporated in a controlled manner until the surface has an organization at the atomic scale (reconstruction) of 3 × 2 symmetry. This symmetry of the surface can be controlled by electron diffraction.
Cette surface 3x2 est constituée de lignes atomiques de silicium extrêmement denses, reposant sur une surface entièrement composée d'atomes de silicium. De nouveaux recuits permettent de diminuer la densité de ces lignes de façon contrôlée et permettent par exemple d'atteindre des densités 3x2, 5x2 ou encore 8x2.This 3x2 surface consists of extremely dense atomic silicon lines, resting on a surface entirely composed of silicon atoms. New anneals make it possible to reduce the density of these lines in a controlled manner and make it possible, for example, to reach densities of 3x2, 5x2 or even 8x2.
Sur la surface ainsi obtenue, on dépose ensuite de l'argent. On procède comme cela est indiqué ci-après . Dans une première étape, on prépare et l'on calibre une source d'argent. Pour ce faire une source d'atomes d'argent est placée dans une chambre à ultravide et dégazée de façon soignée. La source est considérée comme suffisamment dégazée quand l'augmentation de pression dans la chambre, durant le temps nécessaire pour évaporer une monocouche d'argent, ne dépasse pas 2 x ICT9 Pa.On the surface thus obtained, the silver is then deposited. The procedure is as indicated below. In a first step, a source of money is prepared and calibrated. To do this a source of silver atoms is placed in an ultrahigh vacuum chamber and degassed neatly. The source is considered sufficiently degassed when the pressure increase in the chamber, during the time required to evaporate a monolayer of silver, does not exceed 2 x ICT 9 Pa.
L'étape suivante consiste à déposer des atomes d'argent sur la surface précédemment obtenue. La procédure à suivre est donnée ci-après.The next step is to deposit silver atoms on the previously obtained surface. The procedure to follow is given below.
La surface de SiC, comportant les lignes atomiques de silicium, est alors introduite dans la chambre à ultravide et placée à environ 3 cm de la source d'argent. On chauffe alors la source par un moyen adapté tel que l'effet Joule. Des atomes d'argent s'évaporent alors de la source et se déposent sur la surface de SiC. On contrôle l'épaisseur du dépôt d'argent à l'aide d'une balance à quartz. On peut également suivre le signal XPS issu d'un niveau de cœur de l'argent.The SiC surface, comprising the silicon atomic lines, is then introduced into the ultra-high vacuum chamber and placed about 3 cm from the silver source. The source is then heated by a suitable means such as the Joule effect. Silver atoms then evaporate from the source and settle on the SiC surface. The thickness of the silver deposit is controlled by means of a quartz scale. One can also track the XPS signal from a heart level of money.
Les atomes d' argent sont déposés de manière à recouvrir les lignes atomiques de silicium. La quantité d'argent à déposer correspond à trois monocouches atomiques environ.The silver atoms are deposited so as to cover the atomic lines of silicon. The amount of silver to be deposited corresponds to about three atomic monolayers.
Afin d' opérer un contrôle plus précis sur le dépôt, il est possible d'utiliser un ou plusieurs masques, comme on le fait habituellement dans le domaine de l'électronique. Ce ou ces masques peuvent être par exemple constitués de SiO2.In order to have a more precise control over the deposit, it is possible to use one or more masks, as is usually done in the field of electronics. This or these masks may for example consist of SiO 2 .
Dans l'exemple considéré, l'argent est déposé de telle sorte qu'il recouvre entièrement les atomes de silicium de la surface ainsi que les lignes formées sur cette surface. Dans ce cas, la surface formée possède une reconstruction de type c-4x2. La nanostructure obtenue a une RDN. Pour mettre cette RDN en évidence, on étudie la réponse de la surface obtenue par STS, c'est-à dire par spectroscopie à effet tunnel (en anglais, scanning tunneling spectroscopy) . Les lignes atomiques de Si, qui sont couvertes d'argent, donnent une réponse I (V) qui présente une résistance différentielle négative. Ce n'est pas le cas de la surface qui est également couverte d'argent (2x3) mais située entre les lignes. Sur la figure 1, on peut voir la courbe de spectroscopie I (V) en valeur absolue, à l'échelle linéaire, pour les lignes atomiques recouvertes. La RDN est mieux mise en évidence sur la figure 2 qui est un agrandissement de la partie I de la figure 1, délimitée par des pointillés.In the example, the silver is deposited so that it completely covers the silicon atoms of the surface and the lines formed on this surface. In this case, the formed surface has a c-4x2 type reconstruction. The resulting nanostructure has an RDN. To put this RDN in evidence, we study the response of the surface obtained by STS, that is to say by tunneling spectroscopy (in English, scanning tunneling spectroscopy). The atomic lines of Si, which are covered with silver, give an I (V) response which has a negative differential resistance. This is not the case of the surface which is also covered with silver (2x3) but located between the lines. In FIG. 1, the spectroscopic curve I (V) can be seen in absolute value, on a linear scale, for the covered atomic lines. The RDN is better highlighted in Figure 2 which is an enlargement of Part I of Figure 1, delimited by dashed lines.
On a donc fabriqué un super-réseau de lignes atomiques massivement parallèles qui possèdent une résistance différentielle négative. Ces lignes atomiques se comportent comme des « diodes Esaki » unidimensionnelles à l'échelle atomique.Thus, a superlattice of massively parallel atomic lines has been fabricated which has a negative differential resistance. These atomic lines behave as one-dimensional "Esaki diodes" at the atomic scale.
On précise que la courbe I (V) de la figure 1 représente les variations de l'intensité I du courant qui passe par effet tunnel entre la pointe du microscope utilisé et l'échantillon étudié, en fonction de la tension V entre la pointe et l'échantillon.It is pointed out that the curve I (V) of FIG. 1 represents the variations of the intensity I of the current which passes through the tunneling effect between the tip of the microscope used and the sample studied, as a function of the voltage V between the tip and the sample.
La pointe du microscope a pu balayer l'échantillon et la réponse typique s'est présentée à chaque franchissement de ligne atomique.The tip of the microscope was able to scan the sample and the typical response occurred at each atomic line crossing.
Les figures 3 à 5 sont des vues en coupe schématiques d'exemples de nanostructures à RDN conformes à l'invention, formées sur une surface (100) d'un substrat 2 en carbure de silicium à structure cubique .FIGS. 3 to 5 are diagrammatic sectional views of examples of RDN nanostructures according to the invention, formed on a surface (100) a silicon carbide substrate 2 having a cubic structure.
La nanostructure de la figure 3 comprend une seule ligne atomique 4 de silicium sur la surface du substrat 2. Cette ligne 4 est recouverte d'une couche d'argent 6 dont l'épaisseur représente quelques monocouches d'argent, de préférence trois monocouches.The nanostructure of FIG. 3 comprises a single atomic line 4 of silicon on the surface of the substrate 2. This line 4 is covered with a layer of silver 6 whose thickness represents a few monolayers of silver, preferably three monolayers.
La nanostructure de la figure 4 comprend plusieurs lignes atomiques de silicium parallèles 8, formées sur la surface (100) du substrat 2. Dans cet exemple, la courbe 6 recouvre chaque ligne 8 ainsi que les parties de la surface (100) qui sont comprises entre ces lignes.The nanostructure of FIG. 4 comprises several parallel silicon atomic lines 8 formed on the surface (100) of the substrate 2. In this example, the curve 6 covers each line 8 as well as the parts of the surface (100) which are included between these lines.
La nanostructure de la figure 5 comprend plusieurs ensembles 10 de lignes atomiques de silicium 12 qui sont parallèles les unes aux autres. Ces ensembles sont espacés les uns des autres. De plus, dans chaque ensemble, une couche d'argent 14, dont l'épaisseur représente quelques couches atomiques d'argent, recouvre les lignes atomiques de cet ensemble ainsi que les parties de la surface (100), qui sont comprises entre ces lignes.The nanostructure of FIG. 5 comprises several sets of silicon atomic lines 12 which are parallel to one another. These sets are spaced apart from each other. Moreover, in each set, a silver layer 14, the thickness of which represents a few atomic layers of silver, covers the atomic lines of this set as well as the parts of the surface (100), which lie between these lines. .
Dans les exemples des figures 3 à 5, on peut utiliser des masques (non représentés) pour déposer les couches d'argent aux endroits souhaités.In the examples of FIGS. 3 to 5, masks (not shown) may be used to deposit the silver layers at the desired locations.
Un autre exemple de fabrication de nanostructures conformes à l'invention est donné ci- après, à titre purement indicatif et nullement limitatif . On prépare encore une surface de β-SiC(lOO) couverte de lignes atomiques de Si qui reposent sur une surface reconstruite c(4x2), et l'on accomplit les étapes a) et b) , dont il a été question plus haut, puis l'étape suivante : cl) Par des recuits thermiques, typiquement effectués entre 8000C et 12000C, on évapore de façon contrôlée une partie du silicium déposé jusqu'à ce que la surface présente les nanostructures suivantes : des plots quantiques isolés (des dimères de silicium) , des segments d'atomes de silicium ou encore des agrégats de silicium. Cette organisation de la surface peut être contrôlée par diffraction d'électrons.Another example of manufacture of nanostructures according to the invention is given below, for purely indicative and not limiting. A surface of β-SiC (100) covered with atomic lines of Si which is based on a reconstructed surface c (4x2), and the steps a) and b), which were discussed above, and the following step are performed: c) Thermal annealing, typically carried out between 800 0 C and 1200 0 C, a portion of the deposited silicon is evaporated in a controlled manner until the surface has the following nanostructures: isolated quantum dots (silicon dimers), silicon atom segments or silicon aggregates. This organization of the surface can be controlled by electron diffraction.
Sur la surface ainsi obtenue, on dépose ensuite de l'argent en faible quantité. Dans le cas présent, l'argent est avantageusement déposé sur les plots quantiques isolés ; mais il peut être également déposé sur la surface entourant les plots.On the surface thus obtained, the silver is then deposited in a small quantity. In the present case, the silver is advantageously deposited on the isolated quantum dots; but it can also be deposited on the surface surrounding the studs.
Pour ce dépôt, on procède comme cela est indiqué plus haut (première étape et étape suivante) .For this deposit, proceed as indicated above (first step and next step).
La surface de SiC, comportant les nanostructures telles que définies ci-dessus, est alors introduite dans la chambre à ultravide et placée à environ 3 cm de la source d'argent. On chauffe la source par un moyen adapté tel que l'effet Joule. Des atomes d'argent s'évaporent alors de la source et se déposent sur la surface de SiC.The SiC surface, comprising the nanostructures as defined above, is then introduced into the ultra-high vacuum chamber and placed about 3 cm from the silver source. The source is heated by a suitable means such as the Joule effect. Silver atoms then evaporate from the source and settle on the SiC surface.
On contrôle l'épaisseur du dépôt d'argent à l'aide d'une balance à quartz. On peut également suivre le signal XPS issu d'un niveau de cœur de l'argent.The thickness of the silver deposit is controlled by means of a quartz scale. One can also track the XPS signal from a heart level of money.
Les atomes d' argent sont déposés de manière à recouvrir les nanostructures de silicium. La quantité d' argent à déposer correspond à trois monocouches atomiques environ. Afin d'opérer un contrôle plus précis sur le dépôt, il est encore possible d'utiliser le ou les masques dont il a été question plus haut.The silver atoms are deposited so as to cover the silicon nanostructures. The amount of money to be deposited corresponds to three monolayers about atomic. In order to operate a more precise control on the depot, it is still possible to use the mask or masks mentioned above.
Dans l'exemple considéré, l'argent est déposé de telle sorte qu'il recouvre entièrement les nanostructures de silicium. Dans ce cas, la surface formée possède une reconstruction de type c-2x4.In the example under consideration, the silver is deposited in such a way that it completely covers the silicon nanostructures. In this case, the formed surface has a c-2x4 type reconstruction.
Les nouvelles nanostructures obtenues ont une RDN. Pour mettre cette RDN en évidence, on étudie la réponse de la surface obtenue par STS, c'est-à dire par spectroscopie à effet tunnel (en anglais, scanning tunneling spectroscopy) . Les nanostructures de Si, qui sont couvertes d'argent, donnent une réponse I (V) qui présente une résistance différentielle négative. Ce n'est pas le cas de la surface qui est également couverte d'argent (2x3) mais située entre les nanostructures .The new nanostructures obtained have an RDN. To put this RDN in evidence, we study the response of the surface obtained by STS, that is to say by tunneling spectroscopy (in English, scanning tunneling spectroscopy). The nanostructures of Si, which are covered with silver, give an I (V) response which has a negative differential resistance. This is not the case of the surface which is also covered with silver (2x3) but located between the nanostructures.
Sur la figure 6, on peut voir l'image obtenue par STM, c'est-à-dire l'image de microscopie à effet tunnel (en anglais, scanning tunnelling microscopy) , en mode topographique, d'une surface de SiC comportant des lignes et des plots quantiques de Si qui sont recouverts d'argent et présentent une résistance différentielle négative Rd. Cette dernière est mesurée par spectroscopie à effet tunnel (STS) et elle est négative quand on passe à la verticale d'un plot ou d'une ligne atomique que l'on a recouverts d'argent. On peut voir cela sur la figure 6 où l'on a représenté les variations de Rd suivant une ligne parallèle à un axe X, l'axe Y de la figure 6 étant perpendiculaire à X. On a donc fabriqué un ensemble de nanostructures qui possèdent une résistance différentielle négative. Ces nanostructures se comportent comme des « diodes Esaki » de basse dimensionnalité, telles qu' unidimensionnelles à l'échelle atomique.In FIG. 6, one can see the image obtained by STM, that is to say the scanning tunneling microscopy image (in English, scanning tunneling microscopy), in topographic mode, of a surface of SiC comprising quantum lines and plots of Si which are coated with silver and have a negative differential resistance Rd. The latter is measured by tunneling spectroscopy (STS) and is negative when passing vertically from a plot or an atomic line that has been covered with silver. This can be seen in FIG. 6 where the variations of Rd along a line parallel to an axis X are shown, the Y axis of FIG. 6 being perpendicular to X. A set of nanostructures having a negative differential resistance has therefore been manufactured. These nanostructures behave as "Esaki diodes" of low dimensionality, such as one-dimensional at the atomic scale.
On précise que la pointe du microscope à effet tunnel a été capable de balayer l'échantillon et que la réponse typique se présente à chaque franchissement de nanostructure .It is specified that the tip of the tunneling microscope was able to scan the sample and that the typical response occurs at each nanostructure crossing.
La figure 7 est une vue schématique de la surface 16 d'un substrat de SiC, sur laquelle on a formé des plots quantiques 18 en silicium conformément à l'invention. La figure 8 est une vue schématique de la surface 20 d'un substrat de SiC, sur laquelle des plots quantiques 22 en silicium ont été formés, conformément à l'invention, puis organisés.Figure 7 is a schematic view of the surface 16 of an SiC substrate, on which silicon quantum pads 18 have been formed in accordance with the invention. Figure 8 is a schematic view of the surface of an SiC substrate, on which silicon quantum pads 22 have been formed in accordance with the invention and then organized.
La figure 9 est une vue en coupe schématique d'un substrat 24 en SiC, dont la surface porte un plot quantique 26 en silicium, qui a été formé puis recouvert d'un métal 28 tel que l'argent, conformément à l'invention.FIG. 9 is a diagrammatic sectional view of an SiC substrate 24, the surface of which carries a silicon quantum pad 26, which was formed and then covered with a metal 28 such as silver, in accordance with the invention .
La figure 10 est une vue en coupe schématique d'un substrat 30 en SiC, dont la surface porte plusieurs plots quantiques 32 en silicium, qui ont été formés conformément à l'invention puis organisés puis recouverts d'un métal 34 tel que l'argent, conformément à l'invention. Dans l'exemple de la figure 10, l'espace compris entre les plots a également été recouvert du métal. Selon l'invention, il est possible d'utiliser un ou plusieurs masques pour déposer les couches de métal, ici l'argent, aux endroits souhaités.FIG. 10 is a diagrammatic sectional view of an SiC substrate 30, the surface of which bears a plurality of silicon quantum pads 32, which have been formed in accordance with the invention and then arranged and then covered with a metal 34 such as silver, according to the invention. In the example of Figure 10, the space between the pads has also been covered with metal. According to the invention, it is possible to use one or more masks to deposit the metal layers, here money, at the desired locations.
Ceci est schématiquement illustré sur la figure 11. On y voit la surface 36 d'un substrat de SiC, sur laquelle on a formé des plots quantiques 38 en silicium, conformément à l'invention, puis on a organisé ces plots.This is schematically illustrated in FIG. 11. It shows the surface 36 of an SiC substrate on which silicon quantum pads 38 have been formed, in accordance with the invention, and then these pads have been organized.
On peut ensuite placer un masque 40, par exemple en silicium, sur la surface et déposer l'argent sur les plots à travers le masque. Dans l'exemple de la figure 11, ce masque comporte une ouverture 42 que traversent les atomes d' argent pour se déposer sur la surface . Cependant, on peut également utiliser un masque plus complexe, comportant plusieurs ouvertures, ou même plusieurs masques, pour déposer l'argent dans diverses zones de la surface, espacées les unes des autres . Précisons que les nanostructures conformes à l'invention se comportent comme des diodes Esaki en ce sens que, comme ces dernières, elles ont une RDN.We can then place a mask 40, for example silicon, on the surface and deposit the money on the pads through the mask. In the example of Figure 11, this mask has an opening 42 through which the silver atoms to deposit on the surface. However, it is also possible to use a more complex mask, having several openings, or even several masks, to deposit the silver in various areas of the surface, spaced apart from each other. Note that the nanostructures according to the invention behave like Esaki diodes in that, like the latter, they have an RDN.
Remarquons aussi que ces nanostructures sont des jonctions métal-semiconducteur. Mentionnons également qu'un intérêt supplémentaire de la présente invention réside dans le fait que les surfaces portant les nanostructures recouvertes d'un métal conformément à l'invention peuvent servir de dispositif de stockage d' informations car les nanostructures sont facilement repérables par lecture au moyen d'un microscope à champ proche à effet tunnel (en anglais, scanning tunnelling near-field microscope) .Note also that these nanostructures are metal-semiconductor junctions. It should also be mentioned that a further advantage of the present invention lies in the fact that the surfaces carrying the nanostructures coated with a metal according to the invention can serve as an information storage device because the nanostructures are easily detectable by reading by means of of a near field effect microscope tunnel (in English, scanning tunnelling near-field microscope).
En effet, remarquons que la topographie de la surface, sur laquelle les nanostructures sont formées, devient une véritable carte et que les nanostructures peuvent être plus ou moins espacées. On peut donc stocker des informations entre ces nanostructures ou dans des zones contenant ces nanostructures et retrouver les espaces définis puisque chaque zone est repérable, ce qui permet de les compter et de parvenir ainsi à l'espace recherché.Indeed, note that the topography of the surface, on which the nanostructures are formed, becomes a real map and that the nanostructures can be more or less spaced. It is therefore possible to store information between these nanostructures or in zones containing these nanostructures and to find the defined spaces since each zone is identifiable, which makes it possible to count them and thus to reach the searched space.
Par ailleurs, les zones peuvent être spécialement identifiées par exemple par le nombre de nanostructures ou par l'agencement de celles-ci. Dans la présente invention, au lieu de nanostructures en silicium (recouvertes d'un métal), on peut former et utiliser des nanostructures de carbone (recouvertes d'un métal).Furthermore, the zones can be specifically identified for example by the number of nanostructures or by the arrangement thereof. In the present invention, instead of silicon (metal-coated) nanostructures, carbon nanostructures (metal coated) can be formed and used.
Dans le cas d'un substrat de carbure de silicium à structure cubique, au lieu d'une surface (100) d'un tel substrat, on peut utiliser d'autres surfaces, par exemple des surface (111), (110) etc.In the case of a cubic structure silicon carbide substrate, instead of a surface (100) of such a substrate, other surfaces, for example surfaces (111), (110) etc., may be used. .
De plus, au lieu d'une structure cubique pour le substrat en carbure de silicium, on peut utiliser d'autres structures, par exemple une structure hexagonale ou une structure rhomboédrique . In addition, instead of a cubic structure for the silicon carbide substrate, other structures may be used, for example a hexagonal structure or a rhombohedral structure.

Claims

REVENDICATIONS
1. Nanostructure ayant une résistance différentielle négative, cette nanostructure étant caractérisée en ce qu'elle comprend :A nanostructure having negative differential resistance, said nanostructure being characterized in that it comprises:
- au moins une structure (4, 8, 12, 26, 32) ou au moins une pluralité de ladite au moins une structure, à la surface d'un substrat de carbure de silicium (2, 24, 30), la structure étant choisie parmi les plots quantiques, les segments atomiques, les lignes atomiques et les agrégats, etat least one structure (4, 8, 12, 26, 32) or at least a plurality of said at least one structure, on the surface of a silicon carbide substrate (2, 24, 30), the structure being selected among the quantum dots, the atomic segments, the atomic lines and the aggregates, and
- au moins un dépôt de métal (6, 14, 28, 34), ce dépôt de métal recouvrant au moins la structure ou au moins la pluralité de ladite au moins une structure, ou de la combinaison de deux ou plus de ces structures .at least one metal deposit (6, 14, 28, 34), this metal deposit covering at least the structure or at least the plurality of said at least one structure, or the combination of two or more of these structures.
2. Nanostructure selon la revendication 1, dans laquelle chaque structure est un plot quantique (26, 32) .The nanostructure of claim 1, wherein each structure is a quantum pad (26, 32).
3. Nanostructure selon la revendication 1, dans laquelle chaque structure est une ligne atomique3. The nanostructure according to claim 1, wherein each structure is an atomic line.
(4, 8, 12) .(4, 8, 12).
4. Nanostructure selon la revendication 1, dans laquelle chaque structure est un segment atomique.The nanostructure of claim 1, wherein each structure is an atomic segment.
5. Nanostructure selon l'une quelconque des revendications 1 à 4, dans laquelle le dépôt de métal (6, 14, 28, 34) a une épaisseur allant de une à cinq monocouches atomiques.The nanostructure according to any of claims 1 to 4, wherein the metal deposition (6, 14, 28, 34) has a thickness ranging from one to five atomic monolayers.
6. Nanostructure selon l'une quelconque des revendications 1 à 5, dans laquelle la ou les structures sont constituées de silicium.The nanostructure according to any one of claims 1 to 5, wherein the one or more structures are made of silicon.
7. Nanostructure selon l'une quelconque des revendications 1 à 5, dans laquelle la ou les structures sont constituées de carbone.7. A nanostructure according to any one of claims 1 to 5, wherein the one or more structures consist of carbon.
8. Nanostructure selon l'une quelconque des revendications 1 à 7, dans laquelle le carbure de silicium a une structure cubique.8. The nanostructure according to any one of claims 1 to 7, wherein the silicon carbide has a cubic structure.
9. Nanostructure selon la revendication 8, dans laquelle la surface est une surface (100) du substrat de carbure de silicium cubique.The nanostructure of claim 8, wherein the surface is a surface (100) of the cubic silicon carbide substrate.
10. Nanostructure selon l'une quelconque des revendications 1 à 9, dans laquelle le métal est choisi parmi les métaux dont la bande d est pleine, les métaux alcalins, les métaux de transition, les métaux alcalino-terreux et les terres rares.A nanostructure according to any one of claims 1 to 9, wherein the metal is selected from metals having a solid band, alkali metals, transition metals, alkaline earth metals and rare earths.
11. Nanostructure selon la revendication 10, dans laquelle le métal est l'argent.11. The nanostructure according to claim 10, wherein the metal is silver.
12. Procédé de fabrication d'une nanostructure ayant une résistance différentielle négative, ce procédé étant caractérisé en ce qu'il comprend les étapes suivantes :12. Process for manufacturing a nanostructure having a differential resistance negative, this method being characterized in that it comprises the following steps:
- on forme au moins une structure (4, 8, 12, 26, 32) ou au moins une pluralité de ladite au moins une structure, à la surface d'un substrat de carbure de silicium (2, 24, 30), la structure étant choisie parmi les plots quantiques, les segments atomiques, les lignes atomiques et les agrégats, etat least one structure (4, 8, 12, 26, 32) or at least a plurality of said at least one structure is formed on the surface of a silicon carbide substrate (2, 24, 30), the structure being selected from quantum dots, atomic segments, atomic lines and aggregates, and
- on dépose un métal (6, 14, 28, 34) sur ladite surface, jusqu'à ce que ce métal recouvre au moins la structure ou au moins la pluralité de ladite au moins une structure, ou de la combinaison de deux ou plus de ces structures.a metal (6, 14, 28, 34) is deposited on said surface, until said metal covers at least the structure or at least the plurality of said at least one structure, or the combination of two or more of these structures.
13. Procédé selon la revendication 12, dans lequel chaque structure est un plot quantique (26, 32) .The method of claim 12, wherein each structure is a quantum pad (26, 32).
14. Procédé selon la revendication 12, dans lequel chaque structure est une ligne atomique (4, 8, 12) .The method of claim 12, wherein each structure is an atomic line (4, 8, 12).
15. Procédé selon la revendication 12, dans lequel chaque structure est un segment atomique.The method of claim 12, wherein each structure is an atomic segment.
16. Procédé selon l'une quelconque des revendications 12 à 15, dans lequel l'épaisseur du métal déposé représente une à cinq monocouches atomiques de ce métal. The method of any one of claims 12 to 15, wherein the thickness of the deposited metal is one to five atomic monolayers thereof.
17. Procédé selon l'une quelconque des revendications 12 à 16, dans lequel la ou les structures sont constituées de silicium.17. Method according to any one of claims 12 to 16, wherein the one or more structures consist of silicon.
18. Procédé selon l'une quelconque des revendications 12 à 16, dans lequel la ou les structures sont constituées de carbone.18. The method according to any one of claims 12 to 16, wherein the one or more structures consist of carbon.
19. Procédé selon l'une quelconque des revendications 12 à 18, dans lequel le carbure de silicium a une structure cubique.The method of any one of claims 12 to 18, wherein the silicon carbide has a cubic structure.
20. Procédé selon la revendication 19, dans lequel la surface est une surface (100) du substrat de carbure de silicium cubique.The method of claim 19, wherein the surface is a surface (100) of the cubic silicon carbide substrate.
21. Procédé selon l'une quelconque des revendications 12 à 20, dans lequel le métal est choisi parmi les métaux dont la bande d est pleine, les métaux alcalins, les métaux de transition, les métaux alcalino-terreux et les terres rares.21. The method according to any one of claims 12 to 20, wherein the metal is selected from metals whose d-band is solid, alkali metals, transition metals, alkaline earth metals and rare earths.
22. Procédé selon la revendication 21, dans lequel le métal est l'argent. 22. The method of claim 21, wherein the metal is silver.
EP06777518A 2005-06-30 2006-06-29 Nanostructures with negative differential resistance and method for making same Withdrawn EP1897145A1 (en)

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FR0551848A FR2887866B1 (en) 2005-06-30 2005-06-30 NANOSTRUCTURES WITH DIFFERENTIAL NEGATIVE RESISTANCE AND METHOD OF MANUFACTURING THESE NANOSTRUCTURES
FR0650145A FR2896239B1 (en) 2006-01-16 2006-01-16 NANOSTRUCTURES WITH 0, 1, 2 AND 3 DIMENSIONS, WITH DIFFERENTIAL NEGATIVE RESISTANCE AND METHOD OF MANUFACTURING THESE NANOSTRUCTURES
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