EP1321843B1 - Current source circuit - Google Patents
Current source circuit Download PDFInfo
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- EP1321843B1 EP1321843B1 EP02102824A EP02102824A EP1321843B1 EP 1321843 B1 EP1321843 B1 EP 1321843B1 EP 02102824 A EP02102824 A EP 02102824A EP 02102824 A EP02102824 A EP 02102824A EP 1321843 B1 EP1321843 B1 EP 1321843B1
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- Prior art keywords
- mos field
- effect transistor
- current
- output
- drain
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
- G05F3/262—Current mirrors using field-effect transistors only
Definitions
- the invention relates to a current source circuit, in which a first and a second MOS field effect transistor form a current mirror circuit, wherein the first MOS field effect transistor via a cascode-connected third MOS field-effect transistor a reference current can be supplied and the drain electrode of a with the second MOS field effect transistor in cascode fourth MOS field effect transistor has an output forms.
- a simple current mirror circuit consists of two transistors, in particular MOS field-effect transistors, whose source and gate electrodes are connected to each other are. Further, the gate electrode and the drain electrode of the one transistor are connected to each other connected and are acted upon by a reference current. The drain elec trode of the other MOS field effect transistor can then be the desired output current be removed. However, this is from the other MOS field effect transistor - im following also called output transistor - voltage depends, since its Parameters are voltage-dependent.
- the object of the invention is to provide a current source circuit, which in a large Output voltage range has a high output impedance.
- the extended-drain MOS field-effect transistor is an extended-drain-well-MOS field-effect transistor and that the further MOS field-effect transistor is a p-channel MOS field-effect transistor is.
- the current source circuit according to the invention has the advantage of a high output impedance over a very large output voltage range, the output voltage can exceed the operating voltage allowed for this technology. To reach These properties do not require additional mask steps for special high-voltage transistors needed. Furthermore, the current source circuit according to the invention can also be operated at an output voltage higher than the operating voltage of the rest Circuit is. In addition, the current source circuit according to the invention has a high accuracy of the current mirror ratio in the operating voltage, output voltage and temperature range.
- the current source circuit according to the invention serves as a current mirror when the reference current is supplied from the outside.
- the inventive Current source circuit is also a highly accurate power source.
- the current source circuit according to the invention has the advantage that, in contrast to other known circuits is not destroyed when the output transistor a Voltage is applied while the circuit itself, so the control amplifier and more Circuit elements are not yet supplied with an operating voltage.
- the current source circuit according to the invention has the advantage that they are in highly integrated Standard CMOS technologies can be used. By avoiding the hot-carrier effect At high output voltages also increases the life of the power source scarf tung.
- An advantageous embodiment of the current source circuit according to the invention exists in that at least one diode connected with the further MOS field-effect transistor MOS field effect transistor is connected in series.
- Another advantageous embodiment is designed such that the output of the control amplifier via a resistor to the gate electrode of the fourth MOS field-effect transistor is connected, wherein it is preferably provided that the variable gain amplifier is formed by an operational transconductance amplifier.
- the variable gain amplifier is formed by an operational transconductance amplifier.
- Extended-drain MOS field-effect transistors which also lightly doped drain n-well transistor or lightly doped drift region transistor, for example, are described in: Y.Q. Li, C.A.T. Salama, M. Seufert, M. King “Submicron BiCMOS compatible highvoltage MOS transistor ", ISPSD Proc., 1994, pp. 355-359.
- the transistors are formed as n-channel MOS field-effect transistors.
- a first MOS field effect transistor 1 and a second MOS field effect transistor 2 provide the actual current mirror, the supplied via an input 5, a reference current Iin can be.
- a current mirror circuit is known per se and needs in connection to be explained in detail with the present invention. It is, however briefly mentioned that the output 6 removable current Iout in a by Transistor geometries certain ratio to the reference current Iin stands. To the effect is different high voltages at the input 5 and at the output 6 to reduce a third transistor 3 having a bias voltage applied at 14 and a fourth transistor the first and second transistors in each case in cascode, wherein the MOS field effect transistor 4 in the following also called output transistor.
- an OTA (Operational transconductance amplifier) 7 the two source voltages the cascode transistors 3, 4 compared with each other, whereby a control signal arises, which is supplied via a resistor 8 of the gate electrode of the output transistor 4 becomes.
- a MOS field effect transistor 9 is connected as a capacitance between the output of the OTA 7 and ground potential.
- Embodiment protects the series connection of a p-channel MOS field effect transistor 10 and the two connected as diodes n- or p-channel MOS field effect transistors 11 and 12, the output transistor 4 in the event that a voltage at the output 6 is already present, while the supplied at 13 operating voltage (still) not available is.
- the transistor 10 receives 0V as the gate potential and switches over the MOS field-effect transistors 11, 12, the gate-drain voltage of the output transistor 4 on a value lower than the gate oxide breakdown voltage. This serves the resistance 8 for decoupling the OTA output. After starting the operating voltage at 13 turns off the MOS field effect transistor 10, so that the function of the cascode control is no longer affected.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Amplifiers (AREA)
- Control Of Electrical Variables (AREA)
- Control Of Amplification And Gain Control (AREA)
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
Abstract
Description
Die Erfindung betrifft eine Stromquellenschaltung, bei welcher ein erster und ein zweiter MOS-Feldeffekttransistor eine Stromspiegelschaltung bilden, wobei dem ersten MOS-Feldeffekttransistor über einen in Kaskode geschalteten dritten MOS-Feldeffekttransistor ein Referenzstrom zuführbar ist und die Drain-Elektrode eines mit dem zweiten MOS-Feldeffekttransistor in Kaskode geschalteten vierten MOS-Feldeffekttransistors einen Ausgang bildet.The invention relates to a current source circuit, in which a first and a second MOS field effect transistor form a current mirror circuit, wherein the first MOS field effect transistor via a cascode-connected third MOS field-effect transistor a reference current can be supplied and the drain electrode of a with the second MOS field effect transistor in cascode fourth MOS field effect transistor has an output forms.
Für verschiedene schaltungstechnische Zwecke werden Stromquellen benötigt, die eine möglichst hohe Ausgangsimpedanz aufweisen sollten. Je höher die Ausgangsimpedanz, desto geringer ist die Abhängigkeit des Ausgangsstroms von der anliegenden Spannung.For various circuitry purposes power sources are needed, the one should have the highest possible output impedance. The higher the output impedance, the lower the dependence of the output current on the applied voltage.
Eine einfache Stromspiegelschaltung besteht aus zwei Transistoren, insbesondere MOS-Feldeffekttransistoren, deren Source- und Gate-Elektroden jeweils miteinander verbunden sind. Ferner sind die Gate-Elektrode und die Drain-Elektrode des einen Transistors miteinander verbunden und werden von einem Referenzstrom beaufschlagt. Der Drain-Elek trode des anderen MOS-Feldeffekttransistors kann dann der gewünschte Ausgangsstrom entnommen werden. Dieser ist jedoch von der am anderen MOS-Feldeffekttransistor - im folgenden auch Ausgangstransistor genannt - anliegenden Spannung abhängig, da dessen Parameter spannungsabhängig sind.A simple current mirror circuit consists of two transistors, in particular MOS field-effect transistors, whose source and gate electrodes are connected to each other are. Further, the gate electrode and the drain electrode of the one transistor are connected to each other connected and are acted upon by a reference current. The drain elec trode of the other MOS field effect transistor can then be the desired output current be removed. However, this is from the other MOS field effect transistor - im following also called output transistor - voltage depends, since its Parameters are voltage-dependent.
Eine Verminderung dieser Abhängigkeiten ist mit Kaskode-Schaltungen möglich, wie sie beispielsweise in US 5,844,434 dargestellt sind. Zur weiteren Stabilisierung des Stroms ist es beispielsweise aus JP 0060061859 AA bekanntgeworden, die Source-Elektrode des Ausgangstransistors durch Steuerung der Gate-Elektrode auf konstantes Potential zu regeln. Damit wird die Ausgangsimpedanz gegenüber einer einfachen Kaskode-Schaltung um die Schleifenverstärkung erhöht. A reduction of these dependencies is possible with cascode circuits, as they are For example, in US 5,844,434 are shown. To further stabilize the flow is For example, it has become known from JP 0060061859 AA, the source electrode of the output transistor by controlling the gate electrode to constant potential. Thus, the output impedance compared to a simple cascode circuit to the Loop gain increased.
Weiterhin ist aus dem nächstliegenden Stand der Technik US5612614, US5847556 und EP0403195 bekannt, dass in einer solchen Stromquellenanordnung die Source-Elektroden eines dritten und eines vierten MOS-Feldeffektransistors an Eingänge eines Regelverstärkers angeschlossen sind, dessen Ausgang mit der Gate-Elektrode des vierten MOS-Feldeffektransistor verbunden ist. Aus US4199733 ist es weiterhin bekannt in einer Stromspiegelschaltung als Spiegeltransistoren Extended-Drain-Mos Feldeffektransistoren zu verwenden. Diese hohe Ausgangsimpedanz steht bei Realisierung in einem Sub-micron-Prozess jedoch nur in einem begrenzten Ausgangsspannungsbereich zur Verfügung. Bei höheren Ausgangsspannungen fließt aufgrund des Hot-carrier-Effekts ein Substratstrom direkt vom Drain des Kaskode-Transistors zum Substrat. Dieser Substratstrom wird durch die Regelung nicht beeinflußt und führt zu einer drastischen Verringerung der Ausgangsimpedanz. Selbst durch höhere Kanallänge des Ausgangstransistors läßt sich die Reduktion der Ausgangsimpedanz nur geringfügig kompensieren.Furthermore, from the closest prior art US5612614, US5847556 and EP0403195 known that in such Current source arrangement, the source electrodes of a third and a fourth MOS field effect transistor connected to inputs of a control amplifier whose output is connected to the gate electrode of the fourth MOS field effect transistor connected is. From US4199733 it is also known in a current mirror circuit as mirror transistors Extended-Drain-Mos Field effect transistors to use. However, this high output impedance is available when implemented in a sub-micron process only available in a limited output voltage range. At higher output voltages due to the hot-carrier effect, a substrate current flows directly from the Drain of the cascode transistor to the substrate. This substrate current is governed by the scheme is not affected and leads to a drastic reduction of the output impedance. Even by higher channel length of the output transistor, the reduction of the output impedance can be only slightly compensate.
Aufgabe der Erfindung ist es, eine Stromquellenschaltung anzugeben, die in einem großen Ausgangsspannungsbereich eine hohe Ausgangsimpedanz aufweist.The object of the invention is to provide a current source circuit, which in a large Output voltage range has a high output impedance.
Diese Aufgabe wird erfindungsgemäß dadurch gelöst, dass dass die Drain-Elektrode und die Gate-Elektrode des vierten MOS-Feldeffekttransistors über einen weiteren MOS-Feldeffekttransistor miteinander verbunden sind, dessen Gate-Elektrode mit einer Betriebsspannung für die Schaltung beaufschlagt ist.This object is achieved in that that the drain and the gate of the fourth MOS field effect transistor via another MOS field effect transistor connected together are whose gate electrode applied to an operating voltage for the circuit is.
Da die eingangs genannten Probleme bei n-Kanal-MOS-Feldeffekttransistoren wesentlich gravierender auftreten, ist eine Ausgestaltung der Erfindung derart besonders vorteilhaft, dass der Extended-drain-MOS-Feldeffekttransistor ein Extended-drain-n-well-MOS-Feldeffekttransistor ist und dass der weitere MOS-Feldeffekttransistor ein p-Kanal-MOS-Feldeffekttransistor ist.Since the problems mentioned in n-channel MOS field effect transistors essential occur more seriously, an embodiment of the invention is particularly advantageous, the extended-drain MOS field-effect transistor is an extended-drain-well-MOS field-effect transistor and that the further MOS field-effect transistor is a p-channel MOS field-effect transistor is.
Die erfindungsgemäße Stromquellenschaltung weist den Vorteil einer hohen Ausgangsimpedanz über einen sehr großen Ausgangsspannungsbereich auf, wobei die Ausgangsspannung die für diese Technologie zulässige Betriebsspannung überschreiten kann. Zum Erreichen dieser Eigenschaften werden keine zusätzlichen Maskenschritte für spezielle Hochvolttransistoren benötigt. Ferner kann die erfindungsgemäße Stromquellenschaltung auch bei einer Ausgangsspannung betrieben werden, die höher als die Betriebsspannung der übrigen Schaltung ist. Außerdem weist die erfindungsgemäße Stromquellenschaltung eine hohe Genauigkeit des Stromspiegelverhältnisses im Betriebsspannungs-, Ausgangsspannungs- und Temperaturbereich auf.The current source circuit according to the invention has the advantage of a high output impedance over a very large output voltage range, the output voltage can exceed the operating voltage allowed for this technology. To reach These properties do not require additional mask steps for special high-voltage transistors needed. Furthermore, the current source circuit according to the invention can also be operated at an output voltage higher than the operating voltage of the rest Circuit is. In addition, the current source circuit according to the invention has a high accuracy of the current mirror ratio in the operating voltage, output voltage and temperature range.
Die erfindungsgemäße Stromquellenschaltung dient als Stromspiegel, wenn der Referenzstrom von außen zugeführt wird. Mit einer internen Referenzstromquelle stellt die erfindungsgemäße Stromquellenschaltung auch eine hochgenaue Stromquelle dar.The current source circuit according to the invention serves as a current mirror when the reference current is supplied from the outside. With an internal reference current source, the inventive Current source circuit is also a highly accurate power source.
Neben der hohen Ausgangsimpedanz in einem großen Ausgangsspannungsbereich weist die erfindungsgemäße Stromquellenschaltung den Vorteil auf, dass sie im Gegensatz zu anderen bekannten Schaltungen nicht zerstört wird, wenn am Ausgangstransistor eine Spannung anliegt, während die Schaltung selbst, also der Regelverstärker und weitere Schaltungselemente noch nicht mit einer Betriebsspannung versorgt werden. Schließlich hat die erfindungsgemäße Stromquellenschaltung den Vorteil, dass sie in hochintegrierten Standard-CMOS-Technologien einsetzbar ist. Durch die Vermeidung des Hot-carrier-Effekts bei hohen Ausgangsspannungen erhöht sich außerdem die Lebensdauer der Stromquellenschal tung.In addition to the high output impedance in a large output voltage range points the current source circuit according to the invention has the advantage that, in contrast to other known circuits is not destroyed when the output transistor a Voltage is applied while the circuit itself, so the control amplifier and more Circuit elements are not yet supplied with an operating voltage. After all the current source circuit according to the invention has the advantage that they are in highly integrated Standard CMOS technologies can be used. By avoiding the hot-carrier effect At high output voltages also increases the life of the power source scarf tung.
Eine vorteilhafte Ausgestaltung der erfindungsgemäßen Stromquellenschaltung besteht darin, dass mit dem weiteren MOS-Feldeffekttransistor mindestens ein als Diode geschalteter MOS-Feldeffekttransistor in Reihe geschaltet ist.An advantageous embodiment of the current source circuit according to the invention exists in that at least one diode connected with the further MOS field-effect transistor MOS field effect transistor is connected in series.
Eine andere vorteilhafte Ausgestaltung ist derart ausgebildet, dass der Ausgang des Regelverstärkers über einen Widerstand mit der Gate-Elektrode des vierten MOS-Feldeffekttransistors verbunden ist, wobei vorzugsweise vorgesehen ist, dass der Regelverstärker von einem Operational-transconductance-amplifier gebildet ist. Bei dieser Ausgestaltung wird vermieden, dass für den Fall einer Spannung am Ausgangstransistor, die höher als die Betriebsspannung ist, der von dem weiteren MOS-Feldeffekttransistor zur Gate-Elektrode geleitete Strom durch ausgangsseitig im Regelverstärker befindliche Dioden kurzgeschlossen wird. Another advantageous embodiment is designed such that the output of the control amplifier via a resistor to the gate electrode of the fourth MOS field-effect transistor is connected, wherein it is preferably provided that the variable gain amplifier is formed by an operational transconductance amplifier. In this embodiment it is avoided that in the case of a voltage at the output transistor, the higher as the operating voltage, that of the further MOS field-effect transistor to the gate electrode guided current through the output side located in the variable gain diodes shorted.
Extended-drain-MOS-Feldeffekttransistoren, die auch lightly doped drain n-well transistor oder lightly doped drift region transistor genannt werden, sind beispielsweise beschrieben in: Y.Q. Li, C.A.T. Salama, M. Seufert, M. King "Submicron BiCMOS compatible highvoltage MOS transistors", ISPSD Proc., 1994, pp. 355-359.Extended-drain MOS field-effect transistors, which also lightly doped drain n-well transistor or lightly doped drift region transistor, for example, are described in: Y.Q. Li, C.A.T. Salama, M. Seufert, M. King "Submicron BiCMOS compatible highvoltage MOS transistor ", ISPSD Proc., 1994, pp. 355-359.
Ein Ausführungsbeispiel der Erfindung ist in der Zeichnung dargestellt und in der nachfolgenden Beschreibung näher erläutert. Dabei sind - von näher angegebenen Ausnahmen abgesehen, die Transistoren als n-Kanal-MOS-Feldeffekttransistoren ausgebildet.An embodiment of the invention is shown in the drawing and in the following Description explained in more detail. Apart from exceptions specified above, the transistors are formed as n-channel MOS field-effect transistors.
Ein erster MOS-Feldeffekttransistor 1 und ein zweiter MOS-Feldeffekttransistor 2 stellen
den eigentlichen Stromspiegel dar, dem über einen Eingang 5 ein Referenzstrom Iin zugeführt
werden kann. Eine Stromspiegelschaltung ist an sich bekannt und braucht im Zusammenhang
mit der vorliegenden Erfindung nicht näher erläutert zu werden. Es sei jedoch
kurz erwähnt, dass der dem Ausgang 6 entnehmbare Strom Iout in einem durch
Transistorgeometrien bestimmten Verhältnis zum Referenzstrom Iin steht. Um die Wirkung
verschieden hoher Spannungen am Eingang 5 und am Ausgang 6 zu vermindern, ist
ein dritter Transistor 3 mit einer bei 14 zugeführten Vorspannung und ein vierter Transistor
dem ersten und zweiten Transistor jeweils in Kaskode zugeschaltet, wobei der MOS-Feldeffekttransistor
4 im folgenden auch Ausgangstransistor genannt wird. Außerdem werden
in einem OTA (Operational-transconductance-amplifier) 7 die beiden Source-Spannungen
der Kaskode-Transistoren 3, 4 miteinander verglichen, wodurch ein Steuersignal
entsteht, das über einen Widerstand 8 der Gate-Elektrode des Ausgangstransistors 4 zugeführt
wird. Zur Dämpfung der Schwingneigung der Regelschleife ist ein MOS-Feldeffekttransistor
9 als Kapazität zwischen den Ausgang des OTA 7 und Massepotential geschaltet.A first MOS field effect transistor 1 and a second MOS field effect transistor 2 provide
the actual current mirror, the supplied via an input 5, a reference current Iin
can be. A current mirror circuit is known per se and needs in connection
to be explained in detail with the present invention. It is, however
briefly mentioned that the output 6 removable current Iout in a by
Transistor geometries certain ratio to the reference current Iin stands. To the effect
is different high voltages at the input 5 and at the output 6 to reduce
a
Der Trend moderner CMOS-Technologien geht zu weiterer Verringerung der Transistorabmessungen
und Verringerung der Gate-oxide-Dicke der Transistoren. Damit verbunden
ist eine Reduzierung der Versorgungsspannung solcher in Deep-submicron-Technologie
gefertigter Chips. In bestimmten Applikationen, wie zum Beispiel Interface mit Chips höherer
Versorgungsspannung oder Ansteuerung von Leistungstreibern, ist es erforderlich,
dass die Ausgangsstufe eine höhere Spannung als die eigene, für diese Technologie zulässige
Versorgungsspannung annehmen kann. Für solche "High-voltage"-Applikationen stellt dabei
die Lebensdauer der in der Ausgangsstufe zum Einsatz kommenden Transistoren das
Hauptproblem dar.
Durch den Einsatz eines Extended-drain-Transistors wird bei geeigneter Dimensionierung
der n-Well-drift-region eine hohe Lebensdauer bis zur maximalen Ausgangsspannung erzielt.
Ein Gate-oxide-breakdown wird unter allen Bedingungen durch die Transistorkombination
10, 11, 12 verhindert.The trend of modern CMOS technologies is to further reduce transistor dimensions and reduce the gate oxide thickness of the transistors. Associated with this is a reduction in the supply voltage of such chips fabricated in deep submicron technology. In certain applications, such as interface with chips of higher supply voltage or control of power drivers, it is necessary that the output stage can assume a higher voltage than its own, permissible for this technology supply voltage. The lifetime of the transistors used in the output stage represents the main problem for such "high-voltage" applications.
By using an extended-drain transistor, a long service life up to the maximum output voltage is achieved with suitable dimensioning of the n-well drift region. A gate oxide breakdown is prevented under all conditions by the
In Schaltungssystemen mit unterschiedlichen Spannungsversorgungen kann es vorkommen,
dass die Spannungsversorgung nach dem Starten bereits den maximalen Spannungswert
erreicht hat, eine andere Spannungsversorgung aber noch nicht vorhanden ist. Für
diesen Betriebszustand ist ein sogenannter Fail-save-mode erforderlich. Bei dem dargestellten
Ausführungsbeispiel schützt die Reihenschaltung aus einem p-Kanal-MOS-Feldeffekttransistor
10 und den beiden als Dioden geschalteten n- bzw. p-Kanal-MOS-Feldeffekttransistoren
11 und 12 den Ausgangstransistor 4 für den Fall, dass eine Spannung am Ausgang
6 bereits anliegt, während die bei 13 zugeführte Betriebsspannung (noch) nicht vorhanden
ist. Der Transistor 10 erhält dabei als Gate-Potential 0V und schaltet über die
MOS-Feldeffekttransistoren 11, 12 die Gate-drain-Spannung des Ausgangstransistors 4 auf
einen Wert, der unter der Gate-oxide-Durchbruchsspannung liegt. Dabei dient der Widerstand
8 zur Entkopplung des OTA-Ausgangs. Nach dem Aufstarten der Betriebsspannung
bei 13 schaltet der MOS-Feldeffekttransistor 10 ab, so dass die Funktion der Kaskode-Regelung
nicht mehr beeinflußt wird.In circuit systems with different power supplies it can happen
that the power supply already has the maximum voltage value after starting
has reached another power supply but not yet available. For
This operating state requires a so-called fail-save mode. In the illustrated
Embodiment protects the series connection of a p-channel MOS
Claims (5)
- A current-source circuit in which a first and a second MOS field-effect transistor form a current mirror circuit, wherein a reference current can be supplied to the first MOS field-effect transistor via a third MOS field-effect transistor connected in cascode, the drain electrode of a fourth MOS field-effect transistor connected in cascode to the second MOS field-effect transistor forms an output, and the source electrodes of the third (3) and the fourth (4) MOS field-effect transistors are connected to inputs of an automatic gain control amplifier (7), whose output is connected to the gate electrode of the fourth MOS field-effect transistor (4), characterized in that the fourth MOS field-effect transistor (4) is an extended-drain MOS field-effect transistor and in that the drain electrode and the gate electrode of the fourth MOS field-effect transistor (4) are connected to one another via a further MOS field-effect transistor (10) whose gate electrode is acted on by an operating voltage for the circuit.
- A current-source circuit as claimed in claim 1, characterized in that the extended-drain MOS field-effect transistor is an extended-drain n-well MOS field-effect transistor (4) and in that the further MOS field-effect transistor is a p-channel MOS field-effect transistor (10).
- A current-source circuit as claimed in claim 2, characterized in that at least one MOS field-effect transistor (11, 12) connected as a diode is connected in series with the further MOS field-effect transistor (10).
- A current-source circuit as claimed in any one of the preceding claims, characterized in that the output of the automatic gain control amplifier (7) is connected to the gate electrode of the fourth MOS field-effect transistor (4) via a resistor (8).
- A current-source circuit as claimed in any one of the preceding claims, characterized in that the automatic gain control amplifier is formed by an operational transconductance amplifier (7).
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10163633A DE10163633A1 (en) | 2001-12-21 | 2001-12-21 | Current source circuit |
DE10163633 | 2001-12-21 |
Publications (2)
Publication Number | Publication Date |
---|---|
EP1321843A1 EP1321843A1 (en) | 2003-06-25 |
EP1321843B1 true EP1321843B1 (en) | 2005-12-14 |
Family
ID=7710634
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP02102824A Expired - Lifetime EP1321843B1 (en) | 2001-12-21 | 2002-12-19 | Current source circuit |
Country Status (5)
Country | Link |
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US (1) | US6690229B2 (en) |
EP (1) | EP1321843B1 (en) |
JP (1) | JP4157928B2 (en) |
AT (1) | ATE313109T1 (en) |
DE (2) | DE10163633A1 (en) |
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FR2796781A1 (en) * | 1999-07-20 | 2001-01-26 | St Microelectronics Sa | DIMENSIONING OF AN ELECTROMAGNETIC TRANSPONDER SYSTEM FOR HYPERPROXIMITY OPERATION |
FR2804557B1 (en) * | 2000-01-31 | 2003-06-27 | St Microelectronics Sa | ADAPTING THE TRANSMISSION POWER OF AN ELECTROMAGNETIC TRANSPONDER DRIVE |
FR2808946A1 (en) * | 2000-05-12 | 2001-11-16 | St Microelectronics Sa | VALIDATION OF THE PRESENCE OF AN ELECTROMAGNETIC TRANSPONDER IN THE FIELD OF A READER |
FR2808945B1 (en) * | 2000-05-12 | 2002-08-16 | St Microelectronics Sa | EVALUATION OF THE NUMBER OF ELECTROMAGNETIC TRANSPONDERS IN THE FIELD OF A READER |
FR2808941B1 (en) * | 2000-05-12 | 2002-08-16 | St Microelectronics Sa | VALIDATION OF THE PRESENCE OF AN ELECTROMAGNETIC TRANSPONDER IN THE FIELD OF AN AMPLITUDE DEMODULATION READER |
FR2809235A1 (en) * | 2000-05-17 | 2001-11-23 | St Microelectronics Sa | ANTENNA FOR GENERATING AN ELECTROMAGNETIC FIELD FOR TRANSPONDER |
FR2809251B1 (en) * | 2000-05-17 | 2003-08-15 | St Microelectronics Sa | DEVICE FOR PRODUCING AN ELECTROMAGNETIC FIELD FOR A TRANSPONDER |
FR2812986B1 (en) * | 2000-08-09 | 2002-10-31 | St Microelectronics Sa | DETECTION OF AN ELECTRIC SIGNATURE OF AN ELECTROMAGNETIC TRANSPONDER |
US20030169169A1 (en) * | 2000-08-17 | 2003-09-11 | Luc Wuidart | Antenna generating an electromagnetic field for transponder |
US7071785B2 (en) * | 2003-10-22 | 2006-07-04 | Broadcom Corporation | Use of a thick oxide device as a cascode for a thin oxide transcoductance device in MOSFET technology and its application to a power amplifier design |
US7049894B1 (en) | 2004-02-27 | 2006-05-23 | Marvell International Ltd. | Ahuja compensation circuit with enhanced bandwidth |
US7071769B1 (en) | 2004-02-27 | 2006-07-04 | Marvell International Ltd. | Frequency boosting circuit for high swing cascode |
US7425862B2 (en) * | 2004-08-10 | 2008-09-16 | Avago Technologies Ecbu Ip (Singapore) Pte Ltd | Driver circuit that employs feedback to enable operation of output transistor in triode region and saturation region |
KR100688803B1 (en) * | 2004-11-23 | 2007-03-02 | 삼성에스디아이 주식회사 | Current range control circuit, data driver and light emitting display |
JP5078502B2 (en) * | 2007-08-16 | 2012-11-21 | セイコーインスツル株式会社 | Reference voltage circuit |
JP4408935B2 (en) * | 2008-02-07 | 2010-02-03 | 日本テキサス・インスツルメンツ株式会社 | Driver circuit |
CN102455727B (en) * | 2010-10-28 | 2013-10-23 | 南京航空航天大学 | Current control circuit with rang of 100pA-1muA |
CN108683167B (en) * | 2018-07-03 | 2024-04-09 | 苏州锴威特半导体股份有限公司 | Anti-surge circuit of PD equipment |
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Publication number | Priority date | Publication date | Assignee | Title |
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GB2012481B (en) * | 1978-01-09 | 1982-04-07 | Rca Corp | Egfet mirrors |
GB8913439D0 (en) * | 1989-06-12 | 1989-08-02 | Inmos Ltd | Current mirror circuit |
JP3499250B2 (en) | 1992-08-10 | 2004-02-23 | 株式会社ルネサステクノロジ | Semiconductor integrated circuit device and A / D conversion circuit |
US5680037A (en) * | 1994-10-27 | 1997-10-21 | Sgs-Thomson Microelectronics, Inc. | High accuracy current mirror |
US5694072A (en) * | 1995-08-28 | 1997-12-02 | Pericom Semiconductor Corp. | Programmable substrate bias generator with current-mirrored differential comparator and isolated bulk-node sensing transistor for bias voltage control |
US5612614A (en) * | 1995-10-05 | 1997-03-18 | Motorola Inc. | Current mirror and self-starting reference current generator |
KR100202635B1 (en) * | 1995-10-13 | 1999-06-15 | 구본준 | Resurf edmos transistor and high voltage analog multiplex circuit using the same |
US5844434A (en) | 1997-04-24 | 1998-12-01 | Philips Electronics North America Corporation | Start-up circuit for maximum headroom CMOS devices |
US5847556A (en) * | 1997-12-18 | 1998-12-08 | Lucent Technologies Inc. | Precision current source |
US6087820A (en) * | 1999-03-09 | 2000-07-11 | Siemens Aktiengesellschaft | Current source |
US6381491B1 (en) * | 2000-08-18 | 2002-04-30 | Cardiac Pacemakers, Inc. | Digitally trimmable resistor for bandgap voltage reference |
US6466081B1 (en) * | 2000-11-08 | 2002-10-15 | Applied Micro Circuits Corporation | Temperature stable CMOS device |
-
2001
- 2001-12-21 DE DE10163633A patent/DE10163633A1/en not_active Withdrawn
-
2002
- 2002-12-18 US US10/323,352 patent/US6690229B2/en not_active Expired - Lifetime
- 2002-12-18 JP JP2002366385A patent/JP4157928B2/en not_active Expired - Fee Related
- 2002-12-19 DE DE50205270T patent/DE50205270D1/en not_active Expired - Lifetime
- 2002-12-19 EP EP02102824A patent/EP1321843B1/en not_active Expired - Lifetime
- 2002-12-19 AT AT02102824T patent/ATE313109T1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
JP2003223232A (en) | 2003-08-08 |
DE10163633A1 (en) | 2003-07-10 |
EP1321843A1 (en) | 2003-06-25 |
DE50205270D1 (en) | 2006-01-19 |
US6690229B2 (en) | 2004-02-10 |
JP4157928B2 (en) | 2008-10-01 |
US20030117210A1 (en) | 2003-06-26 |
ATE313109T1 (en) | 2005-12-15 |
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