EP1062698A1 - Electronic semiconductor module - Google Patents

Electronic semiconductor module

Info

Publication number
EP1062698A1
EP1062698A1 EP99967900A EP99967900A EP1062698A1 EP 1062698 A1 EP1062698 A1 EP 1062698A1 EP 99967900 A EP99967900 A EP 99967900A EP 99967900 A EP99967900 A EP 99967900A EP 1062698 A1 EP1062698 A1 EP 1062698A1
Authority
EP
European Patent Office
Prior art keywords
heat sink
semiconductor module
insulating layer
metallic heat
module according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP99967900A
Other languages
German (de)
French (fr)
Inventor
Gerhard Koelle
Wolfgang Jacob
Harald Tschentscher
Stephan Rees
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of EP1062698A1 publication Critical patent/EP1062698A1/en
Ceased legal-status Critical Current

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    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
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Definitions

  • the invention relates to an electronic semiconductor module with the features specified in the preamble of claim 1.
  • IMS substrate insulated metal substrate
  • carrier substrate which consists of a metal plate serving as a heat sink, which has an electrically insulating top surface
  • the insulating layer has good thermal conductivity and consists, for example, of a thin polymer layer into which a ceramic powder has been introduced to improve heat dissipation.
  • conductor tracks are formed on the upper side of the substrate.
  • Electronic semiconductor components are fitted on the top and electrically connected to the conductor tracks via bond wires.
  • the advantage of using an IMS substrate can be seen in particular in the good heat dissipation of the heat generated by the semiconductor component to the metallic heat sink by means of the relatively thin and good heat-conducting, insulating layer.
  • DCB substrates direct copper bonded
  • the DCB substrates consist of a relatively thick ceramic carrier, on the top and bottom of which a thin metal layer is applied in a special pressing process.
  • the upper metal layer is provided with conductor tracks by structuring.
  • Semiconductor components are connected to the conductor tracks on the top of the module via bond wires.
  • a thick metal plate serving as a heat sink is soldered onto the lower metal layer of the carrier substrate. From EP 0 508 717 AI it is also known to provide the metal plate with cooling channels through which a cooling medium flows.
  • a disadvantage of the DCB substrates compared to the IMS substrates is in particular the thick ceramic layer, which makes the heat transfer to the heat sink difficult.
  • a disadvantage of the known semiconductor modules described above is that all the connecting lines of the semiconductor components are formed on the upper side of the carrier substrate.
  • the conductor track in this one position is very expensive.
  • the substrate which is in any case expensive, must therefore be enlarged laterally in order to be able to accommodate the entire necessary conductor track wiring on the upper side of the carrier substrate.
  • the manufacturing costs are increased considerably.
  • the arrangement of all the connecting lines in the upper metal layer of the substrate results in large parasitic inductances which lead to very large overvoltages. This has a particularly disadvantageous effect if power electro- African circuits with a DC voltage circuit are arranged.
  • the parasitic inductances cause undesired overvoltages, which must be taken into account when selecting the semiconductor components. For example, the disconnection process of an electronic circuit breaker must be slowed down by suitable measures in order to reduce the overvoltages and to avoid damage to the semiconductor module.
  • An IMS substrate is used as the carrier substrate of the semiconductor module, the insulating intermediate layer of the IMS substrate being provided with at least one cutout and at least one contact surface of the semiconductor component provided on the upper side of a semiconductor component facing away from the carrier substrate being electrically connected to a contact element, which is contacted through the recess directly on the metallic heat sink.
  • the heat sink is used as an electrical conductor, which is electrically connected directly to the connection of a semiconductor component via the contact element, allows the parasitic inductances of the semiconductor module to be significantly reduced.
  • the wiring of the conductor track is made easier since the metallic heat sink also serves as a conductor for supplying the energy required to operate the semiconductor component. Due to the very thin electrically insulating layer or the very thin dielectric between the heat sink and the conductor tracks on the top of the substrate, the parasitic tary inductivities further reduced and at the same time a very fast and efficient heat dissipation to the heat sink is achieved.
  • the contact element can advantageously be produced as a bond wire connected to the connection of the semiconductor component on the one hand and the metallic heat sink on the other.
  • the bonding wire technology is well mastered and the direct contacting of the bonding wire on the heat sink only requires the formation of small cutouts in the insulating intermediate layer, which can be carried out inexpensively with a laser.
  • the metallic heat sink can advantageously be provided as a potential area for providing the supply potential required for operating the semiconductor component, in particular the ground potential.
  • the thickness of the insulation layer less than 250 ⁇ m.
  • a particularly efficient heat dissipation can be achieved by coupling the metallic heat sink with a cooling medium. It is particularly advantageous if the metallic heat sink of the IMS substrate is provided with cooling channels through which the cooling medium flows.
  • FIG. 2 shows a first exemplary embodiment of a semiconductor module according to the invention
  • FIG. 3 shows a second exemplary embodiment of a semiconductor module according to the invention
  • FIG. 4 shows a circuit diagram for the semiconductor module of a buck converter shown in FIGS. 1, 2 and 3.
  • a DCB substrate (direct copied bonded) is used as carrier substrate 1, which comprises an approximately one millimeter thick ceramic layer 2, which is coated on its top and bottom with approximately 300 ⁇ m thick metal layers 4, 5 of copper .
  • IMS substrates insulated metal substrates
  • Conductor tracks 4a, 4b, 4c are formed in the upper metal layer 4 by structuring.
  • Unhoused semiconductor components 20, 21, for example MOSFETS, power diodes, IGBTs or bipolar transistors, are applied to the metal layer 4.
  • Connections (not shown) on the underside of the semiconductor components 20, 21 are, for example, with the conductor tracks 4a, 4c electrically connected by soldering the unhoused semiconductor components 20, 21.
  • the semiconductor components are electrically connected to further conductor tracks 4b, 4c via bond wires 11, 14, which contact pads 22, 23 on the upper side of the semiconductor components.
  • a metal heat sink 3 made of, for example, copper is soldered onto the metal layer 5 on the underside of the carrier substrate 1.
  • the heat sink 3 contacts with its underside a cooling medium 10, for example a cooling liquid.
  • Further electrical components, such as a capacitor 30, are connected to the conductor tracks 4a, 4b via line connections 40, 41 and metal bridges 42, 43.
  • a circuit diagram of the buck converter is shown in FIG. 4, the electrical and electronic components of the semiconductor module being shown within the dash-dotted line 50.
  • the connection B + of the operating potential is present on the conductor track 4a in FIG. 1, the connection B- on the conductor track 4b.
  • the phase connection P is connected to the conductor track 4c.
  • the semiconductor component 21 is a power switch, for example a MOSFET, and the component 20 is a semiconductor diode. If the circuit breaker 21 is switched off, the current commutates from the MOSFET 21 to the diode 20.
  • U MOSFET U 1 - (L ) + L 2 + L 4 + L 5 + L 6 + L 7 ) - - i- and —- l ⁇ 0, dt dt
  • Ui is applied to the semiconductor module between the conductor tracks 4a and 4b DC link voltage is and L x to L 7 represent occurring parasitic inductances.
  • the voltage drops at the parasitic inductances L to L 7 when switched off at the MOSFET cause an overvoltage that is greater than the intermediate circuit voltage U x .
  • the switch-off process must therefore be slowed down by additional measures so that the maximum reverse voltage of the MOSFET is not exceeded.
  • the parasitic inductances shown in FIG. 4 can be directly assigned to the structure of the semiconductor module in FIG. 1.
  • the parasitic inductance L x is formed by the electrical connecting line 40 of the positive pole 32 of the intermediate circuit capacitor 30.
  • the parasitic inductance L 2 is formed by the connecting bracket 43 and the conductor track 4a.
  • the parasitic inductances L 3 and L s are caused by the electrical line connection from the MOSFET 21 to the semiconductor diode 20, that is to say by the bond wire 11 and the conductor track 4c.
  • the parasitic inductance L 6 is caused by the conductor track 4b and the connecting bracket 42 and the parasitic inductance L 7 by the connecting line 41 of the intermediate circuit capacitor 30.
  • the parasitic inductance L 4 for the connection of the one labeled P cannot be seen in FIG Contact to the conductor track 4c.
  • the inductivities x and L 7 can be reduced somewhat, but as can be seen in FIG. 1, there is between the B + connection and the B connection of the semiconductor module , that is, a very large area spanned between the connecting brackets 43 and 42, which leads to large values for the parasitic inductances L 2 and L 6 , which cannot be significantly reduced by optimizing the structure.
  • an IMS substrate known per se is used as the carrier substrate 1 for the semiconductor module, which substrate comprises a metallic heat sink 3 of several millimeters thick, for example made of aluminum, on the upper side of which an electrically insulating layer 2 is applied.
  • the electrically insulating layer in this example is 140 ⁇ m thick and should not be thicker than 250 ⁇ m.
  • the insulating layer preferably consists of a polymer into which ceramic particles that are good heat conductors are introduced.
  • An approximately 300 ⁇ m thick metal layer 4 made of, for example, copper is applied to the insulating layer 2, in which conductor tracks 4a, 4c are formed in a known manner by structuring.
  • the metallic heat sink 3 is in thermal contact on its underside with a cooling medium 10.
  • Unhoused semiconductor components 20, 21 are applied to the metal layer 4.
  • the semiconductor component 21 is a MOSFET and the semiconductor component 20 is a semiconductor diode.
  • an IBGT, a bipolar transistor or another semiconductor component can also be used in another circuit construction.
  • a switchable Power semiconductors for example a bipolar transistor, a MOSFET or an IGBT can be used.
  • the MOSFET 21 is in electrical contact with the conductor track 4a on the underside.
  • two connection surfaces 23 are arranged, of which only one is shown in FIG. 2.
  • the connection surface 23 is contacted with a bonding wire 11, which is connected at its other end to the conductor track 4c.
  • the semiconductor diode 20 has on its underside a first connection surface which is electrically connected to the conductor track 4c.
  • a second connection surface 22 of the semiconductor diode 20 is arranged on the side of the semiconductor diode facing away from the carrier substrate 1 and is connected to a contact element designed as a bond wire 12.
  • the bond wire 12 is electrically connected directly to the heat sink 3 through the gap between the conductor tracks 4c and 4a and through a cutout 13 made in the insulating layer 2.
  • a direct connection is understood here to mean a connection without intermediate connection of other components.
  • the recess 13 has a diameter of, for example, 3 mm and can be easily introduced into the insulating layer 2 using a laser. In contrast to a DCB substrate, the stability of the carrier substrate 1 is ensured by the metal plate 3 and therefore not reduced by the cutout 13 made in the insulating layer 2.
  • the positive pole 32 of an intermediate circuit capacitor 30 is connected to the conductor track 4a on the upper side of the carrier substrate 1 by a recess 33 provided in the heat sink 3 and the insulating layer 2, for example by screws or rivets.
  • the negative pole 31 of the intermediate circuit capacitor 30 is connected to the heat sink 3.
  • the supply potential B + is connected to the conductor track 4a and the ground potential B- to the heat sink 3.
  • a connection of the power semiconductor components is often to be connected to ground potential, so that the heat sink 3 can be connected directly to the B potential without an insulating intermediate layer.
  • the heat sink 3 As a conductor for supplying the ground potential B-, the area spanned between the potentials B + and B- is greatly reduced in comparison to the known semiconductor modules from FIG. 1 and the parasitic inductances L 2 and L 6 are considerably reduced.
  • the upper metal layer 4 almost only carries the potential B +. Only the area for the conductor track 4c and the gap between the conductor tracks need to be left out.
  • the very thin insulating layer 2 also ensures that the parasitic inductances L x and L 7 are also much stronger than through the intermediate circuit busbar of the semiconductor module in FIG
  • Fig. 1 can be reduced.
  • Another advantage of the semiconductor module according to the invention is that the heat generated by the semiconductor components 20, 21 is given off very quickly to the heat sink 3 by the thin and good heat-conducting, insulating layer 2 and is transferred from there to the cooling medium 10.
  • the insulating layer 2 is provided with recesses at further points and the components concerned are contacted with the heat sink via a bond wire passed through the recess.
  • the ground connection of all components can thus advantageously be realized by the common heat sink 3. This considerably facilitates the conductor track routing on the upper side of the substrate.
  • FIG. 3 shows a further exemplary embodiment of the semiconductor module according to the invention.
  • the same parts are identified with the same reference numbers.
  • the cooling body 3 is provided in FIG. 3 with meandering cooling channels 15 through which the cooling medium 10 flows. This leads to an even better dissipation of the heat.
  • the use of the semiconductor module according to the invention is in no way limited to the application case of a buck converter shown above. Rather, the semiconductor module can also be used in other power electronic circuit topologies with a DC voltage circuit to reduce the parasitic inductances and to improve the heat dissipation.

Abstract

In order to improve the dissipation of heat and to reduce parasitic inductivities in an electronic semiconductor module that consists of a carrier substrate (1) with an electrically insulating layer (2), a metal layer (4) arranged on the top surface of the insulating layer whereby strip conductors (4a) are configured inside said metal layer, and a metal cooling body (3) that is placed on the bottom side of the insulating layer, in addition to at least one semiconductor element arranged on the carrier substrate, the electrically insulating layer that is provided with at least one recess (13) and at least one connecting surface (22) that is located on the top side of the semiconductor element opposite the carrier substrate is electrically connected to a contact element (2) that is directly brought into contact with the metal cooling body via the recess.

Description

Elektronisches HalbleitermodulElectronic semiconductor module
Stand der TechnikState of the art
Die Erfindung betrifft ein elektronisches Halbleitermodul mit den im Oberbegriff des Anspruchs 1 angegebenen Merkmalen.The invention relates to an electronic semiconductor module with the features specified in the preamble of claim 1.
Derartige Halbleitermodule weisen als Trägersubstrat ein sogenanntes IMS-Substrat (Insulated metal substrat) auf, welches aus einer als Kühlkörper dienenden Metallplatte besteht, die auf ihrer Oberseite mit einer elektrisch isolierendenSemiconductor modules of this type have a so-called IMS substrate (insulated metal substrate) as the carrier substrate, which consists of a metal plate serving as a heat sink, which has an electrically insulating top surface
Schicht und einer auf die isolierende Schicht aufgebrachten dünnen Metallschicht versehen ist. Die isolierende Schicht weist eine gute Wärmeleitfähigkeit auf und besteht beispielsweise aus einer dünnen Polymerschicht, in die zur Verbesse- rung der Wärmeableitung ein Keramikpulver eingebracht ist.Layer and a thin metal layer applied to the insulating layer is provided. The insulating layer has good thermal conductivity and consists, for example, of a thin polymer layer into which a ceramic powder has been introduced to improve heat dissipation.
Durch Strukturieren der Metallschicht sind auf der Oberseite des Substrats Leiterbahnen ausgebildet. Elektronische Halbleiterbauelemente sind auf die Oberseite bestückt und über Bonddrähte mit den Leiterbahnen elektrisch verbunden. Der Vorteil bei der Verwendung eines IMS-Substrats ist insbesondere in der guten Wärmeableitung der durch das Halbleiterbauelement erzeugten Wärme auf den metallischen Kühlkörper mittels der relativ dünnen und gut wärmeleitenden, isolierenden Schicht zu sehen. Außer den ISM-Substraten ist die Verwendung von sogenannten DCB-Substraten (Direct copper bonded) in elektronischen Halbleitermodulen bekannt, wie beispielsweise aus: H. de Lambil- ly, H. Keser; Failure analysis of Power Modules: A look at the packaging and reliability of large IGBTS, IEEE/CHMT Int. Electronics Manufacturing Technology Symposium 1992, Seite 366 hervorgeht. Die DCB-Substrate bestehen aus einem relativ dicken Keramikträger, auf dessen Ober- und Unterseite je eine dünne Metallschicht in einem speziellen Preßverfahren aufge- bracht wird. Die obere Metallschicht wird durch Strukturieren mit Leiterbahnen versehen. Halbleiterbauelemente sind auf der Oberseite des Moduls über Bonddrähte mit den Leiterbahnen verbunden. Auf die untere Metallschicht des Trägersubstrats wird eine als Wärmesenke dienende dicke Metallplatte aufgelö- tet. Aus der EP 0 508 717 AI ist weiterhin bekannt, die Metallplatte mit Kühlkanälen zu versehen, welche von einem Kühlmedium durchströmt werden. Ein Nachteil der DCB-Substrate gegenüber den IMS-Substraten besteht insbesondere in der dik- ken Keramikschicht, durch die der Wärmeübergang auf den Kühl- körper erschwert wird.By structuring the metal layer, conductor tracks are formed on the upper side of the substrate. Electronic semiconductor components are fitted on the top and electrically connected to the conductor tracks via bond wires. The advantage of using an IMS substrate can be seen in particular in the good heat dissipation of the heat generated by the semiconductor component to the metallic heat sink by means of the relatively thin and good heat-conducting, insulating layer. In addition to the ISM substrates, the use of so-called DCB substrates (direct copper bonded) in electronic semiconductor modules is known, for example from: H. de Lambily, H. Keser; Failure analysis of Power Modules: A look at the packaging and reliability of large IGBTS, IEEE / CHMT Int. Electronics Manufacturing Technology Symposium 1992, page 366. The DCB substrates consist of a relatively thick ceramic carrier, on the top and bottom of which a thin metal layer is applied in a special pressing process. The upper metal layer is provided with conductor tracks by structuring. Semiconductor components are connected to the conductor tracks on the top of the module via bond wires. A thick metal plate serving as a heat sink is soldered onto the lower metal layer of the carrier substrate. From EP 0 508 717 AI it is also known to provide the metal plate with cooling channels through which a cooling medium flows. A disadvantage of the DCB substrates compared to the IMS substrates is in particular the thick ceramic layer, which makes the heat transfer to the heat sink difficult.
Nachteilig bei den oben beschriebenen bekannten Halbleitermodulen ist, daß alle Anschlußleitungen der Halbleiterbauelemente auf der Oberseite des Trägersubstrats ausgebildet sind. Die Leiterbahnführung in dieser einen Lage wird dadurch sehr aufwendig. Bei elektronischen Schaltungen mit hohem Integrationsgrad muß das ohnehin teure Substrat deshalb seitlich vergrößert werden, um die gesamte notwendige Leiterbahnverdrahtung auf der Oberseite des Trägersubstrats unterbringen zu können. Hierdurch werden die Herstellungskosten erheblich vergrößert. Besonders nachteilig ist, daß durch die Anordnung aller Anschlußleitungen in der oberen Metallschicht des Substrats große parasitäre Induktivitäten entstehen, die zu sehr großen Überspannungen führen. Dies wirkt sich insbesondere nachteilig aus, wenn auf dem Trägersubstrat leistungselektro- nische Schaltungen mit Gleichspannungskreis angeordnet sind. Die parasitären Induktivitäten verursachen unerwünschte Überspannungen, welche bei der Auswahl der Halbleiterbauelemente berücksichtigt werden müssen. So muß beispielsweise der Ab- schaltvorgang eines elektronischen Leistungsschalters durch geeignete Maßnahmen verlangsamt werden, um die Überspannungen zu reduzieren und eine Beschädigung des Halbleitermoduls zu vermeiden.A disadvantage of the known semiconductor modules described above is that all the connecting lines of the semiconductor components are formed on the upper side of the carrier substrate. The conductor track in this one position is very expensive. In the case of electronic circuits with a high degree of integration, the substrate, which is in any case expensive, must therefore be enlarged laterally in order to be able to accommodate the entire necessary conductor track wiring on the upper side of the carrier substrate. As a result, the manufacturing costs are increased considerably. It is particularly disadvantageous that the arrangement of all the connecting lines in the upper metal layer of the substrate results in large parasitic inductances which lead to very large overvoltages. This has a particularly disadvantageous effect if power electro- African circuits with a DC voltage circuit are arranged. The parasitic inductances cause undesired overvoltages, which must be taken into account when selecting the semiconductor components. For example, the disconnection process of an electronic circuit breaker must be slowed down by suitable measures in order to reduce the overvoltages and to avoid damage to the semiconductor module.
Vorteile der ErfindungAdvantages of the invention
Durch das erfindungsgemäße Halbleitermodul mit den kennzeichnenden Merkmalen des Anspruchs 1, werden die bekannten Probleme vermieden. Vorteilhaft wird eine gute Wärmeableitung der von den Halbleiterbauelementen erzeugten Wärme erreicht und gleichzeitig die parasitären Induktivitäten des Halbleitermoduls erheblich verkleinert. Als Trägersubstrat des Halbleitermoduls wird ein IMS-Substrat verwandt, wobei die isolierende Zwischenschicht des IMS-Substrats mit wenigstens ei- ner Aussparungen versehen ist und wenigstens eine auf der von dem Trägersubstrat abgewandten Oberseite eines Halbleiterbauelementes vorgesehene Anschlußfläche des Halbleiterbauelementes mit einem Kontaktelement elektrisch verbunden ist, welches durch die Aussparung hindurch direkt auf den metalli- sehen Kühlkörper kontaktiert ist. Dadurch, daß der Kühlkörper als elektrischer Leiter verwandt wird, der direkt mit dem Anschluß eines Halbleiterbauelementes über das Kontaktelement elektrisch verbunden ist, können die parasitären Induktivitäten des Halbleitermoduls erheblich verkleinert werden. Außer- dem wird die Leiterbahnverdrahtung erleichtert, da auch der metallische Kühlkörper als Leiter für die Zuführung der zum Betrieb des Halbleiterbauelements benötigten Energie dient . Durch die sehr dünne elektrisch isolierende Schicht bzw. das sehr dünne Dielektrikum zwischen dem Kühlkörper und den Lei- terbahnen auf der Oberseite des Substrats werden die parasi- tären Induktivitäten noch weiter verkleinert und gleichzeitig eine sehr schnelle und effiziente Wärmeableitung auf den Kühlkörper erreicht .The known problems are avoided by the semiconductor module according to the invention with the characterizing features of claim 1. Good heat dissipation of the heat generated by the semiconductor components is advantageously achieved and at the same time the parasitic inductances of the semiconductor module are considerably reduced. An IMS substrate is used as the carrier substrate of the semiconductor module, the insulating intermediate layer of the IMS substrate being provided with at least one cutout and at least one contact surface of the semiconductor component provided on the upper side of a semiconductor component facing away from the carrier substrate being electrically connected to a contact element, which is contacted through the recess directly on the metallic heat sink. The fact that the heat sink is used as an electrical conductor, which is electrically connected directly to the connection of a semiconductor component via the contact element, allows the parasitic inductances of the semiconductor module to be significantly reduced. In addition, the wiring of the conductor track is made easier since the metallic heat sink also serves as a conductor for supplying the energy required to operate the semiconductor component. Due to the very thin electrically insulating layer or the very thin dielectric between the heat sink and the conductor tracks on the top of the substrate, the parasitic tary inductivities further reduced and at the same time a very fast and efficient heat dissipation to the heat sink is achieved.
Vorteilhafte Ausbildungen und Weiterbildungen der Erfindung sind in den Unteransprüchen dargestellt.Advantageous developments and further developments of the invention are presented in the subclaims.
Vorteilhaft kann das Kontaktelement als ein mit dem Anschluß des Halbleiterbauelementes einerseits und dem metallischen Kühlkörper andererseits verbundener Bonddraht hergestellt sein. Die Bonddraht-Technik ist gut beherrscht und die direkte Kontaktierung des Bonddrahtes auf den Kühlkörper macht lediglich die Ausbildung von kleinen Aussparungen in der isolierenden Zwischenschicht erforderlich, was kostengünstig mit einem Laser durchgeführt werden kann.The contact element can advantageously be produced as a bond wire connected to the connection of the semiconductor component on the one hand and the metallic heat sink on the other. The bonding wire technology is well mastered and the direct contacting of the bonding wire on the heat sink only requires the formation of small cutouts in the insulating intermediate layer, which can be carried out inexpensively with a laser.
Vorteilhaft kann der metallische Kühlkörper als Potentialfläche zur Bereitstellung des zum Betrieb des Halbleiterbauelementes notwendigen Versorgungspotentials, insbesondere des Massepotentials vorgesehen sein.The metallic heat sink can advantageously be provided as a potential area for providing the supply potential required for operating the semiconductor component, in particular the ground potential.
Um eine möglichst gute Wärmeableitung und Reduzierung der parasitären Induktivitäten zu erreichen, ist es vorteilhaft, die Dicke der Isolationsschicht kleiner als 250μm auszubil- den.In order to achieve the best possible heat dissipation and reduction of the parasitic inductances, it is advantageous to make the thickness of the insulation layer less than 250 μm.
Eine besonders effiziente Wärmeableitung kann dadurch erzielt werden, daß der metallische Kühlkörper mit einem Kühl- medium gekoppelt ist. Besonders vorteilhaft ist, wenn der metallische Kühlkörper des IMS-Substrats mit Kühlkanälen versehen ist, welche von dem Kühlmedium durchströmt werden.A particularly efficient heat dissipation can be achieved by coupling the metallic heat sink with a cooling medium. It is particularly advantageous if the metallic heat sink of the IMS substrate is provided with cooling channels through which the cooling medium flows.
In Gleichspannungszwischenkreisen mit Zwischenkreiskondensa- tor ist es vorteilhaft, den Plusanschluß des Kondensators mit einer Leiterbahn der Metallschicht auf der Oberseite des Substrats und den Minusanschluß direkt mit dem metallischen Kühlkörper zu verbinden. Die parasitären Induktivitäten können hierdurch weiter reduziert werden.In DC voltage intermediate circuits with an intermediate circuit capacitor, it is advantageous to connect the positive connection of the capacitor to a conductor track of the metal layer on the top of the Connect the substrate and the minus connection directly to the metal heat sink. This can further reduce the parasitic inductances.
Zeichnungdrawing
Ausführungsbeispiele der Erfindung sind in den Zeichnungen dargestellt und werden in der nachfolgenden Beschreibung näher erläutert. Es zeigt Fig. 1 ein im Stand der Technik bekanntes Halbleitermodul,Embodiments of the invention are shown in the drawings and are explained in more detail in the following description. 1 shows a semiconductor module known in the prior art,
Fig. 2 ein erstes Ausführungsbeispiel eines erfindungsgemäßen Halbleitermoduls ,2 shows a first exemplary embodiment of a semiconductor module according to the invention,
Fig. 3 ein zweites Ausführungsbeispiel eines erfindungsgemäßen Halbleitermoduls, Fig. 4 ein Schaltbild für das in den Figuren 1,2 und 3 dargestellte Halbleitermodul eines Tiefsetzstellers .3 shows a second exemplary embodiment of a semiconductor module according to the invention, FIG. 4 shows a circuit diagram for the semiconductor module of a buck converter shown in FIGS. 1, 2 and 3.
Beschreibung der AusführungsbeispieleDescription of the embodiments
Fig. 1 zeigt ein im Stand der Technik bekanntes Halbleitermodul. Als Trägersubstrat 1 wird ein DCB-Substrat (Direct cop- per bonded) verwandt, welches eine etwa einen Millimeter dik- ke Keramikschicht 2 umfaßt, die auf ihrer Oberseite und Unterseite mit etwa 300 μm dicken Metallschichten 4,5 aus Kup- fer beschichtet ist. Bekannt ist auch die Verwendung von IMS- Substraten (Insulated metal Substrat) , welche eine dünne isolierende Schicht aufweisen, die auf der Oberseite mit einer Metallschicht versehen ist und auf deren Unterseite ein metallischer Kühlkörper direkt aufgebracht ist. In der oberen Metallschicht 4 sind durch Strukturieren Leiterbahnen 4a, 4b, 4c ausgebildet. Ungehäuste Halbleiterbauelemente 20,21, beispielsweise MOSFETS, Leistungsdioden, IGBT's oder bipolare Transistoren, sind auf die Metallschicht 4 aufgebracht. Nicht dargestellte Anschlüsse auf der Unterseite der Halbleiterbau- elemente 20,21 sind mit den Leiterbahnen 4a, 4c beispielsweise durch Auflöten der ungehäusten Halbleiterbauelemente 20,21 elektrisch verbunden. Außerdem sind die Halbleiterbauelemente über Bonddrähte 11,14, welche Anschlußflächen 22,23 auf der Oberseite der Halbleiterbauelemente kontaktieren, mit weite- ren Leiterbahnen 4b, 4c elektrisch verbunden. Auf die Metallschicht 5 auf der Unterseite des Trägersubstrats 1 ist ein metallischer Kühlkörper 3 aus beispielsweise Kupfer aufgelötet. Der Kühlkörper 3 kontaktiert mit seiner Unterseite ein Kühlmedium 10, beispielsweise eine Kühlflüssigkeit. Weitere elektrische Bauelemente, wie beispielsweise ein Kondensator 30, sind über Leitungsverbindungen 40,41 und Metallbrücken 42,43 mit den Leiterbahnen 4a, 4b verbunden.1 shows a semiconductor module known in the prior art. A DCB substrate (direct copied bonded) is used as carrier substrate 1, which comprises an approximately one millimeter thick ceramic layer 2, which is coated on its top and bottom with approximately 300 μm thick metal layers 4, 5 of copper . It is also known to use IMS substrates (insulated metal substrates) which have a thin insulating layer which is provided with a metal layer on the top and a metal heat sink is applied directly to the underside. Conductor tracks 4a, 4b, 4c are formed in the upper metal layer 4 by structuring. Unhoused semiconductor components 20, 21, for example MOSFETS, power diodes, IGBTs or bipolar transistors, are applied to the metal layer 4. Connections (not shown) on the underside of the semiconductor components 20, 21 are, for example, with the conductor tracks 4a, 4c electrically connected by soldering the unhoused semiconductor components 20, 21. In addition, the semiconductor components are electrically connected to further conductor tracks 4b, 4c via bond wires 11, 14, which contact pads 22, 23 on the upper side of the semiconductor components. A metal heat sink 3 made of, for example, copper is soldered onto the metal layer 5 on the underside of the carrier substrate 1. The heat sink 3 contacts with its underside a cooling medium 10, for example a cooling liquid. Further electrical components, such as a capacitor 30, are connected to the conductor tracks 4a, 4b via line connections 40, 41 and metal bridges 42, 43.
Im folgenden seien die Nachteile des oben dargestellten be- kannten Halbleitermoduls anhand eines Tiefsetzstellers erläutert. Die Nachteile bestehen aber bei allen mit diesem Halbleitermodul realisierten leistungselektronischen Schaltungen mit Gleichspannungskreis, wie beispielsweise Gleichstromstellern, Gleich- und Wechselrichtern, Sperrwandlern, Durchfluß- wandlern und anderen. Ein Schaltbild des Tiefsetzstellers ist in Fig. 4 dargestellt, wobei die elektrischen und elektronischen Bauelemente des Halbleitermoduls innerhalb der strichpunktierten Linie 50 dargestellt sind. Der Anschluß B+ des Betriebspotentials liegt an der Leiterbahn 4a in Fig. 1 an, der Anschluß B- an der Leiterbahn 4b. Der Phasenanschluß P ist mit der Leiterbahn 4c verbunden. Das Halbleiterbauelement 21 ist in diesem Beispiel ein Leistungsschalter, beispielsweise ein MOSFET, das Bauelement 20 eine Halbleiterdiode. Wird der Leistungsschalter 21 abgeschaltet kommutiert der Strom vom MOSFET 21 auf die Diode 20. Für die beim Abschalten am MOSFET abfallende elektrische Spannung UM0SFET gilt:The disadvantages of the known semiconductor module shown above are explained below using a buck converter. However, the disadvantages exist with all power electronic circuits with a DC voltage circuit realized with this semiconductor module, such as, for example, DC controllers, rectifiers and inverters, flyback converters, forward converters and others. A circuit diagram of the buck converter is shown in FIG. 4, the electrical and electronic components of the semiconductor module being shown within the dash-dotted line 50. The connection B + of the operating potential is present on the conductor track 4a in FIG. 1, the connection B- on the conductor track 4b. The phase connection P is connected to the conductor track 4c. In this example, the semiconductor component 21 is a power switch, for example a MOSFET, and the component 20 is a semiconductor diode. If the circuit breaker 21 is switched off, the current commutates from the MOSFET 21 to the diode 20. The following applies to the electrical voltage U M0SFET which drops off at the MOSFET:
UMOSFET = U1 - (L) + L2 + L4 + L5 + L6 + L7 ) - — i- und —- l < 0 , dt dt wobei Ui die am Halbleitermodul zwischen den Leiterbahnen 4a und 4b angelegte Zwischenkreisspannung ist und Lx bis L7 die auftretenden parasitären Induktivitäten darstellen. Nach obiger Gleichung verursachen die Spannungsabfälle an den parasitären Induktivitäten L bis L7 beim Abschalten an dem MOSFET eine Überspannung, die größer als die ZwischenkreiSpannung Ux ist. Der Abschaltvorgang muß deshalb durch zusätzliche Maßnahmen verlangsamt werden, damit die maximale Sperrspannung des MOSFET nicht überschritten wird. Die unerwünschte Überspannung ist um so größer, je größer die parasitären Induktivitäten Lx bis L7 sind. Die in Fig. 4 dargestellten parasitä- ren Induktivitäten können dem Aufbau des Halbleitermoduls in Fig. 1 direkt zugeordnet werden. In Fig. 1 wird die parasitäre Induktivität Lx durch die elektrische Anschlußleitung 40 des Pluspols 32 des Zwischenkreiskondensators 30 gebildet. Die parasitäre Induktivität L2 wird durch den Anschlußbügel 43 und die Leiterbahn 4a gebildet. Die parasitären Induktivitäten L3 und Ls werden durch die elektrische Leitungsverbindung vom MOSFET 21 zur Halbleiterdiode 20, also durch den Bonddraht 11 und die Leiterbahn 4c bedingt. Die parasitäre Induktivität L6 wird durch die Leiterbahn 4b und den An- schlußbügel 42 bedingt und die parasitäre Induktivität L7 durch die Anschlußleitung 41 des Zwischenkreiskondensators 30. In Fig. 1 nicht erkennbar ist die parasitäre Induktivität L4 für den Anschluß des mit P bezeichneten Kontaktes an die Leiterbahn 4c . Mit der eng benachbarten Anordnung der An- Schlußleitungen 40 und 41 in der Zwischenkreisverschienung 45 lassen sich zwar die Induktivitäten x und L7 etwas reduzieren, wie aber in Fig. 1 zu erkennen ist, wird zwischen dem B+ Anschluß und dem B- Anschluß des Halbleitermoduls, also zwischen den Anschlußbügeln 43 und 42 eine sehr große Fläche aufgespannt, was zu großen Werten für die parasitären Induktivitäten L2 und L6 führt, die durch eine Optimierung des Auf- baus nicht wesentlich reduziert werden können. Außerdem wird durch die Anordnung der Potentialanschlüsse B+ und B- in der oberen Metallschicht 4 der Anschluß der Leiterbahn 4c an das Halbleiterbauelement 20 erschwert, was zu großen parasitären Induktivitäten L3 und L5 führt. Die parasitären Induktivitäten Lj. bis L7 können bei den im Stand der Technik bekannten Halbleitermodulen nicht weiter reduziert werden, was zu den oben beschriebenen Nachteilen führt.U MOSFET = U 1 - (L ) + L 2 + L 4 + L 5 + L 6 + L 7 ) - - i- and —- l <0, dt dt where Ui is applied to the semiconductor module between the conductor tracks 4a and 4b DC link voltage is and L x to L 7 represent occurring parasitic inductances. According to the above equation, the voltage drops at the parasitic inductances L to L 7 when switched off at the MOSFET cause an overvoltage that is greater than the intermediate circuit voltage U x . The switch-off process must therefore be slowed down by additional measures so that the maximum reverse voltage of the MOSFET is not exceeded. The larger the parasitic inductances L x to L 7 , the greater the undesired overvoltage. The parasitic inductances shown in FIG. 4 can be directly assigned to the structure of the semiconductor module in FIG. 1. 1, the parasitic inductance L x is formed by the electrical connecting line 40 of the positive pole 32 of the intermediate circuit capacitor 30. The parasitic inductance L 2 is formed by the connecting bracket 43 and the conductor track 4a. The parasitic inductances L 3 and L s are caused by the electrical line connection from the MOSFET 21 to the semiconductor diode 20, that is to say by the bond wire 11 and the conductor track 4c. The parasitic inductance L 6 is caused by the conductor track 4b and the connecting bracket 42 and the parasitic inductance L 7 by the connecting line 41 of the intermediate circuit capacitor 30. The parasitic inductance L 4 for the connection of the one labeled P cannot be seen in FIG Contact to the conductor track 4c. With the closely adjacent arrangement of the connecting lines 40 and 41 in the intermediate circuit busbar 45, the inductivities x and L 7 can be reduced somewhat, but as can be seen in FIG. 1, there is between the B + connection and the B connection of the semiconductor module , that is, a very large area spanned between the connecting brackets 43 and 42, which leads to large values for the parasitic inductances L 2 and L 6 , which cannot be significantly reduced by optimizing the structure. In addition, the arrangement of the potential connections B + and B- in the upper metal layer 4 makes it difficult to connect the conductor track 4c to the semiconductor component 20, which leads to large parasitic ones Inductors L 3 and L 5 leads. The parasitic inductances Lj . to L 7 cannot be further reduced in the semiconductor modules known in the prior art, which leads to the disadvantages described above.
In Fig. 2 ist ein erstes Ausführungsbeispiel des erfindungs- gemäßen Halbleitermoduls dargestellt. Auch bei diesem Beispiels sollen die Vorteile anhand eines Tiefsetzstellers erläutert werden. Die Vorteile ergeben sich aber bei allen po- tentialverbindenden oder potentialtrennenden leistungselektronischen Schaltungen mit Gleichspannungskreis. Wie in Fig. 2 dargestellt ist, wird als Trägersubstrat 1 für das Halbleitermodul ein an sich bekanntes IMS-Substrat verwandt, welches einen mehrere Millimeter dicken metallischen Kühlkörper 3 aus beispielsweise Aluminium umfaßt, auf dessen Oberseite eine elektrisch isolierende Schicht 2 aufgebracht ist. Die elektrisch isolierende Schicht in diesem Beispiel ist 140μm dick ausgebildet und sollte nicht dicker als 250μm sein. Die isolierende Schicht besteht vorzugsweise aus einem Polymer, in das gut wärmeleitende, keramische Partikel eingebracht sind. Auf die isolierenden Schicht 2 ist eine etwa 300μm dicke Metallschicht 4 aus beispielsweise Kupfer aufgebracht, in der in bekannter Weise durch Strukturieren Leiterbahnen 4a, 4c ausgebildet sind. Der metallische Kühlkörper 3 steht an sei- ner Unterseite mit einem Kühlmedium 10 in Wärmekontakt. Auf die Metallschicht 4 sind ungehäuste Halbleiterbauelemente 20,21 aufgebracht. Es ist aber auch möglich andere elektrische und/oder elektronische Bauelemente, beispielsweise ge- häuste Halbleiterbauelemente auf das Halbleitermodul aufzu- bringen. Bei dem hier gezeigten Ausführungsbeispiel ist das Halbleiterbauelement 21 ein MOSFET und das Halbleiterbauelement 20 eine Halbleiterdiode. An Stelle des MOSFET kann bei einem anderen Schaltungsaufbau auch ein IBGT, ein bipolarer Transistor oder ein anderes Halbleiterbauelement verwandt werden. An Stelle der Halbleiterdiode kann auch ein schaltba- rer Leistungshalbleiter, beispielsweise ein bipolarer Transistor, ein MOSFET oder ein IGBT verwandt werden. Der MOSFET 21 steht auf der Unterseite mit der Leiterbahn 4a in elektrischem Kontakt . Auf der von dem Trägersubstrat 1 abgewandten Oberseite des MOSFET 21 sind zwei Anschlußflächen 23 angeordnet, von denen in Fig. 2 nur eine dargestellt ist. Die Anschlußfläche 23 ist mit einem Bonddraht 11 kontaktiert, der mit seinem anderen Ende mit der Leiterbahn 4c verbunden ist. Die Halbleiterdiode 20 weist auf ihrer Unterseite eine erste Anschlußfläche auf, die mit der Leiterbahn 4c elektrisch verbunden ist . Eine zweite Anschlußfläche 22 der Halbleiterdiode 20 ist auf der von dem Trägersubstrat 1 abgewandten Seite der Halbleiterdiode angeordnet und mit einem als Bonddraht 12 ausgebildeten Kontaktelement verbunden. Der Bonddraht 12 ist durch den Spalt zwischen den Leiterbahnen 4c und 4a und durch eine in die isolierende Schicht 2 eingebrachte Aussparung 13 hindurch direkt mit dem Kühlkörper 3 elektrisch verbunden. Unter einer direkten Verbindung wird hierbei eine Verbindung ohne Zwischenanbindung anderer Bauelemente verstanden. Die Aussparung 13 weist einen Durchmesser von beispielsweise 3mm auf und kann auf einfache Weise mit einem Laser in die isolierende Schicht 2 eingebracht werden. Anders als bei einem DCB-Substrat wird die Stabilität des Trägersubstrats 1 durch die Metallplatte 3 gewährleistet und daher nicht durch die in die isolierende Schicht 2 eingebrachte Aussparung 13 vermindert. In Fig. 2 ist der Pluspol 32 eines Zwischenkreiskondensators 30 durch eine in dem Kühlkörpers 3 und der isolierenden Schicht 2 vorgesehene Ausnehmung 33 mit der Leiterbahn 4a auf der Oberseite des Trägersubstrats 1 verbunden, beispiels- weise durch Schrauben oder Nieten. Der Minuspol 31 des Zwischenkreiskondensators 30 ist mit dem Kühlkörper 3 verbunden. Bei dem in Fig. 2 dargestellten Tiefsetzsteller, dessen Schaltbild in Fig. 4 wiedergegeben ist, ist das Versorgungs- potential B+ an die Leiterbahn 4a angeschlossen und das Mas- sepotential B- an den Kühlkörper 3. Insbesondere in Halblei- termodulen, welche in Kraftfahrzeugen eingesetzt werden, ist ein Anschluß der Leistungshalbleiterbauelemente oft mit Massepotential zu verbinden, so daß der Kühlkörper 3 ohne isolierende Zwischenschicht direkt auf das B- Potential gelegt werden kann. Durch Verwendung des Kühlkörpers 3 als Leiter zur Zuführung des Massepotentials B- wird die zwischen den Potentialen B+ und B- aufgespannte Fläche im Vergleich zu den bekannten Halbleitermodulen aus Fig. 1 stark verkleinert und die parasitären Induktivitäten L2 und L6 erheblich reduziert. Die obere Metallschicht 4 führt fast nur noch das Potential B+ . Nur die Fläche für die Leiterbahn 4c und der Spalt zwischen den Leiterbahnen muß ausgespart werden. Durch die sehr dünne isolierende Schicht 2 wird weiterhin erreicht, daß auch die parasitären Induktivitäten Lx und L7 sehr viel stärker als durch die Zwischenkreisverschienung des Halbleitermoduls in2 shows a first exemplary embodiment of the semiconductor module according to the invention. In this example, too, the advantages are explained using a step-down converter. However, the advantages result from all potential-connecting or potential-isolating power electronic circuits with a DC voltage circuit. As shown in FIG. 2, an IMS substrate known per se is used as the carrier substrate 1 for the semiconductor module, which substrate comprises a metallic heat sink 3 of several millimeters thick, for example made of aluminum, on the upper side of which an electrically insulating layer 2 is applied. The electrically insulating layer in this example is 140 μm thick and should not be thicker than 250 μm. The insulating layer preferably consists of a polymer into which ceramic particles that are good heat conductors are introduced. An approximately 300 μm thick metal layer 4 made of, for example, copper is applied to the insulating layer 2, in which conductor tracks 4a, 4c are formed in a known manner by structuring. The metallic heat sink 3 is in thermal contact on its underside with a cooling medium 10. Unhoused semiconductor components 20, 21 are applied to the metal layer 4. However, it is also possible to apply other electrical and / or electronic components, for example packaged semiconductor components, to the semiconductor module. In the exemplary embodiment shown here, the semiconductor component 21 is a MOSFET and the semiconductor component 20 is a semiconductor diode. Instead of the MOSFET, an IBGT, a bipolar transistor or another semiconductor component can also be used in another circuit construction. Instead of the semiconductor diode, a switchable Power semiconductors, for example a bipolar transistor, a MOSFET or an IGBT can be used. The MOSFET 21 is in electrical contact with the conductor track 4a on the underside. On the upper side of the MOSFET 21 facing away from the carrier substrate 1, two connection surfaces 23 are arranged, of which only one is shown in FIG. 2. The connection surface 23 is contacted with a bonding wire 11, which is connected at its other end to the conductor track 4c. The semiconductor diode 20 has on its underside a first connection surface which is electrically connected to the conductor track 4c. A second connection surface 22 of the semiconductor diode 20 is arranged on the side of the semiconductor diode facing away from the carrier substrate 1 and is connected to a contact element designed as a bond wire 12. The bond wire 12 is electrically connected directly to the heat sink 3 through the gap between the conductor tracks 4c and 4a and through a cutout 13 made in the insulating layer 2. A direct connection is understood here to mean a connection without intermediate connection of other components. The recess 13 has a diameter of, for example, 3 mm and can be easily introduced into the insulating layer 2 using a laser. In contrast to a DCB substrate, the stability of the carrier substrate 1 is ensured by the metal plate 3 and therefore not reduced by the cutout 13 made in the insulating layer 2. 2, the positive pole 32 of an intermediate circuit capacitor 30 is connected to the conductor track 4a on the upper side of the carrier substrate 1 by a recess 33 provided in the heat sink 3 and the insulating layer 2, for example by screws or rivets. The negative pole 31 of the intermediate circuit capacitor 30 is connected to the heat sink 3. In the step-down converter shown in FIG. 2, the circuit diagram of which is shown in FIG. 4, the supply potential B + is connected to the conductor track 4a and the ground potential B- to the heat sink 3. In particular in semi-conductor Term modules, which are used in motor vehicles, a connection of the power semiconductor components is often to be connected to ground potential, so that the heat sink 3 can be connected directly to the B potential without an insulating intermediate layer. By using the heat sink 3 as a conductor for supplying the ground potential B-, the area spanned between the potentials B + and B- is greatly reduced in comparison to the known semiconductor modules from FIG. 1 and the parasitic inductances L 2 and L 6 are considerably reduced. The upper metal layer 4 almost only carries the potential B +. Only the area for the conductor track 4c and the gap between the conductor tracks need to be left out. The very thin insulating layer 2 also ensures that the parasitic inductances L x and L 7 are also much stronger than through the intermediate circuit busbar of the semiconductor module in FIG
Fig. 1 reduziert werden können. Weiterhin vorteilhaft bei dem erfindungsgemäßen Halbleitermodul ist, daß die von den Halbleiterbauelementen 20,21 erzeugte Wärme durch die dünne und gut wärmeleitende, isolierende Schicht 2 sehr schnell an den Kühlkörper 3 abgegeben wird und von dort auf das Kühlmedium 10 übertragen wird.Fig. 1 can be reduced. Another advantage of the semiconductor module according to the invention is that the heat generated by the semiconductor components 20, 21 is given off very quickly to the heat sink 3 by the thin and good heat-conducting, insulating layer 2 and is transferred from there to the cooling medium 10.
Sind weitere elektrische und/oder elektronische Bauelemente vorgesehen, die mit dem B- Potential zu verbinden sind, so wird die isolierende Schicht 2 an weiteren Stellen mit Aussparungen versehen und die betroffenen Bauelemente jeweils über einen durch die Aussparung durchgeführten Bonddraht mit dem Kühlkörper kontaktiert. Vorteilhaft kann somit der Masseanschluß aller Bauelemente durch den gemeinsamen Kühlkörper 3 realisiert werden. Die Leiterbahnführung auf der Oberseite des Substrats wird hierdurch erheblich erleichtert.If further electrical and / or electronic components are to be provided which are to be connected to the B potential, the insulating layer 2 is provided with recesses at further points and the components concerned are contacted with the heat sink via a bond wire passed through the recess. The ground connection of all components can thus advantageously be realized by the common heat sink 3. This considerably facilitates the conductor track routing on the upper side of the substrate.
In Fig. 3 ist ein weiteres Ausführungsbeispiels des erfindungsgemäßen Halbleitermoduls dargestellt. Gleiche Teile sind mit gleichen Bezugsziffern gekennzeichnet. Im Vergleich zu dem in Fig. 2 gezeigten Ausführungsbeispiel ist in Fig. 3 der Kühlkörper 3 mit mäanderförmigen Kühlkanälen 15 versehen, die von dem Kühlmedium 10 durchströmt werden. Hierdurch wird eine noch bessere Ableitung der Wärme erreicht .FIG. 3 shows a further exemplary embodiment of the semiconductor module according to the invention. The same parts are identified with the same reference numbers. Compared to In the exemplary embodiment shown in FIG. 2, the cooling body 3 is provided in FIG. 3 with meandering cooling channels 15 through which the cooling medium 10 flows. This leads to an even better dissipation of the heat.
Die Verwendung des erfindungsgemäßen Halbleitermoduls ist keinesfalls auf den oben dargestellten Anwendungsfall eines Tiefsetzstellers beschränkt, vielmehr kann das Halbleitermodul auch in anderen leistungselektronischen Schaltungstopolo- gien mit Gleichspannungskreis zur Verringerung der parasitären Induktivitäten und zur Verbesserung der Wärmeableitung eingesetzt werden. The use of the semiconductor module according to the invention is in no way limited to the application case of a buck converter shown above. Rather, the semiconductor module can also be used in other power electronic circuit topologies with a DC voltage circuit to reduce the parasitic inductances and to improve the heat dissipation.

Claims

Ansprüche Expectations
1. Elektronisches Halbleitermodul, umfassend ein Trägersubstrat (1) , welches eine elektrisch isolierende Schicht (2) , eine auf der Oberseite der isolierenden Schicht angeordnete Metallschicht (4) , in der durch Strukturieren Leiterbahnen (4a, 4b, 4c) ausgebildet sind, und einen auf die Unterseite der isolierenden Schicht aufgebrachten metallischen Kühlkörper (3) aufweist, und wenigstens ein auf dem Trägersubstrat (1) angeordnetes Halbleiterbauelement (20) , dadurch gekennzeichnet, daß die elektrisch isolierende Schicht (2) mit wenigstens einer Aussparung (13) versehen ist und wenigstens eine auf der von dem Trägersubstrat (1) abgewandten Oberseite des Halbleiterbauelementes (20) vorgesehene Anschlußfläche (22) mit einem Kontak element (12) elektrisch verbunden ist, welches durch die Aussparung (13) hindurch direkt auf den metallischen Kühlkörper (3) kontaktiert ist.1. Electronic semiconductor module, comprising a carrier substrate (1) which has an electrically insulating layer (2), a metal layer (4) arranged on the upper side of the insulating layer, in which conductor tracks (4a, 4b, 4c) are formed by structuring, and has a metallic heat sink (3) applied to the underside of the insulating layer, and at least one semiconductor component (20) arranged on the carrier substrate (1), characterized in that the electrically insulating layer (2) is provided with at least one recess (13) and at least one connection surface (22) provided on the upper side of the semiconductor component (20) facing away from the carrier substrate (1) is electrically connected to a contact element (12) which passes through the cutout (13) directly onto the metallic heat sink (3) is contacted.
2. Elektronisches Halbleitermodul nach Anspruch 1, dadurch gekennzeichnet, daß das Kontaktelement (12) ein mit der Anschlußfläche (22) des Halbleiterbauelementes (20) und dem metallischen Kühlkörper (3) verbundener Bonddraht ist.2. Electronic semiconductor module according to claim 1, characterized in that the contact element (12) with a connection surface (22) of the semiconductor component (20) and the metallic heat sink (3) is bond wire.
3. Elektronisches Halbleitermodul nach Anspruch 1, dadurch gekennzeichnet, daß der metallische Kühlkörper (3) als Potentialfläche zur Bereitstellung des zum Betrieb des Halbleiterbauelementes notwendigen Versorgungspotentials, insbe- sondere des Massepotentials (B-) vorgesehen ist. 3. Electronic semiconductor module according to claim 1, characterized in that the metallic heat sink (3) is provided as a potential surface for providing the supply potential necessary for the operation of the semiconductor component, in particular the ground potential (B-).
4. Elektronisches Halbleitermodul nach Anspruch 1, dadurch gekennzeichnet, daß die Dicke der Isolationsschicht (2) kleiner als 250μm ausgebildet ist.4. Electronic semiconductor module according to claim 1, characterized in that the thickness of the insulation layer (2) is less than 250 microns.
5. Elektronisches Halbleitermodul nach Anspruch 1, dadurch gekennzeichnet, daß der metallische Kühlkörper (3) mit einem Kühlmedium (10) gekoppelt ist.5. Electronic semiconductor module according to claim 1, characterized in that the metallic heat sink (3) with a cooling medium (10) is coupled.
6. Elektronisches Halbleitermodul nach Anspruch 1, dadurch gekennzeichnet, daß der metallische Kühlkörper (3) mit Kühlkanälen (15) versehen ist, welche von dem Kühlmedium (10) durchströmt werden.6. Electronic semiconductor module according to claim 1, characterized in that the metallic heat sink (3) is provided with cooling channels (15) through which the cooling medium (10) flows.
7. Elektronisches Halbleitermodul nach Anspruch 1, dadurch gekennzeichnet, daß ein Kondensator (30) vorgesehen ist, dessen Plusanschluß (32) mit einer Leiterbahn (4a) der Metallschicht verbunden ist und dessen Minusanschluß (31) mit dem metallischen Kühlkörper (3) verbunden ist. 7. Electronic semiconductor module according to claim 1, characterized in that a capacitor (30) is provided, the positive terminal (32) is connected to a conductor track (4a) of the metal layer and the negative terminal (31) is connected to the metallic heat sink (3) .
EP99967900A 1999-01-11 1999-12-23 Electronic semiconductor module Ceased EP1062698A1 (en)

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KR20010041692A (en) 2001-05-25
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