EP0815635B1 - Leistungsversorgungsschaltung mit einem speicherkondensator - Google Patents

Leistungsversorgungsschaltung mit einem speicherkondensator Download PDF

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Publication number
EP0815635B1
EP0815635B1 EP97901107A EP97901107A EP0815635B1 EP 0815635 B1 EP0815635 B1 EP 0815635B1 EP 97901107 A EP97901107 A EP 97901107A EP 97901107 A EP97901107 A EP 97901107A EP 0815635 B1 EP0815635 B1 EP 0815635B1
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EP
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Prior art keywords
transistor
voltage
capacitor
resistor
drain
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English (en)
French (fr)
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EP0815635A1 (de
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Jean-Michel Moreau
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STMicroelectronics SA
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STMicroelectronics SA
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present invention relates to supply circuits of the storage capacitor type intended to supply a charging via a control circuit such as a switching circuit.
  • FIG. 1 represents a conventional supply diagram a continuous supply from the sector.
  • Terminals X and Y of the AC power supply are connected to the terminals input of a rectifier bridge 1 whose output terminals A and B are connected to a storage capacitor C1 and to a load L.
  • this load L incorporates a circuit of regulation, for example a switching power supply, connected to a charge.
  • a resistance of low value r intended to limit system current calls when it is started up.
  • FIG. 2A represents as a function of time the voltage of the rectified sector V XY and the voltage V AB between the terminals A and B (neglecting the effect of the resistance r). It is assumed that at an initial time t0, the voltage across the capacitor C1 is higher than the mains voltage. Then, the voltage between terminals A and B corresponds to the voltage across the capacitor C1 which gradually discharges into the load L. From time t1, the rectified sector voltage becomes greater than the voltage across the capacitor and it is the sector which supplies the load L and the recharging of the capacitor C1. From time t2, the voltage on the capacitor becomes higher than the mains voltage and it is again the capacitor which supplies the load. This is repeated at times t3 and t4.
  • FIG. 2B represents the shape of the current extracted from the sector between instants t1-t2 and t3-t4. Since we then finds a sinusoidal generator supplying a load and a capacitor which are linear elements, the current is substantially sinusoidal and, more precisely, it corresponds to a sinusoid ridge, that is to say that its shape is substantially parabolic. A characteristic of current peaks is therefore that they are symmetrical with respect to their maximum and that this maximum can be relatively high.
  • Document JP6209574 discloses a supply circuit for improving the power factor with a simple circuit and for improving reliability economically by reducing the power loss in a resistor.
  • This circuit includes two bipolar transistors, coupled in series with a first diode 14 to charge the storage capacitor 5 and a second diode 13 to discharge the capacitor.
  • An object of the present invention is to provide a load supply circuit which limits the amplitude and increases the angle of passage of the current peaks extracted from the sector.
  • Another object of the present invention is to provide such a power circuit in which the current peaks extracts from the sector are asymmetrical and preferably present a maximum at the start of each peak.
  • the present invention also aims to propose a circuit in which the charging current of the capacitor storage is controllable regardless of the type of load supplied.
  • the present invention also aims to minimize the power circuit consumption.
  • the present invention further aims to provide such a power supply circuit incorporating a load circuit switching power supply type regulation, which minimizes disturbances caused by the switching power supply on the alternating voltage supplied to the rectifier bridge.
  • the present invention provides a storage capacitor supply circuit comprising, at the terminals of a rectifier bridge, a storage capacitor in series with parallel charge and discharge paths, the charging path comprising a current limiter, the limitation value of which is controlled by means memorizing the average voltage across the terminals of the limiter, where it follows that the storage capacitor charge, during each of its charge phases, at a substantially constant current during each of its charge charging phases.
  • the current limiter is a MOS transistor with enrichment at N channel associated with gate polarization means.
  • the gate polarization means include means for memorization of a voltage as a function of the voltage between the drain and the source of the MOS transistor, the time constant of these storage means being long before the signal period of the rectifier bridge.
  • the gate bias means include the connection at series, between the drain and the source of the limiting transistor, of a bidirectional switch controlled to close during charge periods, at least a first resistance and a second capacitor, the second capacitor constituting said means of memorization.
  • the switch is a first bipolar PNP transistor.
  • the switch control means comprise a second resistor connected to the base of the first bipolar transistor, a second bipolar NPN transistor connected between the second resistor and the source of the limiting transistor, and a third resistor connected between the base of the second transistor bipolar and a potential close to that of the drain of the transistor limiter.
  • the second capacitor is connected between grid and source of the limiting transistor.
  • the first resistance is of high value and is inserted between the gate of the limiting transistor and the collector of the first bipolar transistor, a terminal of the third resistance and the emitter of the first bipolar transistor being connected to the drain of the limiting transistor, from which it follows that the second capacitor memorizes a voltage corresponding substantially to the average voltage between the drain and the source of the transistor limiter.
  • a first terminal of the first resistor is connected to the collector of the first bipolar transistor, the emitter of the first bipolar transistor being connected to a first terminal of the second capacitor, a second terminal of which is connected to the source of the transistor limiter.
  • a load is connected to the terminals of the storage capacitor, the gate bias means further comprising a fifth resistor connected between the emitter of the first transistor bipolar and the gate of the limiting transistor, and a third capacitor connected between the drain and the grid of the transistor limiter, where it follows that the gate of the transistor limiter is biased by a voltage corresponding to the sum a first voltage proportional to the voltage between the drain and source of the limiting transistor and a second voltage proportional to the derivative of the voltage between the drain and the source of the limiting transistor.
  • the circuit further comprises a fourth resistance of low value connected in series with a Zener diode between the drain and the source of the limiting transistor, the midpoint of the association in series of the fourth resistor with the Zener diode being connected to a second terminal of the first resistor.
  • FIG. 3 represents a first embodiment of the present invention that a charge L, for example a switching power supply, is connected directly to the terminals output of a rectifier bridge.
  • a charge L for example a switching power supply
  • FIG. 3 represents a rectifier bridge 1 provided with input terminals X and Y and rectified output terminals A and B, a storage capacitor C1 and a load L.
  • the capacitor C1 is associated with a discharge path defined by a diode D1 and to a charge path defined by a diode D2.
  • a limiter current 10 is inserted in the charging path.
  • the current limiter 10 is an active element limiting the current in the path of charge of capacitor C1 at a determined value, substantially constant, and controllable.
  • FIG. 4B represents the current I C1 in the capacitor C1 during the charging periods. This current is constant due to the presence of the current limiter 10.
  • FIG. 4C represents the current I L in the load during the periods t1-t2 and t3-t4.
  • This current is supplied by the rectified mains voltage. Since the case of a regulated power supply has been considered, the power in the load is constant. As, during periods t1-t2 and t3-t4, the voltage V AB is increasing, the current in the load will be decreasing. Of course, there is also a current flowing in the load outside of periods t1-t2 and t3-t4. This current, supplied by the charge of the capacitor C1, has not been shown since we only want to explain here the shape of the current supplied by the sector, which is zero outside the periods t1-t2 and t3-t4.
  • Figure 4D illustrates the total current extracted from the rectified supply during periods t1-t2 and t3-t4.
  • This current I is the superposition of the currents I L and I C1 , that is to say that each current peak has a maximum at time t1 and decreases until time t2.
  • the current limiter of the present invention makes the charging current of the capacitor C1 substantially constant to make the peaks of current I extracts from the almost constant rectified power supply but asymmetrical during the charge periods of the capacitor C1.
  • the maximum value of the current I C1 is substantially two thirds of the maximum value of the current peak in Figure 2B.
  • a third advantage of the present invention is that it is no longer useful to provide a resistor for limiting the inrush current at power-up.
  • the circuit of FIG. 3 however has a drawback notable practice to know that, for the previous explanations, we placed our in the case where the circuit of figure 3 provides the same results as that of Figure 1, i.e. that it was assumed that the current limiter was set to optimal value. In practice, it is not possible to choose this optimal current which depends on the values of the capacitor C1 and of the load L.
  • the present invention therefore provides such a circuit in which the current limiter adapts automatically to the circuit parameters (values of C1 and L).
  • a feature of the present invention is that the current limiter is controlled according to the signal taken on rectifier 1 and requires no control signal from of the load L.
  • the supply circuit is, according to the present invention, independent of the type of load supplied and can be inserted in a classic circuit between a rectifier bridge and a load, for example a power supply cutting, without the need to make changes to the conventional load to take a control signal from it.
  • FIG. 5 shows a first example of a diagram detailed description of the first embodiment of the invention in which a full-wave rectifier 1 supplies a load L and is associated with a capacitor C1 via a path discharge fixed by a diode D1 and a fixed charge path by a diode D2.
  • the current limiter of the charge path is realized in the form of a MOS transistor at N channel with M1 enrichment. It is known that such a component operates as a current limiter if its gate-source voltage is fixed at a constant value, the limiting value increasing with the gate-source voltage.
  • the present invention provides polarize the gate of transistor M1 by a capacitor C2 charged, with a long time constant, at a voltage which roughly corresponds to the drain-source voltage of the transistor M1.
  • the gate of transistor M1 is, in this first example, connected, via a strong resistance R1 value and of a switch T1, to the drain of this transistor M1.
  • the switch T1 produced in the embodiment shown by a PNP type bipolar transistor, is closed during charge periods of capacitor C1 and open during discharge periods.
  • FIG. 6 represents several successive alternations A1, A2, A3, A4 of the rectified mains voltage and corresponds to FIG. 4A. It is assumed that during the first two half-waves A1 and A2 the recharging of the capacitor C1 perfectly balances the discharge of this capacitor during the periods when the latter supplies the load, which corresponds to what is shown in FIG. then suppose that from alternation A3 the power required by the load L increases. Then, if the slope of the recharging of the capacitor C1, which corresponds to the limited current imposed by the transistor M1, is not modified, as can be seen during the alternation A3, the recharging of the capacitor C1 becomes insufficient.
  • the drain-source voltage V DS of the transistor M1 is, at any time during a charge period, equal to V AB - V C1 .
  • This value increases sharply during the alternation A3. Consequently, the integrated voltage stored in the capacitor C2 increases, that is to say that the gate voltage V GS of the transistor M1 increases and that the value of the limited current imposed by the transistor M1 increases.
  • the charge of the capacitor C1 is faster than previously and one returns after a few alternations to an equilibrium situation.
  • R1C2 will be chosen so that the return to equilibrium is more gradual.
  • An example of controlling the PNP transistor T1 for the turn on (bidirectionally) during periods of charge of capacitor C1 consists in connecting the base of this transistor T1 to the source terminal S of transistor M1 via of the series connection of an R2 resistor and a NPN transistor T2.
  • the base of transistor T2 is connected to the emitter of transistor T1 by a resistor R3. So the transistor T2 turns on as soon as the voltage between terminals A and B becomes greater than the voltage across the capacitor C1 (plus the voltage drops in the direct diode D2 and in the base-emitter junction of this transistor T2) and the conduction of transistor T2 causes the transistor to turn on T1, from which it follows that the capacitor C2 is capable of recharge or discharge to adapt its voltage to the voltage drop across transistor M1.
  • the width of the current peak will be determined so classical by the relation between the capacitance of the capacitor C1 and the load demand of the load L.
  • Figure 7 shows a second example diagram detail of the first embodiment of the invention.
  • the diode (D2, figures 3 and 5) interspersed on the charging path has been removed.
  • the role of this diode can be played by the diodes of the righting bridge 1.
  • An advantage of such removal is that the N-channel power MOS transistor can then be used both for charging and for discharging the capacitor C1 and that the diode (D1, figures 3 and 5) of the discharge path can be deleted.
  • the role of this diode can then be played by the diode D'1 internal to the MOS transistor M1.
  • the load L consists of a power supply switching, insofar as the current passing through the MOS transistor, outside of charge periods of capacitor C1, is then at the frequency of the switching power supply.
  • the automatic control of transistor M1 is always provided by a charged C2 capacitor, with a constant of long time, at a voltage which is a function of the drain-source voltage of transistor M1.
  • the gate of transistor M1 is connected, via a PNP type bipolar transistor T1 and a high value resistance R1, at midpoint C of a series association of a resistor R4 and a diode Zener Z1 between the second terminal of capacitor C1 and the terminal B.
  • the transistor T1 always plays the role of a switch which is closed during the charging periods of capacitor C1 and open during discharge periods.
  • the transistor control T1 to turn it on (bidirectionally) for the charge periods of the capacitor C1 consists, for example, to connect the base of this transistor T1 to the source terminal of the transistor M1 (terminal B) via the connection in series of a resistor R2 and an NPN transistor T2.
  • the basis of transistor T2 is connected to point C by a resistor R3.
  • the transistor T2 turns on as soon as the voltage between the terminals A and B becomes greater than the voltage across the capacitor C1 (plus voltage drops across resistors R4 and R3 and in the base-emitter junction of transistor T2) and the conduction of the transistor T2 causes the conduction of transistor T1, capacitor C2 then being able to, as in the first example, recharge or discharge to adapt its voltage to the voltage drop across the transistor M1.
  • the resistors R1 (+ R4) and R2 constitute a divider bridge of the drain-source voltage V DS of the transistor M1.
  • Their dimensioning depends on the threshold voltage of the MOS transistor M1 in the operating current range for which the limiting circuit is intended, in order to obtain at the terminals of the capacitor C2 a ratio of the average value of the voltage V DS adapted to the speed (slope V C14 in FIG. 6) with which it is desired that the capacitor C1 regains its initial charge level following a variation in the power required by the charge L.
  • the role of the Zener diode Z1 and of the resistor R4 is to protect the transistor M1 when the circuit is energized while the capacitor C1 is not yet charged and the transistor M1 supports the voltage V AB .
  • the gate of the transistor M1 would quickly find itself at a high potential with respect to its source, which would generate a strong drain-source current and a risk of breakdown of the gate.
  • the diode Z1 cooperates with the resistor R1 and the capacitor C2 so that the increase in the gate voltage of the transistor M1 is progressive on power-up and does not reach prejudicial values for the transistor M1.
  • the transistor M1 is protected even though the circuit does not have a resistor for limiting the inrush current at the output of the rectifier bridge.
  • the Zener diode Z1 is dimensioned to support several hundred milliamps for a few periods of the sector, the time that the capacitor C1 charges.
  • Resistor R4 preferably has a low value so as not to introduce an excessive voltage drop which would delay the conduction of transistor T2. Being of low value, the resistor R4 does not introduce a voltage drop between the output of the rectifier and the load L.
  • diode Z1 and the resistor R4 are also provided (although not shown) in the example of realization of figure 5.
  • FIG. 7 an additional capacitor has been shown. C3 connected between the rectifier output terminals.
  • the capacitor C3 acts as a filter and is necessary (also in the example of FIG. 5), in the case where the load L consists of a switching power supply, to avoid reinject high-frequency noise into the mains for the charge phases of the capacitor C1 (while the charge L receives its energy directly from the sector).
  • Figure 8 shows a simplified diagram of a second embodiment of the present invention.
  • a feature of this second embodiment is that the load L is no longer connected between terminals A and B output of rectifier bridge 1 but is connected between the terminals A and D of capacitor C1, terminal D being connected to the terminal B via a current limiting device 10 '.
  • This second embodiment of the invention is more particularly intended for a load L consisting of a power supply where it has the advantage of avoiding recourse to a filtering capacitor (C3, figure 7) at the output of the bridge rectifier. Indeed, the filtering of high frequency parasites linked to the switching power supply is here directly ensured by the storage capacitor C1.
  • Figure 9 shows an example of a detailed diagram of a supply circuit according to this second embodiment.
  • the current limiter 10 ' is, as in the first embodiment, consisting of an N-channel MOS transistor with enrichment M1 and, as in the example in Figure 7, we uses the internal diode D'1 of this transistor M1 to constitute the discharge path of the capacitor C1.
  • the transistor M1 is controlled by means of an assembly incorporating the essentials of the circuit shown in figure 7. Only the differences compared to this assembly of the Figure 7 will be exposed later.
  • resistance R5 is inserted between the emitter of transistor T1 playing the role of switch and gate of transistor M1, and a capacitor C4 connects the gate and the drain D of the transistor M1.
  • the role of the R5-C4 cell is to cause polarization of the gate of transistor M1, not only of the mean value of its drain-source voltage, but adding the derivative of this drain-source voltage.
  • FIG. 10A represents, as a function of time, the rectified sector voltage V AB and the voltage V AD at the terminals of the storage capacitor C1.
  • FIG. 10B represents the current I C1 in the capacitor C1 during the charging periods.
  • the current I C1 While being substantially constant, the current I C1 exhibits a slight decrease between the instants t1 and t2 and between the instants t3 and t4 where the voltage V AB is greater than the voltage across the capacitor. This decrease is due to the derivative of the drain-source voltage of the transistor M1 provided by the cell R5-C4.
  • An advantage of this embodiment is that, as illustrated in FIG. 10A, the voltage V AD is closer to the voltage V AB during the charging periods than in the first embodiment. Thus, the consumption of the supply circuit is minimized to the extent that the power dissipation in the transistor M1 is proportional to its drain-source voltage drop V DS .
  • a Zener diode Z2 will preferably be provided between the resistor R1 and the anode of the Zener diode Z1 (point C) to which the resistor R3 is connected, a capacitor C5 being associated in parallel with this Zener diode Z2.
  • the resistors R1 and R2 can then, if necessary, be dimensioned so that the ratio of the divider bridge that they constitute is substantially equal to 1.
  • the diode Z2 adds a voltage to that of the gate of the transistor M1 so that the gate voltage of transistor M1 is substantially constant and that the average voltage V DS during conduction is greater than this gate voltage and substantially equal to the voltage V GS .
  • the role of the capacitor C5 is to maintain the voltage insofar as the diode Z2 is not always crossed by a current.
  • the present invention is capable of various variants and modifications which will appear to the man of art, in particular, with regard to the realization of the limiter current, the realization of a control circuit having for function of adjusting the voltage drop across this limiter of current at an optimal value, and the realization of a circuit allowing to validate the control circuit only during the charging phases of the capacitor C1.

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Claims (11)

  1. Versorgungsschaltung mit einem Speicherkondensator, die an den Anschlüssen einer Gleichrichterbrücke (1) einen Speicherkondensator (C1) in Serie mit einer Parallelschaltung eines Lade- und eines Entladeweges aufweist, dadurch gekennzeichnet, dass der Ladeweg einen Strombegrenzer (10, 10') aufweist, dessen Grenzwert durch eine die mittlere Spannung an den Anschlüssen des Begrenzers speichernde Einrichtung gesteuert wird, wodurch der Speicherkondensator (C1) während jeder seiner Ladephasen mit einem im wesentlichen konstanten Strom in Abhängigkeit dieser mittleren Spannung geladen wird.
  2. Schaltung nach Anspruch 1, dadurch gekennzeichnet, dass der Strombegrenzer ein N-Kanal-MOS-Transistor vom Anreichungstyp (M1) ist, dem Vorspannungseinrichtungen für die Gate-Elektrode zugeordnet sind.
  3. Schaltung nach Anspruch 2, dadurch gekennzeichnet, dass die Vorspannungseinrichtungen für die Gate-Elektrode Einrichtungen (C2) zum Speichern einer Spannung aufweist, die eine Funktion der Spannung zwischen der Drain-Elektrode und der Source-Elektrode des MOS-Transistors (M1) ist, wobei die Zeitkonstante dieser Speichereinrichtungen in Hinblick auf die Periode der Eingangssignale der Gleichrichterbrücke lang ist.
  4. Schaltung nach Anspruch 3, dadurch gekennzeichnet, dass die Vorspannungseinrichtungen für die Gate-Elektrode zwischen der Drain-Elektrode und der Source-Elektrode des Begrenzertransistors (M1) eine Serienschaltung aus einem bidirektionalem Schalter (T1), der während der Ladeperioden in den Schließzustand gesteuert wird, aus mindestens einem ersten Widerstand (R1) und einem zweiten Kondensator (C2) besteht, wobei der zweite Kondensator die besagten Speichereinrichtungen bildet.
  5. Schaltung nach Anspruch 4, dadurch gekennzeichnet, dass der Schalter (T1) ein erster bipolarer Transistor vom PNP-Typ ist.
  6. Schaltung nach Anspruch 5, dadurch gekennzeichnet, dass die Steuereinrichtungen für den Schalter einen zweiten Widerstand (R2), der mit der Basis des ersten bipolaren Transistors (T1) verbunden ist, einen zweiten bipolaren Transistor (T2) vom NPN-Typ, der zwischen den zweiten Widerstand und die Source-Elektrode des Begrenzertransistors (M1) geschaltet ist, und einen dritten Widerstand (R3) aufweisen, der zwischen die Basis des zweiten bipolaren Transistors (T2) und einen Punkt mit einem Potential geschaltet ist, das nahe demjenigen der Drain-Elektrode des Begrenzertransistors (M1) ist.
  7. Schaltung nach Anspruch 6, bei der eine Last (L) mit den Ausgangsanschlüssen (A, B) der Gleichrichterbrücke (1) verbunden ist, dadurch gekennzeichnet, dass der zweite Kondensator (C2) zwischen die Gate-Elektrode und die Source-Elektrode des Begrenzertransistors (M1) geschaltet ist.
  8. Schaltung nach Anspruch 7, dadurch gekennzeichnet, dass der erste Widerstand (R1) einen hohen Wert aufweist und zwischen die Gate-Elektrode des Begrenzertransistors (M1) und den Kollektor des ersten bipolaren Transistors (T1) geschaltet ist, wobei ein Anschluss des dritten Widerstandes (R3) und der Emitter des ersten bipolaren Transistors mit der Drain-Elektrode des Begrenzertransistors verbunden sind, wodurch der zweite Kondensator (C2) eine Spannung speichert, die im wesentlichen der mittleren Spannung zwischen der Drain-Elektrode und der Source-Elektrode des Begrenzertransistors entspricht.
  9. Schaltung nach Anspruch 6, dadurch gekennzeichnet, dass ein erster Anschluss des ersten Widerstandes (R1) mit dem Kollektor des ersten bipolaren Transistors (T1) verbunden ist, und dass der Emitter des ersten bipolaren Transistors mit einem ersten Anschluss des zweiten Kondensators (C2) verbunden ist, dessen zweiter Anschluss mit der Source-Elektrode des Begrenzertransistors (M1) verbunden ist.
  10. Schaltung nach Anspruch 9, dadurch gekennzeichnet, dass eine Last (L) mit den Anschlüssen des Speicherkondensators (C1) verbunden ist, dass die Vorspannungseinrichtungen für die Gate-Elektrode zusätzlich einen fünften Widerstand (R5), der zwischen den Emitter des ersten bipolaren Transistors (T1) und die Gate-Elektrode des Begrenzertransistors (M1) geschaltet ist, und einen dritten Kondensator (C4) aufweisen, der zwischen die Drain-Elektrode und die Gate-Elektrode des Begrenzertransistors geschaltet ist, wodurch die Gate-Elektrode des Begrenzertransistors mit einer Spannung vorgespannt wird, die der Summe einer ersten zu der Spannung zwischen der Drain-Elektrode und der Source-Elektrode des Begrenzertransistors proportionalen Spannung und einer zweiten Spannung entspricht, die proportional zu der Ableitung der Spannung zwischen der Drain-Elektrode und der Source-Elektrode des Begrenzertransistors ist.
  11. Schaltung nach Anspruch 9, dadurch gekennzeichnet, dass sie zusätzlich einen vierten Widerstand (R4) mit kleinem Wert aufweist, der in Serie mit einer Zener-Diode (Z1) zwischen die Drain-Elektrode und die Source-Elektrode des Begrenzertransistors (M1) geschaltet ist, wobei der Mittelpunkt der Serienschaltung aus dem vierten Widerstand und der Zener-Diode mit einem zweiten Anschluss des ersten Widerstandes (R1) verbunden ist.
EP97901107A 1996-01-19 1997-01-17 Leistungsversorgungsschaltung mit einem speicherkondensator Expired - Lifetime EP0815635B1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR9600810A FR2743953B1 (fr) 1996-01-19 1996-01-19 Circuit d'alimentation a condensateur de stockage
FR9600810 1996-01-19
PCT/FR1997/000089 WO1997026701A1 (fr) 1996-01-19 1997-01-17 Circuit d'alimentation a condensateur de stockage

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EP0815635A1 EP0815635A1 (de) 1998-01-07
EP0815635B1 true EP0815635B1 (de) 2002-04-03

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US (1) US5844792A (de)
EP (1) EP0815635B1 (de)
DE (1) DE69711494D1 (de)
FR (1) FR2743953B1 (de)
WO (1) WO1997026701A1 (de)

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FR2765045B1 (fr) * 1997-06-24 1999-09-03 Sgs Thomson Microelectronics Dispositif d'ajustement du courant de charge d'un condensateur de stockage
JP2000197365A (ja) * 1998-12-24 2000-07-14 Denso Corp 直流電源回路
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WO1997026701A1 (fr) 1997-07-24
FR2743953A1 (fr) 1997-07-25
DE69711494D1 (de) 2002-05-08
EP0815635A1 (de) 1998-01-07
US5844792A (en) 1998-12-01
FR2743953B1 (fr) 1998-04-10

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