EP0715240B1 - Régulateur de tension pour circuit logique en mode couple - Google Patents
Régulateur de tension pour circuit logique en mode couple Download PDFInfo
- Publication number
- EP0715240B1 EP0715240B1 EP95410136A EP95410136A EP0715240B1 EP 0715240 B1 EP0715240 B1 EP 0715240B1 EP 95410136 A EP95410136 A EP 95410136A EP 95410136 A EP95410136 A EP 95410136A EP 0715240 B1 EP0715240 B1 EP 0715240B1
- Authority
- EP
- European Patent Office
- Prior art keywords
- voltage
- source
- transistor
- regulator
- current source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
- G05F3/267—Current mirrors using both bipolar and field-effect technology
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S323/00—Electricity: power supply or regulation systems
- Y10S323/907—Temperature compensation of semiconductor
Definitions
- the present invention relates to a voltage source of reference intended to control a current source of a logic circuit in coupled mode (CML). It applies more particularly to the realization of a voltage regulator intended to operate under a low supply voltage of 3 volts.
- Logic circuits in coupled mode are distributed basically in two categories.
- Logic circuits with coupled transmitters are made from transistors bipolar.
- Logic circuits with coupled sources are made from MOS transistors.
- any logic circuit we seek to obtain a lowest possible supply voltage to generate minimum energy consumption.
- the minimum value of the supply voltage is limited by the circuits used to supply the logic circuit current sources, a stable reference voltage in case of variation of the supply voltage Vcc or operating temperature. This is to keep the input level deviation constant or output from a logic gate.
- This difference can be expressed for an ECL logic as the potential difference AV between two complementary outputs of the logic gate.
- SCL logic this difference can be expressed as the difference AV potential between two complementary inputs of the logic gate.
- the AV gap between two levels of a logic gate whether ECL or SCL logic is for example 0.4 volts.
- the invention aims to propose a voltage regulator realized in BICMOS technology which can be intended for current sources of an ECL or SCL logic circuit while allowing a low supply voltage of around 3 volts.
- the present invention provides a voltage regulator for controlling at least one current source of at least one logic gate in coupled mode and which comprises a first current source produced in bipolar technology mounted between ground and a first resistance connected to a supply voltage, said first source being controlled by the voltage across a second resistance which is crossed by a current supplied by a second current source produced in MOS technology, the value of the current of said second source determining the potential of a regulator output terminal by reproduction of this current on a third current source mounted in mirror on the second source.
- said second current source consists of a MOS transistor with channel P whose source is connected to the supply voltage, whose grid is connected to its own drain and to the gate of a P channel MOS transistor constituting the third current source, the drain of said MOS transistor of the third current source constituting the output terminal of the regulator.
- the regulator includes a first voltage source produced in bipolar technology and connected in series with one second opposite voltage source allowing the postponement of the voltage across the first current source across the terminals of the second resistance.
- the regulator further includes deletion switches any energy consumption of the regulator outside its periods of use.
- said first current source consists of two transistors NPN type bipolar mirror mounted, the transmitter of a first transistor being connected to ground via of two resistors connected in series while the transmitter of a second transistor is connected to the connection point between said two resistors, the bases of the two transistors constituting a current source control terminal while the collector of the second transistor constitutes an output terminal connected to the first voltage source.
- said first voltage source consists of a bipolar transistor PNP type whose collector is connected to ground, whose base is connected to the second transistor of the first current source and whose transmitter is connected to the grid of a N-channel MOS transistor constituting the second source of voltage, the source of said MOS transistor of the second source of voltage being connected to ground while its drain is connected to the drain of the MOS transistor of the second source of current.
- the regulator further includes three P-channel MOS transistors including the sources are connected to the supply voltage by through a first switch, including the grids are connected to a starting assistance device and whose drains are respectively connected to the collectors of the transistors from the first current source and to the emitter of the transistor constituting the first source of tension.
- a current source of a logic gate consists of a transistor N-channel MOS with grid and drain connected, the drain of said transistor being connected to the output terminal of the regulator and its source being connected to ground.
- the regulator includes a voltage-current converter mounted between the regulator output terminal and ground, said converter being made up of a bipolar transistor of the NPN type of which the transmitter is connected to ground via a resistance and whose collector is connected to said terminal exit ; a current source of a logic gate being constituted an NPN type bipolar transistor whose emitter is connected to ground via a resistor and which is mirrored on the transistor of said converter voltage-current.
- the regulator further comprises an NPN type bipolar transistor of compensation of the base currents of the current source of the logic gate, the base of said compensation transistor being connected to the regulator output terminal while its collector is connected to the supply voltage and that its transmitter is connected to the base of the transistor of said converter voltage-current.
- a voltage regulator according to the invention such as shown in Figure 1 has a first current source 11 controlled by the voltage across a resistor R21 placed between ground and a node C of the circuit.
- Source 11 made in bipolar technology, is placed between the ground and a first voltage source 12 which is connected to the supply voltage via a resistor R22.
- the connection node between resistance R22 and the source voltage 12 is connected to node C via a second voltage source 13.
- the node C is connected to the voltage Vcc supply via a second current source 14 made in MOS technology.
- a third current source 15, also in MOS technology is mounted mirrored on the source 14 and is connected to an output terminal S of the regulator. The value of the output voltage Vcs on the terminal S is fixed by the value of resistance R21 and of current I supplied by current source 14 and mirrored on the source 15.
- the potential of the output terminal S is equal to the potential of node C which corresponds to the product of the resistance R21 by current I.
- the potential of node C is regulated as a function of temperature by means of the source 11.
- this potential being fixed by the source 11 with respect to ground, it is independent of the supply voltage Vcc.
- the role of the voltage source 12 is to compensate the voltage drop provided by the source 13 which constitutes a voltage follower allowing the voltage to be transferred to the terminals from source 11 on node C.
- a change in temperature results in a variation of the value of the resistance R21. This variation is compensated by a variation of the potential of the node C by through the source 11.
- the potential Vcs of the output terminal S delivered to the terminals of a load Q is independent temperature and supply voltage Vcc.
- the minimum supply voltage of the regulator according to the invention may be weak, as will be shown in relationship with each of the embodiments described below.
- An advantage of the present invention is that such regulator can be used to control power sources which are carried out either in bipolar technology or in MOS technology.
- the invention provides a adaptation of the device output to allow control by running from source 15 which is in technology MOS.
- Figure 3 illustrates this application.
- Figure 2 shows the diagram of a regulator such as shown in Figure 1 for the control of sources of current of a logic circuit based on transistors MOS.
- the current source 11 consists of two transistors NPN type Tll and T12 bipolar linked by a factor of surface and whose bases are connected to each other and to a first terminal of resistance R21.
- the other resistance R21 is connected to ground.
- the transistor emitter Tll is connected to ground via two resistors R23 and R24 connected in series. The connection between these two resistors is connected to the emitter of transistor T12.
- Collectors transistors T11 and T12 are respectively connected the drains of two P-channel MOS transistors MP11 and MP12, the gates are connected together and to the drain of the transistor MP11.
- the sources of the transistors MP11 and MP12 are connected together at the supply voltage Vcc via a first switch 16 whose role will be explained more far.
- the collector of transistor T12 which constitutes the output of the power source 11 is connected to the base of a bipolar transistor T13 of PNP type constituting the source of voltage 12.
- the collector of transistor T12 is connected to the ground and its emitter is connected to the drain of a MOS transistor at P channel MP13 as well as the gate of an N channel MOS transistor MN13.
- the transistors MP11, MP12 and MP13 correspond to the resistance R22 symbolized in Figure 1.
- the gate of the transistor MP13 is connected to the drain of transistor MP11 which constitutes a START input terminal of a device to assist in starting the regulator.
- the device starting aid is a classic device which is not shown.
- the START input terminal may if necessary, correspond to the emitter of transistor T11.
- the transistor MN13 constitutes the voltage source 13 of the diagram represented in figure 1.
- the source of this transistor is connected to ground via the resistor R21 while its drain is connected to the drain of a MOS transistor P channel MP14.
- the transistor MP14 constitutes the current source 14. Its source is connected to the supply voltage Vcc while its grid is connected to its drain and the grid an MP15 P channel MOS transistor.
- This MP15 transistor constitutes the current source 15 and its source is connected to the supply voltage Vcc while its drain constitutes the regulator output terminal S.
- the regulator also has two other switches 17 and 18.
- the switch 17 consists of a transistor MN14 N-channel MOS whose source is connected to ground and whose drain is connected to the gate of transistor MN13.
- the gate of transistor MN14 is connected to a control terminal PWD.
- the switch 18 consists of a MOS transistor with N channel MN15 whose source is connected to ground and whose drain is connected to the output terminal S of the regulator. Grid of transistor MN15 is connected to the control terminal PWD.
- the switch 16 consists of a P-channel MOS transistor MP16 whose source is connected to the supply voltage and whose drain is connected to the sources of the transistors MP11, MP12 and MP13. The gate of the transistor MP16 is connected to a terminal of NPWD command.
- switches 16, 17 and 18 The role of switches 16, 17 and 18 is to remove all energy consumption from the regulator outside periods of use under the action of a control signal PWD and its inverse NPWD. When the regulator is in operation, the position of the switches is thus closed for switch 16 (transistor MP16 on) and open for switches 17 and 18 (transistors MN14 and MN15 blocked).
- a capacitor C is inserted between the base of the transistor T13 and ground to provide an alternative ground based on transistor T13.
- the charge Q here consists of one (or more) current source 2 of an SCL logic.
- One such source is conventionally constituted by an N channel MOS transistor MN3 of which the source is connected to ground and whose drain is connected to its own grid and sources of MOS transistors (not shown) logic with coupled sources.
- the transistor gate MN3 is the control input for the current source 2.
- the voltage Vcs at the terminals of the charges Q is equal to R21 * I, where I represents the current of the source 14.
- Minimum operating supply voltage of such a regulator is about 2.2 volts corresponding to two threshold voltages of MOS transistors (those of transistors MP14 and MN13) and at a base-emitter voltage (that of the transistor T12).
- a regulator as shown in FIG. 2 produced with the following resistance values and the width to gate length ratios (W / L) for the MOS transistors makes it possible to obtain an operating range in supply voltage of 2.2 to 7 volts and a Vcs voltage of 0.4 volts.
- R21 30 k ⁇ ;
- R23 10.8 k ⁇ ;
- R24 74.1 k ⁇ ;
- Figure 3 shows the diagram of a regulator such as shown in Figure 1 for the control of sources of current of a logic circuit based on transistors bipolar.
- the charge Q here consists of one (or more) current source 1 of an ECL logic gate.
- a source conventionally consists of a bipolar transistor of the type NPN T3 whose transmitter is connected to ground via with a resistor R3 and whose collector is connected to the emitters of bipolar transistors (not shown) of the logic with coupled transmitters.
- the base of transistor T3 constitutes the input current source control 1.
- transistor MP15 no longer directly constitutes the output terminal S of the regulator, but is connected to the collector of a NPN T14 bipolar transistor of which the transmitter is connected to ground via a resistance R25.
- the transistor T14 plays the role of a converter voltage-current to allow current control of bipolar transistors T3 of the loads Q.
- the transistors T3 of the charges Q are mirrored on transistor T14.
- transistor T14 is linked to the fact that the current sources being produced in bipolar technology, they are controlled by current while in the case from source. in MOS technology they are voltage controlled.
- a bipolar transistor T15 of NPN type is connected by its base to the drain of the MP15 transistor while that its collector is connected to the supply voltage Vcc and that its emitter is connected to the base of transistor T14.
- This transistor T15 makes it possible to supply sufficient current for control a large number of sources 1 using the same regulator.
- the switch 18 is here placed in parallel on the resistance R21. Switch 18 now acts on the bases transistors T11 and T12.
- Vcs of the regulator is here equal to R25 * I + Vbe 14 , where Vbe 14 represents the base-emitter voltage of the transistor T14 and where I represents the current mirrored on the source 14.
- Minimum operating supply voltage of such a regulator is about 2.5 volts corresponding to the threshold voltage of transistor MP15 and two base-emitter voltages (those of transistors T14 and T15).
- the maximum value current that can be delivered to drive transistors T3 from sources 1 is around 1 mA, which corresponds to a control capacity of around four hundred sources 1.
- a regulator as shown in FIG. 3 produced with the following resistance values and the W / L ratios for the MOS transistors makes it possible to obtain an operating range in supply voltage of 2, 5 to 7 volts and a Vcs voltage of 0.4 volts.
- R21 30 k ⁇ ;
- R23 10.8 k ⁇ ;
- R24 74.1 k ⁇ ;
- R25 1 k ⁇ ;
- W / L (MP11, MP12) 40/10;
- W / L (MP15) 2050/10;
- the invention makes it possible to use a low voltage power supply of about 3 volts whether for current sources in bipolar or MOS technology.
- Voltage Vcs delivered by the regulator is also stable in the event of variation of temperature and / or supply voltage.
- the present invention is susceptible various variants and modifications that will appear at one skilled in the art.
- each of the components described may be replaced by one or more elements filling the same function.
- the dimensioning of the different constituents is at the scope of the skilled person according to the functional indications given in the present description.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Nonlinear Science (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
- Control Of Electrical Variables (AREA)
- Logic Circuits (AREA)
- Amplifiers (AREA)
Description
R21 = 30 kΩ ; | R23 = 10,8 kΩ ; |
R24 = 74,1 kΩ ; | W/L(MP11, MP12) = 40/5 ; |
W/L(MP13) = 10/2 ; | W/L(MP14) = 100/3 ; |
W/L(MP15) = 600/3 ; | W/L(MP16, MN13) = 100/0,7 ; |
W/L(MN14, MN15) = 3/1. |
R21 = 30 kΩ ; | R23 = 10,8 kΩ ; |
R24 = 74,1 kΩ ; | R25 = 1 kΩ ; |
W/L(MP11, MP12) = 40/10 ; | W/L(MP13) = 10/5 ; |
W/L(MP14) = 200/6 ; | W/L(MP15) = 2050/10 ; |
W/L(MP16, MN13) = 100/0,7 ; | W/L(MN14, MN15) = 3/1. |
Claims (10)
- Régulateur de tension destiné à commander au moins une source de courant (1 ; 2) d'au moins une porte logique en mode couplé (CML), caractérisé en ce qu'il comporte une première source de courant (11) réalisée en technologie bipolaire montée entre la masse et une première résistance (R22) connectée à une tension d'alimentation (Vcc), ladite première source (11) étant commandée par la tension aux bornes d'une seconde résistance (R21) qui est traversée par un courant (I) fourni par une deuxième source de courant (14) réalisée en technologie MOS, la valeur du courant (I) de ladite deuxième source (14) déterminant le potentiel d'une borne de sortie (S) du régulateur par reproduction de ce courant sur une troisième source de courant (15) montée en miroir sur la deuxième source (14).
- Régulateur de tension selon la revendication 1, caractérisé en ce que ladite deuxième source de courant (14) est constituée d'un transistor MOS à canal P (MP14) dont la source est connectée à la tension d'alimentation (Vcc), dont la grille est reliée à son propre drain et à la grille d'un transistor MOS à canal P (MP15) constitutif de la troisième source de courant (15), le drain dudit transistor MOS (MP15) de la troisième source de courant constituant la borne de sortie (S) du régulateur.
- Régulateur de tension selon la revendication 2, caractérisé en ce qu'il comporte une première source de tension (12) réalisée en technologie bipolaire et montée en série avec une seconde source de tension (13) de sens opposé permettant le report de la tension aux bornes de la première source de courant (11) aux bornes de la seconde résistance (R21).
- Régulateur de tension selon la revendication 2 ou 3, caractérisé en ce qu'il comporte en outre des interrupteurs (16, 17, 18) de suppression de toute consommation d'énergie du régulateur hors de ses périodes d'utilisation.
- Régulateur de tension selon la revendication 3 ou 4, caractérisé en ce que ladite première source de courant (11) est constituée de deux transistors bipolaires de type NPN montés en miroir, l'émetteur d'un premier transistor (T11) étant connecté à la masse par l'intermédiaire de deux résistances (R23, R24) montées en série tandis que l'émetteur d'un second transistor (T12) est relié au point de liaison entre lesdites deux résistances (R23, R24), les bases des deux transistors (T11, T12) constituant une borne de commande de la source de courant (11) tandis que le collecteur du second transistor (T12) en constitue une borne de sortie reliée à la première source de tension (12).
- Régulateur de tension selon la revendication 5, caractérisé en ce que ladite première source de tension (12) est constituée d'un transistor bipolaire de type PNP (T13) dont le collecteur est connecté à la masse, dont la base est reliée au second transistor (T12) de la première source de courant (11) et dont l'émetteur est relié à la grille d'un transistor MOS à canal N (MN13) constitutif de la seconde source de tension (13), la source dudit transistor MOS (MN13) de la seconde source de tension (13) étant connectée à la masse tandis que son drain est relié au drain du transistor MOS (MP14) de la deuxième source de courant (14).
- Régulateur de tension selon la revendication 6, caractérisé en ce qu'il comporte en outre trois transistors MOS à canal P (MP11, MP12, MP13) dont les sources sont connectées à la tension d'alimentation (Vcc) par l'intermédiaire d'un premier interrupteur (16), dont les grilles sont reliées à un dispositif d'aide au démarrage et dont les drains sont respectivement reliés aux collecteurs des transistors (T11, T12) de la première source de courant (11) et à l'émetteur du transistor (T13) constitutif de la première source de tension (12).
- Régulateur de tension selon l'une quelconque des revendications 1 à 7, caractérisé en ce qu'une source de courant (2) d'une porte logique est constituée d'un transistor MOS à canal N (MN3) à grille et drain reliés, le drain dudit transistor (MN3) étant raccordé à la borne de sortie (S) du régulateur et sa source étant connectée à la masse.
- Régulateur de tension selon l'une quelconque des revendications 1 à 7, caractérisé en ce qu'il comporte un convertisseur tension-courant monté entre la borne de sortie (S) du régulateur et la masse, ledit convertisseur étant constitué d'un transistor bipolaire de type NPN (T14) dont l'émetteur est connecté à la masse par l'intermédiaire d'une résistance (R25) et dont le collecteur est relié à ladite borne de sortie (S) ; et en ce qu'une source de courant (1) d'une porte logique est constituée d'un transistor bipolaire de type NPN (T3) dont l'émetteur est connecté à la masse par l'intermédiaire d'une résistance (R3) et qui est monté en miroir sur le transistor (T14) dudit convertisseur tension-courant.
- Régulateur de tension selon la revendication 9, caractérisé en ce qu'il comporte en outre un transistor bipolaire de type NPN (T15) de compensation des courants de base de la source de courant (1) de la porte logique, la base dudit transistor de compensation (T15) étant reliée à la borne de sortie (S) du régulateur tandis que son collecteur est connecté à la tension d'alimentation (Vcc) et que son émetteur est relié à la base du transistor (T14) dudit convertisseur tension-courant.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9414604A FR2727534A1 (fr) | 1994-11-30 | 1994-11-30 | Regulateur de tension pour circuit logique en mode couple |
FR9414604 | 1994-11-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0715240A1 EP0715240A1 (fr) | 1996-06-05 |
EP0715240B1 true EP0715240B1 (fr) | 2000-06-07 |
Family
ID=9469484
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP95410136A Expired - Lifetime EP0715240B1 (fr) | 1994-11-30 | 1995-11-27 | Régulateur de tension pour circuit logique en mode couple |
Country Status (5)
Country | Link |
---|---|
US (1) | US5646517A (fr) |
EP (1) | EP0715240B1 (fr) |
JP (1) | JP2920246B2 (fr) |
DE (1) | DE69517395T2 (fr) |
FR (1) | FR2727534A1 (fr) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4208770B2 (ja) * | 2004-06-10 | 2009-01-14 | キヤノン株式会社 | 記録ヘッド及び該記録ヘッドが用いられる記録装置 |
JP6836917B2 (ja) * | 2017-01-24 | 2021-03-03 | シナプティクス・ジャパン合同会社 | 電圧生成回路 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US458088A (en) * | 1891-08-18 | Corn-harvester | ||
US4234841A (en) * | 1979-02-05 | 1980-11-18 | Rca Corporation | Self-balancing bridge network |
JPS5931404A (ja) * | 1982-08-16 | 1984-02-20 | Hitachi Ltd | 圧力センサ回路 |
DE3341344C2 (de) * | 1983-11-15 | 1986-10-09 | SGS-ATES Deutschland Halbleiter-Bauelemente GmbH, 8018 Grafing | Längsspannungsregler |
US4751404A (en) * | 1986-10-31 | 1988-06-14 | Applied Micro Circuits Corporation | Multi-level ECL series gating with temperature-stabilized source current |
US4857823A (en) * | 1988-09-22 | 1989-08-15 | Ncr Corporation | Bandgap voltage reference including a process and temperature insensitive start-up circuit and power-down capability |
US4943737A (en) * | 1989-10-13 | 1990-07-24 | Advanced Micro Devices, Inc. | BICMOS regulator which controls MOS transistor current |
US5121049A (en) * | 1990-03-30 | 1992-06-09 | Texas Instruments Incorporated | Voltage reference having steep temperature coefficient and method of operation |
US5084665A (en) * | 1990-06-04 | 1992-01-28 | Motorola, Inc. | Voltage reference circuit with power supply compensation |
IT1244341B (it) * | 1990-12-21 | 1994-07-08 | Sgs Thomson Microelectronics | Generatore di tensione di riferimento con deriva termica programmabile |
-
1994
- 1994-11-30 FR FR9414604A patent/FR2727534A1/fr active Granted
-
1995
- 1995-11-22 US US08/561,520 patent/US5646517A/en not_active Expired - Lifetime
- 1995-11-27 DE DE69517395T patent/DE69517395T2/de not_active Expired - Fee Related
- 1995-11-27 EP EP95410136A patent/EP0715240B1/fr not_active Expired - Lifetime
- 1995-11-29 JP JP7332554A patent/JP2920246B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE69517395D1 (de) | 2000-07-13 |
US5646517A (en) | 1997-07-08 |
FR2727534A1 (fr) | 1996-05-31 |
EP0715240A1 (fr) | 1996-06-05 |
JPH08237098A (ja) | 1996-09-13 |
FR2727534B1 (fr) | 1997-02-14 |
JP2920246B2 (ja) | 1999-07-19 |
DE69517395T2 (de) | 2001-01-18 |
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