EP0683586A2 - FSK-Empfänger - Google Patents

FSK-Empfänger Download PDF

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Publication number
EP0683586A2
EP0683586A2 EP95107807A EP95107807A EP0683586A2 EP 0683586 A2 EP0683586 A2 EP 0683586A2 EP 95107807 A EP95107807 A EP 95107807A EP 95107807 A EP95107807 A EP 95107807A EP 0683586 A2 EP0683586 A2 EP 0683586A2
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EP
European Patent Office
Prior art keywords
signal
fsk
circuit
receiver according
received
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP95107807A
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English (en)
French (fr)
Other versions
EP0683586A3 (de
Inventor
Josef Schuermann
Andreas Hagl
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Deutschland GmbH
Original Assignee
Texas Instruments Deutschland GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Deutschland GmbH filed Critical Texas Instruments Deutschland GmbH
Publication of EP0683586A2 publication Critical patent/EP0683586A2/de
Publication of EP0683586A3 publication Critical patent/EP0683586A3/xx
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14—Demodulator circuits; Receiver circuits
    • H04L27/156—Demodulator circuits; Receiver circuits with demodulation using temporal properties of the received signal, e.g. detecting pulse width
    • H04L27/1563—Demodulator circuits; Receiver circuits with demodulation using temporal properties of the received signal, e.g. detecting pulse width using transition or level detection
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14—Demodulator circuits; Receiver circuits
    • H04L27/142—Compensating direct current components occurring during the demodulation and which are caused by mistuning

Definitions

  • This invention generally relates to Frequency Shift Keying receivers in any digital data transmission system.
  • Remote RF identification (ID) systems is a growing field where modulation schemes abound.
  • One example of a remote RE ID system comprises a reader which transmits a powering pulse to a transponder lying within the range of the reader. The transponder sends a modulated data stream representative of an identification code or some sensor information back to the reader where the data is demodulated by the reader.
  • resilience to noise interference is a necessity when choosing a adulation scheme. Therefore, generally some form of frequency modulation is utilized due to it's greater resilience to noise than either amplitude or phase modulation schemes.
  • FSK modulation Frequency Shift Keying
  • FSK modulation has many advantages such as ease of facilitation, noise resiliency and narrow bandwidth requirements. Narrow bandwidth requirements translate into higher noise immunity and spectrum efficiency, both advantageous characteristics.
  • FSK modulation works well when the two frequencies are shifted far apart from one another and equally as well when the two frequencies are relatively close to one another on the frequency scale. However, when the two frequencies are relatively close to one another, i.e. separated by 10 KHz, demodulation of the data received by the reader may be more difficult.
  • FIG. 1 One possible method of demodulation of the FSK data is shown in Figure 1 .
  • the FSK response signal is received by antenna circuit 10 and heterodyned down to 21.8 KHz via mixer 22 which mixes the transponder mid-frequency of 129.2 KHz with LO source 26 of 151 KHz.
  • the IF frequencies are selectively band filtered out of the range of frequencies coming from the output of mixer circuit 22 by the selective either bandpass or lowpass filter 24 .
  • the band filtered signals are then selectively amplified by the amplifier 12 .
  • Those amplified signals are then amplitude limited by the limiter/comparator circuit 14 and then demodulated by the FSK Demodulator circuit 58 .
  • a possible configuration for a demodulator 58 and it's operation follows.
  • a zero detector circuit 36 combined with a timer circuit 38 performs the function of demodulating the baseband signals to determine which bit, respectively the low or high bit FSK frequency, is being sent.
  • the demodulation can be performed by determining the number of zero crossings in a given time duration via circuit 36 wherein the timer circuit 38 provides the time base reference.
  • the amount of time elapsed between one zero crossing to another zero crossing will be different for different frequencies, i.e. 124.2 KHz and 134.2 KHz, and therefore the number of zero crossings in the same amount of time will be different for different frequencies.
  • circuit 36 From the output of circuit 36 comes a train of pulses of constant width and various periods, depending upon how many zero crossings were detected, which subsequently gets shaped by monoflop 16 into a well defined pulse. This well defined pulse is then integrated through integrator 18 which yields different D.C. levels.
  • a Schmitt Trigger can be used to distinguish between the two D.C. levels and yield either the high or low FSK bit.
  • Distinguishing between the low and high bit when there is little shift between the two frequencies can prove to be difficult because the D.C. levels can differ very little. Since the D.C. levels can differ very little, depending upon the FSK shift, the reference setting for a comparator to differentiate between two D.C. levels is critical.
  • An object of the invention is to provide a low-cost FSK receiver which self-calibrates itself such that demodulation of the FSK data stream is performed significantly more reliably with the least amount of additional cost and components and is easily integrateable into existing receiver systems.
  • the reference setting for the comparator in the demodulator which distinguishes between two different D.C. levels to yield either a high or low bit, is derived from the same oscillator that is used as LO to derive the IF frequencies.
  • Another option is to use the time base oscillator from the microprocessor to derive a frequency base.
  • the generated reference setting signal is subjected to the same FSK signal processing chain as the IF frequencies described above, in order to provide a DC reference equivalent to the mid-FSK frequency.
  • the FSK signals once received by antenna 10 , are amplified by amplifier circuit 12 , band-filtered by band-filter circuit 24 and demodulated by a demodulator circuit 36 .
  • Demodulator circuit 36 consists of two signal processing paths. The first signal processing path is the FSK signal path with the limiter/comparator circuit 14 followed by a monoflop 15 and an integrator 16 .
  • the second signal processing path is the reference signal path which has the same processing steps as the FSK signal path.
  • the second signal processing path yields a single output D.C. level used as reference for the Schmitt trigger circuit 17 .
  • the amplified, band-filtered FSK signal is applied to the input of limiter/comparator circuit 14 , and passed through a monoflop 15 which outputs a train of pulses of constant width and various periods, according to the received FSK frequencies. This train of pulses is then integrated by integrator circuit 16 . Integrator circuit 16 provides a DC level representative of the received FSK signal to the first input of a Schmitt trigger or comparator circuit 17 .
  • the LO signal of fo frequency is divided by divider 21 to provide two outputs, fo divided by N1 and fo divided by N2.
  • Frequency signal fo divided by N1 provides a stable reference signal with a mid-FSK bit frequency of 129 KHz to the input of the limiter-comparator 14' .
  • the reference signal then passes through a monoflop 15' and an integrator circuit 16' or is processed similarly as the above-mentioned channel.
  • the output of integrator circuit 16' provides a stable DC reference to the second input of the comparator/schmitt trigger circuit 17 .
  • the comparator/schmitt trigger circuit 17 distinguishes between the reference signal DC level and the received FSK signal DC level to yield either a high or low bit. Due to the fact that the components in both circuit processing paths exist as part of the same IC, as the tolerances of each IC vary characteristics of the components, those characteristics will all vary similarly. In this way, a stable DC reference frequency signal is reliably generated with minimal cost and with a minimal amount of added complexity to the IC.
  • Figure 3 shows a spectrum analysis of the FSK low and high frequencies as well as the reference frequency and the originating LO frequency.
  • Figure 3 also shows frequencies f1', f2', and f3' which represent the baseband FSK frequencies once mixed down via mixer 22 of Figure 5.
  • FIG 4 is a state diagram of the FSK and reference signals as they progress through the demodulation processing steps of the limiter/comparators, the monoflops, the integrators and finally the comparator/schmitt trigger circuit 17 as shown in Figure 2 .
  • “a” shows the received FSK high and low frequency signals.
  • “b” shows the FSK signals after having been limited by the limiter/comparator circuit 14 .
  • “c” shows the limited FSK signals after being shaped into pulses of equal magnitude, width and various periods depending upon the frequencies of the received FSK signals by comparator 14 and monoflop 15 .
  • “d' & d” shows the shaped FSK pulses after having been integrated by integrator 16 , depicting the slight variation between the two resulting D.C. levels, the D.C.
  • Comparator/schmitt trigger circuit 17 compares the FSK D.C. signal level to the D.C. level of the reference signal and yields a high or low bit in response as shown in "e".
  • Figure 5 is an extension of the embodiment described in Figure 2, including the mixing portion of the demodulation sequence.
  • the received FSK signals are mixed down to an intermediate frequency (IF) via mixer 22 while the reference signal is derived from a different divider ratio.
  • IF FSK signals and the reference signal are similarly processed in the same manner as described above in Figure 2 .
  • the D.C. level delta between the reference signal D.C. level which results upon integration of the reference signal and the IF FSK signal D.C. level which results upon integration of the IF FSK signal will be similar, just the starting IF FSK frequency will be lower than the frequency of the FSK signal received.
  • this invention also includes demodulation systems which use a separate signal generator for any and all exciter, local oscillator and reference signal generating functions.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
EP95107807A 1994-05-20 1995-05-22 FSK-Empfänger Withdrawn EP0683586A2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US24652894A 1994-05-20 1994-05-20
US246528 1994-05-20

Publications (2)

Publication Number Publication Date
EP0683586A2 true EP0683586A2 (de) 1995-11-22
EP0683586A3 EP0683586A3 (de) 1995-12-27

Family

ID=22931069

Family Applications (1)

Application Number Title Priority Date Filing Date
EP95107807A Withdrawn EP0683586A2 (de) 1994-05-20 1995-05-22 FSK-Empfänger

Country Status (2)

Country Link
EP (1) EP0683586A2 (de)
JP (1) JPH0865347A (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107147601A (zh) * 2014-08-21 2017-09-08 常州工学院 一种基于脉宽等长机制的fsk解调方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4447772A (en) * 1981-09-25 1984-05-08 Motorola Inc. Temperature stable pulse counting FM detector
JPH0650880B2 (ja) * 1987-01-30 1994-06-29 日本電気株式会社 復調回路

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
None

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107147601A (zh) * 2014-08-21 2017-09-08 常州工学院 一种基于脉宽等长机制的fsk解调方法
CN107147601B (zh) * 2014-08-21 2020-07-31 常州工学院 一种基于脉宽等长机制的fsk解调方法

Also Published As

Publication number Publication date
EP0683586A3 (de) 1995-12-27
JPH0865347A (ja) 1996-03-08

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