EP0650069A3 - Analoges mehrkanaliges Prüfsystem. - Google Patents

Analoges mehrkanaliges Prüfsystem. Download PDF

Info

Publication number
EP0650069A3
EP0650069A3 EP94307668A EP94307668A EP0650069A3 EP 0650069 A3 EP0650069 A3 EP 0650069A3 EP 94307668 A EP94307668 A EP 94307668A EP 94307668 A EP94307668 A EP 94307668A EP 0650069 A3 EP0650069 A3 EP 0650069A3
Authority
EP
European Patent Office
Prior art keywords
probe system
channel probe
analog multi
analog
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP94307668A
Other languages
English (en)
French (fr)
Other versions
EP0650069A2 (de
EP0650069B1 (de
Inventor
Thomas P Dagostino
Arnold M Frisch
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tektronix Inc
Original Assignee
Tektronix Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tektronix Inc filed Critical Tektronix Inc
Publication of EP0650069A2 publication Critical patent/EP0650069A2/de
Publication of EP0650069A3 publication Critical patent/EP0650069A3/de
Application granted granted Critical
Publication of EP0650069B1 publication Critical patent/EP0650069B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318572—Input/Output interfaces
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31712—Input or output aspects
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31712—Input or output aspects
    • G01R31/31715—Testing of input or output circuits; test of circuitry between the I/C pins and the functional core, e.g. testing of input or output driver, receiver, buffer

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Tests Of Electronic Circuits (AREA)
EP94307668A 1993-10-22 1994-10-19 Analoges mehrkanaliges Prüfsystem Expired - Lifetime EP0650069B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/139,651 US5418470A (en) 1993-10-22 1993-10-22 Analog multi-channel probe system
US139651 1993-10-22

Publications (3)

Publication Number Publication Date
EP0650069A2 EP0650069A2 (de) 1995-04-26
EP0650069A3 true EP0650069A3 (de) 1996-02-28
EP0650069B1 EP0650069B1 (de) 2002-08-28

Family

ID=22487668

Family Applications (1)

Application Number Title Priority Date Filing Date
EP94307668A Expired - Lifetime EP0650069B1 (de) 1993-10-22 1994-10-19 Analoges mehrkanaliges Prüfsystem

Country Status (4)

Country Link
US (1) US5418470A (de)
EP (1) EP0650069B1 (de)
JP (1) JP2893242B2 (de)
DE (1) DE69431229T2 (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2278689B (en) * 1993-06-02 1997-03-19 Ford Motor Co Method and apparatus for testing integrated circuits
US5610530A (en) * 1994-10-26 1997-03-11 Texas Instruments Incorporated Analog interconnect testing
US5629617A (en) * 1995-01-06 1997-05-13 Hewlett-Packard Company Multiplexing electronic test probe
US5583447A (en) * 1995-02-03 1996-12-10 Hewlett-Packard Company Voltage probe with reverse impedance matching
WO1996041205A1 (en) * 1995-06-07 1996-12-19 Samsung Electronics Co., Ltd. Method and apparatus for testing a megacell in an asic using jtag
US5905383A (en) * 1995-08-29 1999-05-18 Tektronix, Inc. Multi-chip module development substrate
US6108637A (en) * 1996-09-03 2000-08-22 Nielsen Media Research, Inc. Content display monitor
US5818252A (en) * 1996-09-19 1998-10-06 Vivid Semiconductor, Inc. Reduced output test configuration for tape automated bonding
US5949284A (en) * 1997-11-10 1999-09-07 Tektronix, Inc. CMOS buffer amplifier
US6687865B1 (en) * 1998-03-25 2004-02-03 On-Chip Technologies, Inc. On-chip service processor for test and debug of integrated circuits
EP1088239B1 (de) * 1998-06-16 2006-05-31 Infineon Technologies AG Einrichtung zur vermessung und analyse von elektrischen signalen eines integrierten schaltungsbausteins
WO2002014883A2 (en) 2000-08-10 2002-02-21 Xilinx, Inc. Analog signal testing circuit and -method
JP2002286813A (ja) * 2001-03-28 2002-10-03 Agilent Technologies Japan Ltd トラック・ホールド回路を内蔵した集積回路及び試験方法
US6990618B1 (en) 2002-12-03 2006-01-24 Cypress Semiconductor Corporation Boundary scan register for differential chip core
DE10306620B4 (de) * 2003-02-18 2007-04-19 Infineon Technologies Ag Integrierte Testschaltung in einer integrierten Schaltung
CN1795393B (zh) * 2003-05-28 2010-06-02 Nxp股份有限公司 信号完整性自测结构
DE10340828A1 (de) * 2003-09-04 2005-04-28 Infineon Technologies Ag Testanordnung und Verfahren zur Auswahl eines Testmodus-Ausgabekanals
US7138814B2 (en) * 2003-11-21 2006-11-21 Agere Systems Inc. Integrated circuit with controllable test access to internal analog signal pads of an area array
CN100377102C (zh) * 2004-02-21 2008-03-26 鸿富锦精密工业（深圳）有限公司 主机板功能测试板
US7818640B1 (en) 2004-10-22 2010-10-19 Cypress Semiconductor Corporation Test system having a master/slave JTAG controller
US7408406B2 (en) * 2006-05-24 2008-08-05 Tektronix, Inc. Mode selection amplifier circuit usable in a signal acquisition probe
US7443180B2 (en) * 2006-12-06 2008-10-28 International Business Machines Corporation On-chip probing apparatus
US20120197570A1 (en) * 2011-01-27 2012-08-02 Mehran Ramezani Measurement of Parameters Within an Integrated Circuit Chip Using a Nano-Probe
CN117413191A (zh) * 2021-06-03 2024-01-16 特克特朗尼克公司 用于顺序测试的多输入远程头

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0042878A1 (de) * 1980-06-25 1982-01-06 Kommanditgesellschaft Ritz Messwandler GmbH & Co. Überwachungsvorrichtung für eine Messverstärkerstrecke
GB2214319A (en) * 1987-01-16 1989-08-31 Teradyne Inc Testing electronic circuits
EP0407787A1 (de) * 1989-06-27 1991-01-16 Alcatel Cit Testvorrichtung für gedruckte Schaltungskarten und ihre Anwendung für das Testen von gedruckten Schaltungskarten, in Form einer Multiplex-Demultiplexeinrichtung für numerische Signale
EP0481703A2 (de) * 1990-10-15 1992-04-22 Aptix Corporation Verbindungsstruktur für die Verwendung mit Programmierungselementen und Testvorrichtungen

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3961254A (en) * 1974-12-20 1976-06-01 International Business Machines Corporation Testing embedded arrays
US4357703A (en) * 1980-10-09 1982-11-02 Control Data Corporation Test system for LSI circuits resident on LSI chips
DE3526485A1 (de) * 1985-07-24 1987-02-05 Heinz Krug Schaltungsanordnung zum pruefen integrierter schaltungseinheiten
US4931722A (en) * 1985-11-07 1990-06-05 Control Data Corporation Flexible imbedded test system for VLSI circuits
US5053700A (en) * 1989-02-14 1991-10-01 Amber Engineering, Inc. Method for wafer scale testing of redundant integrated circuit dies
JP2676169B2 (ja) * 1989-12-27 1997-11-12 三菱電機株式会社 スキャンパス回路
US5254940A (en) * 1990-12-13 1993-10-19 Lsi Logic Corporation Testable embedded microprocessor and method of testing same
JPH04225180A (ja) * 1990-12-27 1992-08-14 Toshiba Corp 半導体測定装置
JP2744723B2 (ja) * 1991-08-29 1998-04-28 株式会社テック オーブントースター
US5315241A (en) * 1991-09-18 1994-05-24 Sgs-Thomson Microelectronics, Inc. Method for testing integrated circuits

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0042878A1 (de) * 1980-06-25 1982-01-06 Kommanditgesellschaft Ritz Messwandler GmbH & Co. Überwachungsvorrichtung für eine Messverstärkerstrecke
GB2214319A (en) * 1987-01-16 1989-08-31 Teradyne Inc Testing electronic circuits
EP0407787A1 (de) * 1989-06-27 1991-01-16 Alcatel Cit Testvorrichtung für gedruckte Schaltungskarten und ihre Anwendung für das Testen von gedruckten Schaltungskarten, in Form einer Multiplex-Demultiplexeinrichtung für numerische Signale
EP0481703A2 (de) * 1990-10-15 1992-04-22 Aptix Corporation Verbindungsstruktur für die Verwendung mit Programmierungselementen und Testvorrichtungen

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
"LOGICALLY CONTROLLED CHIP INTERCONNECTION TECHNIQUE", IBM TECHNICAL DISCLOSURE BULLETIN, vol. 32, no. 3B, NEW YORK US, pages 294 - 299 *
WURZ: "BUILT-IN SELF-TEST STRUCTURE FOR MIXED-MODE CIRCUITS", IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, vol. 42, no. 1, NEW YORK US, pages 25 - 29, XP000364410, DOI: doi:10.1109/19.206674 *

Also Published As

Publication number Publication date
EP0650069A2 (de) 1995-04-26
US5418470A (en) 1995-05-23
JPH07191100A (ja) 1995-07-28
EP0650069B1 (de) 2002-08-28
JP2893242B2 (ja) 1999-05-17
DE69431229T2 (de) 2003-03-13
DE69431229D1 (de) 2002-10-02

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