DE69921519D1 - Speicherzugangssteuervorrichtung - Google Patents

Speicherzugangssteuervorrichtung

Info

Publication number
DE69921519D1
DE69921519D1 DE69921519T DE69921519T DE69921519D1 DE 69921519 D1 DE69921519 D1 DE 69921519D1 DE 69921519 T DE69921519 T DE 69921519T DE 69921519 T DE69921519 T DE 69921519T DE 69921519 D1 DE69921519 D1 DE 69921519D1
Authority
DE
Germany
Prior art keywords
memory access
access controller
controller
memory
access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69921519T
Other languages
English (en)
Other versions
DE69921519T2 (de
Inventor
William Brent Wilson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Application granted granted Critical
Publication of DE69921519D1 publication Critical patent/DE69921519D1/de
Publication of DE69921519T2 publication Critical patent/DE69921519T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Bus Control (AREA)
DE69921519T 1998-01-22 1999-01-08 Speicherzugangssteuervorrichtung Expired - Lifetime DE69921519T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP01024298A JP4153579B2 (ja) 1998-01-22 1998-01-22 メモリアクセス制御装置
JP1024298 1998-01-22

Publications (2)

Publication Number Publication Date
DE69921519D1 true DE69921519D1 (de) 2004-12-09
DE69921519T2 DE69921519T2 (de) 2005-10-27

Family

ID=11744848

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69921519T Expired - Lifetime DE69921519T2 (de) 1998-01-22 1999-01-08 Speicherzugangssteuervorrichtung

Country Status (5)

Country Link
US (1) US6295588B1 (de)
EP (1) EP0932105B1 (de)
JP (1) JP4153579B2 (de)
KR (1) KR100327953B1 (de)
DE (1) DE69921519T2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6918019B2 (en) 2001-10-01 2005-07-12 Britestream Networks, Inc. Network and networking system for small discontiguous accesses to high-density memory devices
US20030135552A1 (en) * 2002-01-14 2003-07-17 Blackstock Michael A. Method for discovering and discriminating devices on local collaborative networks to facilitate collaboration among users
US7613772B2 (en) * 2002-07-25 2009-11-03 Colligo Networks, Inc. Method for context based discovery and filtering of portable collaborative networks
US7143264B2 (en) * 2002-10-10 2006-11-28 Intel Corporation Apparatus and method for performing data access in accordance with memory access patterns
US7782954B2 (en) * 2003-09-07 2010-08-24 Microsoft Corporation Scan patterns for progressive video content
US20090222537A1 (en) * 2003-12-04 2009-09-03 Colligo Newworks, Inc., A Canadian Corporation System And Method For Interactive Instant Networking
KR20070105761A (ko) * 2006-04-27 2007-10-31 엠텍비젼 주식회사 데이터 처리 기능을 구비한 메모리 장치 및 그 데이터 처리방법
WO2009096141A1 (ja) * 2008-01-29 2009-08-06 Panasonic Corporation メモリアクセスタイミング調整装置及びメモリアクセスタイミング調整方法
US7613850B1 (en) 2008-12-23 2009-11-03 International Business Machines Corporation System and method utilizing programmable ordering relation for direct memory access
US8867303B2 (en) * 2011-09-16 2014-10-21 Altera Corporation Memory arbitration circuitry

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0212541A (ja) * 1988-04-29 1990-01-17 Internatl Business Mach Corp <Ibm> コンピユーテイング・システム及びその動作方法
JPH0492936A (ja) * 1990-08-06 1992-03-25 Nec Corp メモリアクセス制御装置
JPH064401A (ja) * 1992-06-19 1994-01-14 Fujitsu Ltd メモリアクセス回路
US5339442A (en) * 1992-09-30 1994-08-16 Intel Corporation Improved system of resolving conflicting data processing memory access requests
JP3443689B2 (ja) * 1993-06-28 2003-09-08 日本テキサス・インスツルメンツ株式会社 アービタ回路
JPH07175714A (ja) * 1993-12-17 1995-07-14 Toshiba Corp メモリアクセス調停装置及び方法
JPH08249266A (ja) * 1995-03-10 1996-09-27 Sharp Corp データ転送回路
US6047361A (en) * 1996-08-21 2000-04-04 International Business Machines Corporation Memory control device, with a common synchronous interface coupled thereto, for accessing asynchronous memory devices and different synchronous devices
US5990913A (en) * 1997-07-30 1999-11-23 Intel Corporation Method and apparatus for implementing a flush command for an accelerated graphics port device

Also Published As

Publication number Publication date
DE69921519T2 (de) 2005-10-27
KR19990068048A (ko) 1999-08-25
EP0932105B1 (de) 2004-11-03
KR100327953B1 (ko) 2002-03-16
JPH11213662A (ja) 1999-08-06
US6295588B1 (en) 2001-09-25
JP4153579B2 (ja) 2008-09-24
EP0932105A2 (de) 1999-07-28
EP0932105A3 (de) 2002-05-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PANASONIC CORP., KADOMA, OSAKA, JP